Patents by Inventor Jong Pil Lee
Jong Pil Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240103796Abstract: [SUMMARY] A method of providing an audio mixing interface using multiple audio stems according to embodiment may comprise an audio mixing screen display step which displays an audio mixing screen including an audio block screen indicating audio blocks corresponding to at least one stem item preset for at least one audio version pre-stored for the audio on the display of a user device by the processor, when audio to be mixed is executed by the user, an audio block selection step which displays a selection block on a display of the user device in a shade different from that of the audio blocks by the processor, when the selection block selected by the user exists among the audio blocks displayed on the audio mixing screen and an audio session generation step which combines the audio information included in the selection block and create one session audio, when the user's selection of the audio block is completed.Type: ApplicationFiled: September 20, 2023Publication date: March 28, 2024Applicant: Neutune Co.,Ltd.Inventors: Jong-Pil LEE, Sang-Eun KUM, Tae-Hyoung KIM, Keun-Hyoung KIM
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Publication number: 20240088379Abstract: Provided is a positive electrode active material which includes an inner region that is a region from the center of the positive electrode active material particle to R/2; and an outer region that is a region from R/2 to the surface of the positive electrode active material particle, wherein R is a distance from the center of the positive electrode active material particle to the surface thereof. The positive electrode active material further includes 30% to 80% of crystallites A with respect to a total number of crystallites in the outer region of the positive electrode active material, the crystallites A having high crystallite long-axis orientation degree and crystallite c-axis orientation degree. Thus, the positive electrode active material can achieve excellent capacity characteristics and service life characteristics.Type: ApplicationFiled: March 22, 2022Publication date: March 14, 2024Applicant: LG Chem, Ltd.Inventors: Won Sig Jung, Hwan Young Choi, Jong Pil Kim, Yeo June Yoon, Kang Hyeon Lee, Tae Young Rhee, Yong Jo Jung
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Publication number: 20240075853Abstract: An apparatus of tilting a seat cushion of a vehicle, includes a tilting motor, a pinion gear, a sector gear, and a tilting link which perform the tilting operation of the seat cushion and exert a binding force in a tilted state of the seat cushion and are provided to be connected to both of one side and the other side of a seat cushion frame, and has two sector gears positioned on left and right sides and connected to each other by a connection bar so that, by strengthening a binding force of the front portion of the seat cushion, it is possible to secure the safety of passengers in the event of a collision.Type: ApplicationFiled: April 13, 2023Publication date: March 7, 2024Applicants: Hyundai Motor Company, Kia Corporation, DAS CO., LTD, Faurecia Korea, Ltd., Hyundai Transys Inc.Inventors: Sang Soo LEE, Mu Young KIM, Sang Hark LEE, Ho Suk JUNG, Sang Do PARK, Chan Ho JUNG, Dong Hoon LEE, Hea Yoon KANG, Deok Soo LIM, Seung Pil JANG, Seon Ho KIM, Jong Seok YUN, Hyo Jin KIM, Dong Gyu SHIN, Jin Ho SEO, Young Jun KIM, Taek Jun NAM
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Patent number: 11861281Abstract: A computer-readable storage medium that stores computer program code which, when executed by one or more processors, causes the one or more processors to execute tools for designing an integrated circuit (IC). The tools include a placing and routing tool that generates layout data and wire data corresponding to a net included in the IC by placing and routing standard cells defining the IC, the wire data including physical information of a wire implementing the net, and a timing analysis tool that calculates a wire delay with respect to the wire corresponding to the net, based on the physical information, updates the wire delay based on process variation of the wire, and calculates a timing slack by using the updated wire delay.Type: GrantFiled: October 17, 2022Date of Patent: January 2, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jong-pil Lee, Bong-il Park, Moon-su Kim, Sun-ik Heo
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Publication number: 20230351152Abstract: A music analysis device that cross-compares music properties using an artificial neural network comprises a processor including an artificial neural network module and a memory module storing instructions executable by the processor.Type: ApplicationFiled: July 11, 2023Publication date: November 2, 2023Applicant: Neutune Co.,Ltd.Inventors: Jong Pil LEE, Sangn Eun Kum, Tae Hyoung kim, Keun Hyoung Kim
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Publication number: 20230037826Abstract: A computer-readable storage medium that stores computer program code which, when executed by one or more processors, causes the one or more processors to execute tools for designing an integrated circuit (IC). The tools include a placing and routing tool that generates layout data and wire data corresponding to a net included in the IC by placing and routing standard cells defining the IC, the wire data including physical information of a wire implementing the net, and a timing analysis tool that calculates a wire delay with respect to the wire corresponding to the net, based on the physical information, updates the wire delay based on process variation of the wire, and calculates a timing slack by using the updated wire delay.Type: ApplicationFiled: October 17, 2022Publication date: February 9, 2023Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jong-pil Lee, Bong-il Park, Moon-su Kim, Sun-ik Heo
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Patent number: 11475195Abstract: A method includes performing, using a processor, a synthesis operation to generate a netlist from input data about an integrated circuit, placing and routing, using the one processor, standard cells defining the integrated circuit using the netlist, to generate layout data and wire data, extracting, using the processor, parasitic components from the layout data, and performing, using the processor, timing analysis of the integrated circuit according to timing constraints, based on the layout data and the wire data.Type: GrantFiled: January 25, 2021Date of Patent: October 18, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jong-pil Lee, Bong-il Park, Moon-su Kim, Sun-ik Heo
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Patent number: 11264166Abstract: An interposer includes an interposer body; first and second lower patterns spaced apart from each other on a lower surface of the interposer body; and first and second upper patterns spaced apart from each other on an upper surface of the interposer body. The first and second upper patterns include first and second shape-securing layers spaced apart from each other on the upper surface of the interposer body, and first and second acoustic noise reduction layers disposed on the first and second shape-securing layers, respectively. An electronic component includes a capacitor and the interposer.Type: GrantFiled: October 4, 2019Date of Patent: March 1, 2022Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Su Rim Bae, Jong Pil Lee, Hae In Kim, Eun Ju Oh
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Publication number: 20210173991Abstract: A method includes performing, using a processor, a synthesis operation to generate a netlist from input data about an integrated circuit, placing and routing, using the one processor, standard cells defining the integrated circuit using the netlist, to generate layout data and wire data, extracting, using the processor, parasitic components from the layout data, and performing, using the processor, timing analysis of the integrated circuit according to timing constraints, based on the layout data and the wire data.Type: ApplicationFiled: January 25, 2021Publication date: June 10, 2021Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jong-pil Lee, Bong-il Park, Moon-su Kim, Sun-ik Heo
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Patent number: 10902168Abstract: A computer-implemented method and a computing system for designing an integrated circuit are provided. The method includes generating wire data corresponding to a net included in an integrated circuit, the wire data including metal layer information of a wire corresponding to the net and physical information of the wire, performing timing analysis using the physical information of the wire included in the wire data to generate timing analysis data, and changing a layout of the integrated circuit according to the timing analysis data.Type: GrantFiled: January 4, 2018Date of Patent: January 26, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jong-pil Lee, Bong-il Park, Moon-su Kim, Sun-ik Heo
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Patent number: 10861625Abstract: An electronic component and a manufacturing method thereof are disclosed. An electronic component includes a substrate, a conductor pattern portion disposed on the substrate, a first electrode pattern and a second electrode pattern disposed on the conductor pattern portion, and at least one dummy electrode pattern disposed to be spaced apart from the first electrode pattern and the second electrode pattern and disposed on the substrate. A width of the first electrode pattern is substantially the same as a width of a portion of the conductor pattern portion in contact with the first electrode pattern, and a width of the second electrode pattern is substantially the same as a width of a portion of the conductor pattern portion in contact with the second electrode pattern.Type: GrantFiled: March 12, 2019Date of Patent: December 8, 2020Assignee: SAMSUNG ELECTRO-MECHANICS CO LTDInventors: Jong Pil Lee, Ichiro Tanaka, Doo Ho Yoo, Hyun Jun Choi, Hyung Gon Kim, Hyung Seok Roh, Jung Il Kim
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Patent number: 10840024Abstract: A multilayer capacitor includes: a first internal electrode layer including first and second internal electrodes disposed to face each other with an insulating portion interposed therebetween; a second internal electrode layer including a third internal electrode and a lead portion connected to the third internal electrode; a body including the first and second internal electrode layers alternately disposed with respective dielectric layers interposed therebetween; first and second external electrodes disposed on the body to be connected to the first and second internal electrodes, respectively; and a third external electrode disposed on the body to be connected to the lead portion.Type: GrantFiled: June 18, 2018Date of Patent: November 17, 2020Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jong Pil Lee, Jung Il Kim, Jin Man Jung, Young Key Kim, Jin Kyung Joo
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Publication number: 20200343044Abstract: An interposer includes an interposer body; first and second lower patterns spaced apart from each other on a lower surface of the interposer body; and first and second upper patterns spaced apart from each other on an upper surface of the interposer body. The first and second upper patterns include first and second shape-securing layers spaced apart from each other on the upper surface of the interposer body, and first and second acoustic noise reduction layers disposed on the first and second shape-securing layers, respectively. An electronic component includes a capacitor and the interposer.Type: ApplicationFiled: October 4, 2019Publication date: October 29, 2020Inventors: Su Rim BAE, Jong Pil LEE, Hae In KIM, Eun Ju OH
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Patent number: 10734141Abstract: An electronic component and a manufacturing method thereof are disclosed. The electronic component includes a substrate, a conductor pattern portion disposed on the substrate, a first electrode pattern and a second electrode pattern disposed on the conductor pattern portion, at least one dummy conductor pattern disposed to be spaced apart from the conductor pattern portion and disposed on the substrate, and at least one dummy electrode pattern disposed on the at least one dummy conductor pattern. A width of the first electrode pattern is substantially the same as a width of a portion of the conductor pattern portion in contact with the first electrode pattern, and a width of the second electrode pattern is substantially the same as a width of a portion of the conductor pattern portion in contact with the second electrode pattern.Type: GrantFiled: March 11, 2019Date of Patent: August 4, 2020Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jong Pil Lee, Doo Ho Yoo, Hyung Gon Kim, Jung Il Kim, Hyun Jun Choi, Hyung Seok Roh
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Patent number: 10629378Abstract: A multilayer capacitor includes: a first internal electrode layer including first and second internal electrodes spaced apart from each other with an insulating portion interposed therebetween; a second internal electrode layer including a third internal electrode; a body including the first and second internal electrode layers alternately disposed with respective dielectric layers interposed therebetween; first and second external electrodes disposed on the body to be electrically connected to the first and second internal electrodes, respectively; a connection electrode penetrating through the body to thereby be electrically connected to the third internal electrode; and a third external electrode disposed on the body to be electrically connected to the connection electrode.Type: GrantFiled: June 26, 2018Date of Patent: April 21, 2020Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jong Pil Lee, Jin Kyung Joo, Young Key Kim, Taek Jung Lee
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Publication number: 20200090842Abstract: An electronic component and a manufacturing method thereof are disclosed. An electronic component includes a substrate, a conductor pattern portion disposed on the substrate, a first electrode pattern and a second electrode pattern disposed on the conductor pattern portion, and at least one dummy electrode pattern disposed to be spaced apart from the first electrode pattern and the second electrode pattern and disposed on the substrate. A width of the first electrode pattern is substantially the same as a width of a portion of the conductor pattern portion in contact with the first electrode pattern, and a width of the second electrode pattern is substantially the same as a width of a portion of the conductor pattern portion in contact with the second electrode pattern.Type: ApplicationFiled: March 12, 2019Publication date: March 19, 2020Inventors: Jong Pil Lee, Ichiro Tanaka, Doo Ho Yoo, Hyun Jun Choi, Hyung Gon Kim, Hyung Seok Roh, Jung Il Kim
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Publication number: 20200090841Abstract: An electronic component and a manufacturing method thereof are disclosed. The electronic component includes a substrate, a conductor pattern portion disposed on the substrate, a first electrode pattern and a second electrode pattern disposed on the conductor pattern portion, at least one dummy conductor pattern disposed to be spaced apart from the conductor pattern portion and disposed on the substrate, and at least one dummy electrode pattern disposed on the at least one dummy conductor pattern. A width of the first electrode pattern is substantially the same as a width of a portion of the conductor pattern portion in contact with the first electrode pattern, and a width of the second electrode pattern is substantially the same as a width of a portion of the conductor pattern portion in contact with the second electrode pattern.Type: ApplicationFiled: March 11, 2019Publication date: March 19, 2020Inventors: Jong Pil Lee, Doo Ho Yoo, Hyung Gon Kim, Jung Il Kim, Hyun Jun Choi, Hyung Seok Roh
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Patent number: 10559424Abstract: A multilayer capacitor and a board having the same provide high capacitance and low equivalent series inductance (ESL). The multilayer capacitor includes a capacitor body including an active region, including first and second internal electrodes, and first and second cover regions. Third and fourth internal electrodes are alternately disposed in the cover region adjacent to a mounting surface. First and second external electrodes respectively contact the first and second internal electrodes to provide capacitance. First and second via electrodes are disposed in the cover region, where the first via electrode connects the third internal electrode and a first band portion of the first external electrode to each other, and where the second via electrode connects the fourth internal electrode and a second band portion of the second external electrode to each other.Type: GrantFiled: June 11, 2018Date of Patent: February 11, 2020Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jong Pil Lee, Hyo Youn Lee, Sung Kwon An, Seung Woo Song, Taek Jung Lee, Jin Kyung Joo
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Patent number: 10559425Abstract: A multilayer capacitor and a board having the same provide high capacitance and low equivalent series inductance (ESL). The multilayer capacitor includes a capacitor body including an active region, including first and second internal electrodes, and first and second cover regions. Third and fourth internal electrodes are alternately disposed in the cover region adjacent to a mounting surface. First and second external electrodes respectively contact the first and second internal electrodes to provide capacitance. First and second via electrodes are disposed in the cover region, where the first via electrode connects the third internal electrode and a first band portion of the first external electrode to each other, and where the second via electrode connects the fourth internal electrode and a second band portion of the second external electrode to each other.Type: GrantFiled: February 8, 2019Date of Patent: February 11, 2020Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jong Pil Lee, Hyo Youn Lee, Sung Kwon An, Seung Woo Song, Taek Jung Lee, Jin Kyung Joo
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Patent number: 10516382Abstract: There is provided a piezoelectric vibration member including: a vibration substrate including a vibrating portion and a surrounding portion which is thinner than the vibrating portion; and vibrating electrodes disposed on one surface and the other surface of the vibrating portion in a thickness direction, wherein the vibrating portion includes protrusion portions protruding in relation to one surface and the other surface of the surrounding portion in the thickness direction, and at least one side surface of the protrusion portion has two or more crystal planes.Type: GrantFiled: September 15, 2015Date of Patent: December 24, 2019Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Jong Pil Lee, Seung Mo Lim