Abstract: A white light emitting device, including a circuit board; a plurality of light sources mounted on the circuit board, each light source of the plurality of light sources configured to emit monochromatic light; a light converter spaced apart from the circuit board, the light converter configured to convert the monochromatic light emitted from the light sources to white light; and a compensator provided between the circuit board and the light converter, the compensator configured to convert the emitted monochromatic light to white light.

Abstract: A computer-readable storage medium that stores computer program code which, when executed by one or more processors, causes the one or more processors to execute tools for designing an integrated circuit (IC). The tools include a placing and routing tool that generates layout data and wire data corresponding to a net included in the IC by placing and routing standard cells defining the IC, the wire data including physical information of a wire implementing the net, and a timing analysis tool that calculates a wire delay with respect to the wire corresponding to the net, based on the physical information, updates the wire delay based on process variation of the wire, and calculates a timing slack by using the updated wire delay.

Abstract: A negative electrode for lithium secondary batteries is provided. The negative electrode comprises a negative electrode current collector including a porous structure having an inner pore or a through-hole formed therethrough from an upper surface to a lower surface thereof, wherein a lithiophilic material is applied to a surface of the porous structure or the through-hole excluding a first surface of the negative electrode current collector that faces a positive electrode.

Abstract: Provided is a novel compound capable of improving the luminous efficiency, stability and lifespan of a device, an organic electronic device using the same, and an electronic device.

Abstract: The present invention relates to a hydrogen production reactor comprising a high-efficiency composite having a high thermal conductivity and an antioxidant property. Specifically, the hydrogen production reactor comprises: a first region in which a combustion reaction of fuel occurs; a second region in which a hydrogen extraction reaction occurs; a metal substrate that partitions the first region and the second region; and a coating layer that comprises boron nitride (BN) and is formed on at least one surface of the metal substrate, wherein heat generated in the first region is transferred to the second region through the metal substrate.

Abstract: The present invention relates to a catalyst in which a catalytic metal is supported on a support including a single-crystalline hexagonal material, and a preparation method therefor, wherein the catalyst can be effectively used in ammonia dehydrogenation or ammonia synthesis.

Abstract: A semiconductor package includes; a substrate including a first insulating layer and a first conductive pattern in the first insulating layer, a first semiconductor chip on the substrate, an interposer spaced apart from the first semiconductor chip in a direction perpendicular to an upper surface of the substrate and including a second insulating layer and a second conductive pattern in the second insulating layer, a first element between the first semiconductor chip and the interposer, a connection member between the substrate and the interposer, and a mold layer covering side surfaces of the first semiconductor chip and side surfaces of the first element.

Abstract: The present invention relates to a method for prenatal diagnosis using digital PCR, and more particularly to a method for providing information for diagnosis of chromosomal aneuploidy in a fetus, comprising: (a) extracting DNAs from pregnant woman's blood; (b) classifying the DNAs according to size to obtain DNAs having a size of 1,000 bp or less; (c) performing digital PCR using the obtained DNAs of step (b), for a control gene located on a chromosome not associated with chromosomal aneuploidy and a target gene located on a chromosome associated with chromosomal aneuploidy; (d) calculating a ratio of a quantitative digital PCR value of the target gene to a quantitative digital PCR value of the control gene; and (e) determining that when the ratio calculated in step (d) is 0.70-1.14, a chromosome number of the fetus is normal.

Abstract: A method includes performing, using a processor, a synthesis operation to generate a netlist from input data about an integrated circuit, placing and routing, using the one processor, standard cells defining the integrated circuit using the netlist, to generate layout data and wire data, extracting, using the processor, parasitic components from the layout data, and performing, using the processor, timing analysis of the integrated circuit according to timing constraints, based on the layout data and the wire data.

Abstract: The present invention relates to a positive electrode material, which includes a positive electrode active material, and a coating layer formed on a surface of the positive electrode active material, wherein the coating layer has a form in which polyimide is dispersed and distributed in an island shape, and a method of preparing the same.

Abstract: Provided are a neural network device for performing a neural network operation, a method of operating the neural network device, and an application processor including the neural network device. The neural network device includes a direct memory access (DMA) controller configured to receive floating-point data from a memory; a data converter configured to convert the floating-point data received through the DMA controller to integer-type data; and a processor configured to perform a neural network operation based on an integer operation by using the integer-type data provided from the data converter.

Abstract: An antenna structure according to an embodiment of the present disclosure includes a dielectric layer, and an antenna conductive layer disposed on a top surface of the dielectric layer. The antenna conductive layer includes a radiator, first and second transmission lines extending in different directions to be connected to the radiator, an upper parasitic element adjacent to an upper portion of the radiator in a planar view, and a lower parasitic element adjacent to a lower portion of the radiator, the first transmission line and the second transmission line in the planar view.

Abstract: An electronic device includes a force-sensing apparatus. The force-sensing apparatus includes a planar-shaped frame, a force sensor, and a displacement portion. The force sensor is disposed on one surface of the frame. The displacement portion has a planar profile and one side coupled at an acute angle to the frame and another side freely disposed above a sensing surface of the force sensor.

Abstract: An interposer includes an interposer body; first and second lower patterns spaced apart from each other on a lower surface of the interposer body; and first and second upper patterns spaced apart from each other on an upper surface of the interposer body. The first and second upper patterns include first and second shape-securing layers spaced apart from each other on the upper surface of the interposer body, and first and second acoustic noise reduction layers disposed on the first and second shape-securing layers, respectively. An electronic component includes a capacitor and the interposer.

Abstract: A method includes performing, using a processor, a synthesis operation to generate a netlist from input data about an integrated circuit, placing and routing, using the one processor, standard cells defining the integrated circuit using the netlist, to generate layout data and wire data, extracting, using the processor, parasitic components from the layout data, and performing, using the processor, timing analysis of the integrated circuit according to timing constraints, based on the layout data and the wire data.

Abstract: A computer-implemented method and a computing system for designing an integrated circuit are provided. The method includes generating wire data corresponding to a net included in an integrated circuit, the wire data including metal layer information of a wire corresponding to the net and physical information of the wire, performing timing analysis using the physical information of the wire included in the wire data to generate timing analysis data, and changing a layout of the integrated circuit according to the timing analysis data.

Abstract: An electronic component and a manufacturing method thereof are disclosed. An electronic component includes a substrate, a conductor pattern portion disposed on the substrate, a first electrode pattern and a second electrode pattern disposed on the conductor pattern portion, and at least one dummy electrode pattern disposed to be spaced apart from the first electrode pattern and the second electrode pattern and disposed on the substrate. A width of the first electrode pattern is substantially the same as a width of a portion of the conductor pattern portion in contact with the first electrode pattern, and a width of the second electrode pattern is substantially the same as a width of a portion of the conductor pattern portion in contact with the second electrode pattern.

Abstract: A multilayer capacitor includes: a first internal electrode layer including first and second internal electrodes disposed to face each other with an insulating portion interposed therebetween; a second internal electrode layer including a third internal electrode and a lead portion connected to the third internal electrode; a body including the first and second internal electrode layers alternately disposed with respective dielectric layers interposed therebetween; first and second external electrodes disposed on the body to be connected to the first and second internal electrodes, respectively; and a third external electrode disposed on the body to be connected to the lead portion.

Abstract: An interposer includes an interposer body; first and second lower patterns spaced apart from each other on a lower surface of the interposer body; and first and second upper patterns spaced apart from each other on an upper surface of the interposer body. The first and second upper patterns include first and second shape-securing layers spaced apart from each other on the upper surface of the interposer body, and first and second acoustic noise reduction layers disposed on the first and second shape-securing layers, respectively. An electronic component includes a capacitor and the interposer.

Abstract: An electronic component and a manufacturing method thereof are disclosed. The electronic component includes a substrate, a conductor pattern portion disposed on the substrate, a first electrode pattern and a second electrode pattern disposed on the conductor pattern portion, at least one dummy conductor pattern disposed to be spaced apart from the conductor pattern portion and disposed on the substrate, and at least one dummy electrode pattern disposed on the at least one dummy conductor pattern. A width of the first electrode pattern is substantially the same as a width of a portion of the conductor pattern portion in contact with the first electrode pattern, and a width of the second electrode pattern is substantially the same as a width of a portion of the conductor pattern portion in contact with the second electrode pattern.