Abstract: There is provided a piezoelectric vibration member including: a vibration substrate including a vibrating portion and a surrounding portion which is thinner than the vibrating portion; and vibrating electrodes disposed on one surface and the other surface of the vibrating portion in a thickness direction, wherein the vibrating portion includes protrusion portions protruding in relation to one surface and the other surface of the surrounding portion in the thickness direction, and at least one side surface of the protrusion portion has two or more crystal planes.

Abstract: A monolayer thin film capacitor includes: a bottom electrode; a top electrode; a dielectric layer disposed between the bottom electrode and the top electrode; a first via formed in the dielectric layer so as to penetrate through the dielectric layer; a second via formed in the top electrode so as to penetrate through the top electrode and having a greater width or a greater diameter than that of the first via; and a connection electrode disposed on inner sides of the first and second vias, electrically connected to the bottom electrode, and electrically insulated from the top electrode.

Abstract: A resistor element includes a substrate having first and second surfaces facing each other, and a plurality of side surfaces connecting the first surface and the second surface with each other. A resistance layer is on at least one of the first and second surfaces. A first terminal and a second terminal are connected to the resistance layer, and each include a first electrode layer on the first surface, a second electrode layer on the second surface, and a plurality of side electrode layers on at least a portion of the plurality of side surfaces. At least a portion of the side surfaces of the substrate is exposed between side electrode layers of the first terminal.

Abstract: A multilayer ceramic capacitor includes: a capacitance layer including dielectric layers and first and second internal electrodes disposed with respective dielectric layers interposed therebetween; a protection layer disposed on one surface of the capacitance layer; an alpha connection electrode provided in an alpha via penetrating through the protection layer; and a beta connection electrode provided in a beta via penetrating through the capacitance layer and connected to the alpha via. The alpha via has a diameter greater than that of the beta via.

Abstract: A multilayer capacitor and a board having the same provide high capacitance and low equivalent series inductance (ESL). The multilayer capacitor includes a capacitor body including an active region, including first and second internal electrodes, and first and second cover regions. Third and fourth internal electrodes are alternately disposed in the cover region adjacent to a mounting surface. First and second external electrodes respectively contact the first and second internal electrodes to provide capacitance. First and second via electrodes are disposed in the cover region, where the first via electrode connects the third internal electrode and a first band portion of the first external electrode to each other, and where the second via electrode connects the fourth internal electrode and a second band portion of the second external electrode to each other.

Abstract: A piezoelectric oscillator, and method of making the same, includes an oscillation substrate comprising an oscillating part and a surrounding part, wherein the surrounding part is thinner than the oscillating part, and oscillating electrodes disposed on an upper surface and a lower surface of the oscillating part. The oscillation substrate is configured according to H=400.59×S+1.75±1.5, wherein H=100×(T2/T1) and S=T2/(L1?L2), wherein L1 represents an entire length of the oscillation substrate, L2 represents a length of the oscillating part, T1 represents a thickness of the oscillating part, and T2 represents a step height between the oscillating part and the surrounding part.

Abstract: A multilayer capacitor includes: a first internal electrode layer including first and second internal electrodes spaced apart from each other with an insulating portion interposed therebetween; a second internal electrode layer including a third internal electrode; a body including the first and second internal electrode layers alternately disposed with respective dielectric layers interposed therebetween; first and second external electrodes disposed on the body to be electrically connected to the first and second internal electrodes, respectively; a connection electrode penetrating through the body to thereby be electrically connected to the third internal electrode; and a third external electrode disposed on the body to be electrically connected to the connection electrode.

Abstract: A multilayer capacitor includes: a first internal electrode layer including first and second internal electrodes disposed to face each other with an insulating portion interposed therebetween; a second internal electrode layer including a third internal electrode and a lead portion connected to the third internal electrode; a body including the first and second internal electrode layers alternately disposed with respective dielectric layers interposed therebetween; first and second external electrodes disposed on the body to be connected to the first and second internal electrodes, respectively; and a third external electrode disposed on the body to be connected to the lead portion.

Abstract: A multilayer capacitor and a board having the same provide high capacitance and low equivalent series inductance (ESL). The multilayer capacitor includes a capacitor body including an active region, including first and second internal electrodes, and first and second cover regions. Third and fourth internal electrodes are alternately disposed in the cover region adjacent to amounting surface. First and second external electrodes respectively contact the first and second internal electrodes to provide capacitance. First and second via electrodes are disposed in the cover region, where the first via electrode connects the third internal electrode and a first band portion of the first external electrode to each other, and where the second via electrode connects the fourth internal electrode and a second band portion of the second external electrode to each other.

Abstract: A crystal oscillator package includes a crystal piece configured to vibrate in response to an electrical signal, a first vibrating part protruding from an upper surface of the crystal piece, a second vibrating part protruding from a lower surface of the crystal piece, a first exciting electrode disposed on the first vibrating part, a second exciting electrode disposed on the second vibrating part, and protrusions extending from an end portion of the lower surface of the crystal piece. The protrusions include two or more stages.

Abstract: A multilayer ceramic capacitor includes: a capacitance layer including dielectric layers and first and second internal electrodes disposed with respective dielectric layers interposed therebetween; a protection layer disposed on one surface of the capacitance layer; an alpha connection electrode provided in an alpha via penetrating through the protection layer; and a beta connection electrode provided in a beta via penetrating through the capacitance layer and connected to the alpha via. The alpha via has a diameter greater than that of the beta via.

Abstract: A computer-implemented method and a computing system for designing an integrated circuit are provided. The method includes generating wire data corresponding to a net included in an integrated circuit, the wire data including metal layer information of a wire corresponding to the net and physical information of the wire, performing timing analysis using the physical information of the wire included in the wire data to generate timing analysis data, and changing a layout of the integrated circuit according to the timing analysis data.

Abstract: A monolayer thin film capacitor includes: a bottom electrode; a top electrode; a dielectric layer disposed between the bottom electrode and the top electrode; a first via formed in the dielectric layer so as to penetrate through the dielectric layer; a second via formed in the top electrode so as to penetrate through the top electrode and having a greater width or a greater diameter than that of the first via; and a connection electrode disposed on inner sides of the first and second vias, electrically connected to the bottom electrode, and electrically insulated from the top electrode.

Abstract: A resistor element includes a substrate having first and second surfaces facing each other, and a plurality of side surfaces connecting the first surface and the second surface with each other. A resistance layer is on at least one of the first and second surfaces. A first terminal and a second terminal are connected to the resistance layer, and each include a first electrode layer on the first surface, a second electrode layer on the second surface, and a plurality of side electrode layers on at least a portion of the plurality of side surfaces. At least a portion of the side surfaces of the substrate is exposed between side electrode layers of the first terminal.

Abstract: A piezoelectric device package may include: a case having a plurality of terminals formed on a lower surface thereof; a piezoelectric device formed in the case; a temperature measuring device formed on the lower surface of the case and having a thin film form; and a cover member enclosing an upper portion of the case.

Abstract: A monolayer thin film capacitor includes: a bottom electrode; a top electrode; a dielectric layer disposed between the bottom electrode and the top electrode; a first via formed in the dielectric layer so as to penetrate through the dielectric layer; a second via formed in the top electrode so as to penetrate through the top electrode and having a greater width or a greater diameter than that of the first via; and a connection electrode disposed on inner sides of the first and second vias, electrically connected to the bottom electrode, and electrically insulated from the top electrode.

Abstract: An integrated circuit, a method of controlling an operation timing of a memory device, an application processor, and a power manager are provided. The application processor includes: a power manager configured to determine a first operating power level, from among a plurality of operating power levels, to determine a first timing margin corresponding to the first operating power level, to generate a first gray code signal indicating the first timing margin, and to output the first gray code signal; and a first memory device configured to adjust an operation timing according to the first timing margin indicated by the first gray code signal, wherein the power manager is configured to provide the first operating power level to the first memory device.

Abstract: Embodiments of the invention provide a quartz crystal vibrator including an AT-cut quartz crystal piece having a long side in an X axis direction and including first and second crystal planes formed on at least one side surface thereof in a Y? axis direction, and an electrode layer formed on the AT-cut quartz crystal piece.

Abstract: A monolayer thin film capacitor includes: a bottom electrode; a top electrode; a dielectric layer disposed between the bottom electrode and the top electrode; a first via formed in the dielectric layer so as to penetrate through the dielectric layer; a second via formed in the top electrode so as to penetrate through the top electrode and having a greater width or a greater diameter than that of the first via; and a connection electrode disposed on inner sides of the first and second vias, electrically connected to the bottom electrode, and electrically insulated from the top electrode.

Abstract: An electronic device is provided, which includes an antenna; and a communication processor configured to transmit and receive a first signal corresponding to a first frequency band through the antenna, and to perform one of transmitting and receiving a second signal corresponding to a second frequency band through the antenna.