Abstract: A mobile device management apparatus has a policy storage unit that receives a plurality of security policies, which are classified into a plurality of profiles assigned priorities of activation and in which operating states of functions of a mobile device are defined. A management server supplies the profiles and the security policies to the mobile device. A policy implementation unit selectively activates the profiles so that control of the mobile device functions can be carried out with minimal communication, and also in response to changing events.

Abstract: A semiconductor device and a method for fabricating the same are provided. The semiconductor device includes a device isolation region, a trench formed in the device isolation region, a void connected to the trench in the device isolation region, a first mask pattern formed along sidewalls of the trench and protruding inwardly with respect to the void, a gate insulating film formed along the sidewall of the void, and a gate electrode filling the trench and at least a portion of the void.

Abstract: A voltage generation circuit of a semiconductor apparatus includes a first detection block configured to detect an output voltage and output a first detection signal; a second detection block configured to detect the output voltage and output a second detection signal; a signal generation block configured to generate a control signal in response to the first detection signal and the second detection signal; and a voltage generation block configured to generate the output voltage in response to the control signal, wherein responding speeds of the first detection block and the second detection block with respect to a variation in the output voltage are different.

Abstract: A semiconductor apparatus includes a reference voltage generation unit configured to generate a reference voltage. The semiconductor apparatus also includes an internal voltage generation unit configured to generate an internal voltage which corresponds to a voltage level of the reference voltage. In addition, the semiconductor apparatus includes a noise generation unit configured to generate noise in the reference voltage according to noise of the internal voltage.

Abstract: Disclosed is a high voltage device including a substrate structure having a high voltage transistor and a lower wiring connected to the high voltage transistor, a linker structure having a supplemental insulation pattern on the substrate structure and an interconnecting linker penetrating through the supplemental insulation pattern and connected to the lower wiring, an insulation interlayer pattern on the supplemental insulation pattern, and an upper wiring structure penetrating through insulation interlayer pattern and connected to the interconnecting linker. The thickness of the inter-metal dielectric layer between the upper and the lower wirings is increased to thereby improve the insulation characteristics of the inter-metal dielectric layer. As a result, the breakdown voltage and the current leakage characteristics of the high voltage device are improved.

Abstract: Provided are an apparatus and a method for changing a status of cluster nodes, which determine whether to change statuses of respective cluster nodes themselves to an active status or a standby status without intervention by a manager through self-diagnosis and change the status of the nodes.

Abstract: A method for fabricating a semiconductor device includes sequentially forming an etch stop film and an insulating film on a substrate including a lower pattern forming a conductive mask pattern including a first opening on the insulating film, forming a via-hole in the insulating film using the conductive mask pattern as an etch mask, the via-hole exposing the etch stop film, removing the conductive mask pattern, and forming a passivation film along a side wall of the via-hole after removing the conductive mask pattern.

Abstract: An internal voltage generation circuit of a semiconductor apparatus includes: an active driver configured to output an internal voltage to an output node; a standby driver configured to output the internal voltage to the output node; and a voltage stabilizer connected to the output node. The voltage stabilizer starts a voltage stabilization operation of supplying or receiving electric charges to or from the output node when an active enable signal is disabled, and stops the voltage stabilization operation in a predetermined time after the active enable signal is enabled.

Abstract: An internal voltage generation circuit of a semiconductor apparatus includes: an active driver configured to output an internal voltage to an output node; a standby driver configured to output the internal voltage to the output node; and a voltage stabilizer connected to the output node. The voltage stabilizer starts a voltage stabilization operation of supplying or receiving electric charges to or from the output node when an active enable signal is disabled, and stops the voltage stabilization operation in a predetermined time after to the active enable signal is enabled.

Abstract: A method for fabricating a semiconductor device includes sequentially forming an etch stop film and an insulating film on a substrate including a lower pattern forming a conductive mask pattern including a first opening on the insulating film, forming a via-hole in the insulating film using the conductive mask pattern as an etch mask, the via-hole exposing the etch stop film, removing the conductive mask pattern, and forming a passivation film along a side wall of the via-hole after removing the conductive mask pattern.

Abstract: A semiconductor device and a method for fabricating the same are provided. The semiconductor device includes a device isolation region, a trench formed in the device isolation region, a void connected to the trench in the device isolation region, a first mask pattern formed along sidewalls of the trench and protruding inwardly with respect to the void, a gate insulating film formed along the sidewall of the void, and a gate electrode filling the trench and at least a portion of the void.

Abstract: An inverter delay compensation circuit includes a comparison determination unit including a first delay circuit configured for receiving a reference signal and having an inverter chain and a second delay circuit configured for receiving the reference signal and more insensitive to a PVT variation than the first delay circuit, and configured to compare delay amounts of signals obtained by passing the reference signal through the first and second delay circuits, respectively, and the comparison determination unit configured for generating a plurality of control signals; and a compensation circuit unit configured to compensate for a delay amount of an input signal in response to the plurality of control signals and configured to output an output signal.

Abstract: A mobile device management apparatus has a policy storage unit that receives a plurality of security policies, which are classified into a plurality of profiles assigned priorities of activation and in which operating states of functions of a mobile device are defined. A management server supplies the profiles and the security policies to the mobile device. A policy implementation unit selectively activates the profiles so that control of the mobile device functions can be carried out with minimal communication, and also in response to changing events.

Abstract: A loader for a substrate storage container defines a buffer space in which the substrate storage container is temporarily stored between a transfer facility and a semiconductor production facility of a semiconductor production line. The loader includes a load port configured to store the substrate storage container, a buffer port configured to store the substrate storage container, a transfer robot to transfer the substrate storage container within the loader, and a dual entrance sensing device on the transfer robot to determine if the substrate storage container is loaded on the load port and to determine if the substrate storage container is loaded on the buffer port.

Abstract: An internal voltage control circuit includes active drivers, a control unit, and a time interval adjustment unit. The active drivers are configured to receive a common internal voltage. The control unit is configured to control respective enable operations of the active drivers. The time interval adjustment unit is configured to respectively supply enable signals, generated by the control unit, to the active drivers at respective predetermined time intervals.

Abstract: A test apparatus includes a test fuse unit for generating a test fuse signal in response to a test mode signal during a test time and generating a test fuse signals according to a fuse cutting after a termination of the test time, a combination signal generating unit for storing a test signal and inactivating a combination signal when the test mode signal is inactivate and for outputting the stored test signal as the combination signal when the test mode signal is activate, and a code signal generating unit for activating a test code signal when one of the test fuse signal and the combination signal is activated.

Abstract: An internal voltage control circuit includes active drivers, a control unit, and a time interval adjustment unit. The active drivers are configured to receive a common internal voltage. The control unit is configured to control respective enable operations of the active drivers. The time interval adjustment unit is configured to respectively supply enable signals, generated by the control unit, to the active drivers at respective predetermined time intervals.

Abstract: A test apparatus includes a test fuse unit for generating a test fuse signal in response to a test mode signal during a test time and generating a test fuse signals according to a fuse cutting after a termination of the test time, a combination signal generating unit for storing a test signal and inactivating a combination signal when the test mode signal is inactivate and for outputting the stored test signal as the combination signal when the test mode signal is activate, and a code signal generating unit for activating a test code signal when one of the test fuse signal and the combination signal is activated.

Abstract: A charge pumping circuit consumes less current by reducing the number of charge pumps operating simultaneously. The charge pumping circuit includes a voltage sensor that detects a level of a high voltage and outputs a control signal based on the detection result. An oscillator provides an oscillating clock signal in response to the control signal of the voltage sensor, and the oscillator sequentially outputs the clock signal as a plurality of clock signals having shifted phases A plurality of high-voltage pumps are disposed in a plurality of regions to pump the high voltage in response to the clock signals and a different phase is designated for each region.

Abstract: A rechargeable battery pack for portable electronic equipment is includes a battery coupled to a charge/discharge circuit and includes a a first substrate for mounting parts positioned on a high-current path and a second substrate for mounting peripheral circuits for controlling a charge/discharge of the battery. Accordingly, heat sensitive parts on low current paths may be thermally isolated from heat generating parts on high current paths.