Patents by Inventor Jong-Wan Choi

Jong-Wan Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955888
    Abstract: As inputs of a controller of a direct current (DC)-DC converter are sampled for a predetermined time and thus two-dimensional state information in which one axis is an input physical quantity and the other axis is a time is generated, the two-dimensional state information is processed by a convolutional neural network to determine and output one of a plurality of control signals. An artificial intelligence control part may operate in accordance with a plurality of operation conditions or dynamically determined operation conditions by applying different artificial intelligence engines according to operation modes.
    Type: Grant
    Filed: July 3, 2021
    Date of Patent: April 9, 2024
    Inventors: Kang Yoon Lee, Jong Wan Jo, Min Young Kim, Dong Soo Park, Kyung Duk Choi, Young Gun Pu
  • Publication number: 20240092169
    Abstract: A display apparatus for a vehicle includes a cockpit part including an opening, a guide part mounted within the cockpit part, a display unit disposed within the cockpit part, moved along the guide part so that the display unit has a curved line-shaped moving path and configured to appear and disappear through the opening, and a driving part configured to provide electric power to the display unit so th
    Type: Application
    Filed: May 19, 2023
    Publication date: March 21, 2024
    Applicant: HYUNDAI MOBIS CO., LTD.
    Inventors: Jong Wan CHOI, Hyung Soo KIM
  • Patent number: 10734244
    Abstract: Provided is a substrate processing method capable of preventing over-etching of a part of a stair-case structure due to an etching solution, when a barrier layer is selectively formed on a VNAND device having the stair-case structure. The substrate processing method includes: alternately stacking a first insulating layer and a second insulating layer; forming a stepped structure having an upper surface, a lower surface, and a side surface connecting the upper surface to the lower surface by etching the first insulating layer and the second insulating layer that are stacked; densifying the stepped structure; forming a barrier layer on the densified second insulating layer; and performing isotropic etching on at least a part of a sacrificial word line structure including the second insulating layer and the barrier layer. During etching the barrier layer at the isotropic etching step, the second insulating layer is not etched or etched a little to an ignorable degree.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: August 4, 2020
    Assignee: ASM IP Holding B.V.
    Inventors: Young Hoon Kim, Jong Wan Choi, Jeong Jun Woo, Tae Hee Yoo
  • Patent number: 10644025
    Abstract: A method of processing a substrate by omitting a photolithographic process is disclosed. The method includes forming at least one layer on a stepped structure having an upper surface, a lower surface, and a side surface that connects the upper surface to the lower surface, selectively densifying portions of the at least one layer respectively on the upper surface and the lower surface via asymmetric plasma application, and performing an isotropic etching process on the at least one layer. During the isotropic etching process, the portion of the at least one layer formed on the upper surface is separated from the portion of the at least one layer formed on the lower surface.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: May 5, 2020
    Assignee: ASM IP Holding B.V.
    Inventors: Seung Ju Chun, Yong Min Yoo, Jong Wan Choi, Young Jae Kim, Sun Ja Kim, Wan Gyu Lim, Yoon Ki Min, Hae Jin Lee, Tae Hee Yoo
  • Patent number: 10622375
    Abstract: A method of processing a substrate by omitting a photolithographic process is disclosed. The method includes forming at least one layer on a stepped structure having an upper surface, a lower surface, and a side surface that connects the upper surface to the lower surface, selectively densifying portions of the at least one layer respectively on the upper surface and the lower surface via asymmetric plasma application, and performing an isotropic etching process on the at least one layer. During the isotropic etching process, the portion of the at least one layer formed on the upper surface is separated from the portion of the at least one layer formed on the lower surface.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: April 14, 2020
    Assignee: ASM IP Holding B.V.
    Inventors: Seung Ju Chun, Yong Min Yoo, Jong Wan Choi, Young Jae Kim, Sun Ja Kim, Wan Gyu Lim, Yoon Ki Min, Hae Jin Lee, Tae Hee Yoo
  • Patent number: 10532660
    Abstract: A cluster for a vehicle may include a center module including a center display unit, and a side module mounted to a side surface of the center module, and including a side display unit and the side module may be removably coupled to the center module.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: January 14, 2020
    Assignee: HYUNDAI MOBIS CO., LTD.
    Inventors: Jong Wan Choi, Hyung Soo Kim, Sang Hun Yoo, Han Tae Kang
  • Patent number: 10381226
    Abstract: A method of processing a substrate to enable selective doping without a photolithography process is provided. The method includes forming a diffusion barrier on the substrate having a patterned structure using plasma deposition method, removing the diffusion barrier except for part of the diffusion barrier using wet etching, forming a diffusion source layer on the patterned structure and the part of the diffusion barrier, and applying energy to the diffusion source layer.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: August 13, 2019
    Assignee: ASM IP Holding B.V.
    Inventors: Yong Min Yoo, Jong Wan Choi, Young Jae Kim, Sun Ja Kim, Wan Gyu Lim
  • Publication number: 20190148398
    Abstract: Provided is a substrate processing method capable of preventing over-etching of a part of a stair-case structure due to an etching solution, when a barrier layer is selectively formed on a VNAND device having the stair-case structure. The substrate processing method includes: alternately stacking a first insulating layer and a second insulating layer; forming a stepped structure having an upper surface, a lower surface, and a side surface connecting the upper surface to the lower surface by etching the first insulating layer and the second insulating layer that are stacked; densifying the stepped structure; forming a barrier layer on the densified second insulating layer; and performing isotropic etching on at least a part of a sacrificial word line structure including the second insulating layer and the barrier layer. During etching the barrier layer at the isotropic etching step, the second insulating layer is not etched or etched a little to an ignorable degree.
    Type: Application
    Filed: July 19, 2018
    Publication date: May 16, 2019
    Inventors: Young Hoon Kim, Jong Wan Choi, Jeong Jun Woo, Tae Hee Yoo
  • Publication number: 20190135110
    Abstract: A cluster for a vehicle may include a center module including a center display unit, and a side module mounted to a side surface of the center module, and including a side display unit and the side module may be removably coupled to the center module.
    Type: Application
    Filed: July 6, 2018
    Publication date: May 9, 2019
    Inventors: Jong Wan CHOI, Hyung Soo KIM, Sang Hun YOO, Han Tae KANG
  • Publication number: 20190081072
    Abstract: A method of processing a substrate by omitting a photolithographic process is disclosed. The method includes forming at least one layer on a stepped structure having an upper surface, a lower surface, and a side surface that connects the upper surface to the lower surface, selectively densifying portions of the at least one layer respectively on the upper surface and the lower surface via asymmetric plasma application, and performing an isotropic etching process on the at least one layer. During the isotropic etching process, the portion of the at least one layer formed on the upper surface is separated from the portion of the at least one layer formed on the lower surface.
    Type: Application
    Filed: November 13, 2018
    Publication date: March 14, 2019
    Inventors: Seung Ju Chun, Yong Min Yoo, Jong Wan Choi, Young Jae Kim, Sun Ja Kim, Wan Gyu Lim, Yoon Ki Min, Hae Jin Lee, Tae Hee Yoo
  • Publication number: 20190035810
    Abstract: A method of processing a substrate by omitting a photolithographic process is disclosed. The method includes forming at least one layer on a stepped structure having an upper surface, a lower surface, and a side surface that connects the upper surface to the lower surface, selectively densifying portions of the at least one layer respectively on the upper surface and the lower surface via asymmetric plasma application, and performing an isotropic etching process on the at least one layer. During the isotropic etching process, the portion of the at least one layer formed on the upper surface is separated from the portion of the at least one layer formed on the lower surface.
    Type: Application
    Filed: September 28, 2018
    Publication date: January 31, 2019
    Inventors: Seung Ju Chun, Yong Min Yoo, Jong Wan Choi, Young Jae Kim, Sun Ja Kim, Wan Gyu Lim, Yoon Ki Min, Hae Jin Lee, Tae Hee Yoo
  • Patent number: 10134757
    Abstract: A method of processing a substrate by omitting a photolithographic process is disclosed. The method includes forming at least one layer on a stepped structure having an upper surface, a lower surface, and a side surface that connects the upper surface to the lower surface, selectively densifying portions of the at least one layer respectively on the upper surface and the lower surface via asymmetric plasma application, and performing an isotropic etching process on the at least one layer. During the isotropic etching process, the portion of the at least one layer formed on the upper surface is separated from the portion of the at least one layer formed on the lower surface.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: November 20, 2018
    Assignee: ASM IP Holding B.V.
    Inventors: Seung Ju Chun, Yong Min Yoo, Jong Wan Choi, Young Jae Kim, Sun Ja Kim, Wan Gyu Lim, Yoon Ki Min, Hae Jin Lee, Tae Hee Yoo
  • Patent number: 10082385
    Abstract: A system for measuring displacement of an accelerating tube by using a micro-alignment telescope, which includes a vacuum chamber; a hollow accelerating tube in the vacuum chamber; a sighting target attached to a surface of the accelerating tube while protruding from the surface of the accelerating tube; the micro-alignment telescope spaced apart from one side surface of the vacuum chamber; a first lens device interposed between the micro-alignment telescope and the vacuum chamber; and a second lens device spaced apart from an opposite side surface of the vacuum chamber by a distance, wherein the vacuum chamber includes first and second viewports placed on the surfaces of the vacuum chamber in correspondence with each other, and the micro-alignment telescope, the first lens device, the first viewport, the sighting target, the second viewport and the second lens device are aligned on a same axis in one direction.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: September 25, 2018
    Assignee: Institute for Basic Science
    Inventors: Min-Ki Lee, Young-Kwon Kim, Yong-Woo Jo, Jong-Wan Choi, Woo-Kang Kim, Hee-Tae Kim
  • Patent number: D871402
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: December 31, 2019
    Assignee: Hyundai Mobis Co., Ltd.
    Inventors: Bong Geun Jeon, Jong Wan Choi, Jin Kyum Kim, Seo Hyun Kim, Jin Kwon, Min Hee Kim, Sang Hun Yoo
  • Patent number: D877144
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: March 3, 2020
    Assignee: HYUNDAI MOBIS CO., LTD.
    Inventors: Bong Geun Jeon, Jong Wan Choi, Jin Kwon, Sang Hun Yoo, Jin Kyum Kim, Seo Hyun Kim, Min Hee Kim
  • Patent number: D897253
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: September 29, 2020
    Assignee: Hyundai Mobis Co., Ltd.
    Inventors: Jong Wan Choi, Hyung Soo Kim
  • Patent number: D899985
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: October 27, 2020
    Assignee: Hyundai Mobis Co., Ltd.
    Inventors: Jong Wan Choi, Hyung Soo Kim
  • Patent number: D906205
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: December 29, 2020
    Assignee: Hyundai Mobis Co., Ltd.
    Inventors: Jong Wan Choi, Jin Ah Kim, Hyung Soo Kim
  • Patent number: D906206
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: December 29, 2020
    Assignee: Hyundai Mobis Co., Ltd.
    Inventors: Jong Wan Choi, Jin Ah Kim, Hyung Soo Kim
  • Patent number: D1015994
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: February 27, 2024
    Assignee: HYUNDAI MOBIS CO., LTD.
    Inventors: Hyung Soo Kim, Jong Wan Choi, Sang Hun Yoo