Patents by Inventor Jong Wang

Jong Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050068938
    Abstract: Disclosed invention is a consumer telephone system (the iCord telephone) that globally extends the range of cordless telephones by using the Internet to securely connect a cordless base station to multiple cordless handsets/phones. An iCord phone user can receive or make PSTN calls on the same iCord base station from anywhere that has Internet connectivity for one's iCord handset. The iCord system can page and carry on a VoIP conversation with any iCord handset registered on the same iCord base station without incurring PSTN telephone call charge. In addition, an iCord handset can simultaneously register and securely connect with multiple iCord base stations over the Internet. Thus an iCord handset user, from anywhere over the Internet, can receive or make PSTN phone calls from, for example, either office, home or friend's iCord base stations with the same iCord handset. Multiple iCord base stations can also set up as a private phone network over the Internet.
    Type: Application
    Filed: September 28, 2003
    Publication date: March 31, 2005
    Applicant: TELECOMMSOFT CORPORATION
    Inventors: Tzyh-Jong Wang, Robert Henrick, Michael Skarzynski
  • Publication number: 20050056885
    Abstract: Semiconductor devices having a dual polysilicon electrode and a method of manufacturing are provided. The semiconductor devices include a first polysilicon layer deposited on a second polysilicon layer. Each polysilicon layer may be doped individually. The method also allows for some semiconductor devices on a wafer to have a single polysilicon wafer and other devices to have a dual polysilicon layer. In one embodiment, the semiconductor devices are utilized to form a memory device wherein the storage capacitors and transistors located in the cell region are formed with a dual polysilicon layer and devices in the periphery region are formed with a single polysilicon layer.
    Type: Application
    Filed: September 15, 2003
    Publication date: March 17, 2005
    Inventors: Chih-Yang Pai, Min-Hsiung Chiang, Chen-Jong Wang, Shou-Gwo Wuu
  • Patent number: 6861804
    Abstract: The cold cathode fluorescent flat lamp includes an enclosure chamber sealed by two reciprocally parallel plates of glass and containing a gas therein, an anode and a cathode disposed in the enclosure chamber, wherein the cathode is parallel to the anode, an auxiliary anode disposed between the anode and the cathode and being parallel to the cathode, wherein the auxiliary anode is attached to a surface of either plates of glass, and a printed circuit board for providing a voltage for the anode and the cathode.
    Type: Grant
    Filed: August 6, 2001
    Date of Patent: March 1, 2005
    Assignee: Optoelectronics, Inc.
    Inventors: Wen-Tsang Liu, Chih-Fang Chen, Lai-Cheng Chen, Ruey-Feng Jean, Jung-Jong Wang
  • Patent number: 6849278
    Abstract: A method for countering oxidization of low density lipoproteins, reducing cholesterol or triglyceride in plasma or inhibiting atherosclerosis comprising administering an effective amount of a Hibiscus sabdariffa extract.
    Type: Grant
    Filed: November 21, 2001
    Date of Patent: February 1, 2005
    Assignee: Universal Biotech Co., Ltd.
    Inventor: Chau-Jong Wang
  • Publication number: 20050003625
    Abstract: A method of controlling the top width of a deep trench. A conductive layer is formed on the trench over a substrate of polysilicon with a recessed structure. An additional layer of amorphous silicon (?-Si) is deposited onto the polysilicon. After subsequent oxidation, the amorphous silicon is converted to SiO2. According to the invention, the top width of a deep trench is controlled, protecting bit lines from sub-threshold leakage.
    Type: Application
    Filed: November 24, 2003
    Publication date: January 6, 2005
    Inventors: Jiann-Jong Wang, Ping Hsu
  • Publication number: 20040241953
    Abstract: A method for controlling the top width of a trench. A conductive layer is formed on the trench over the substrate, forming an interlayer over a part thereof, above the conductive layer. A sacrifice layer is formed on the trench sidewall above the interlayer, and the interlayer is removed to expose the trench sidewall above the conductive layer and the sacrifice layer, such that the exposed trench sidewalls are oxidized. Thus, the sacrifice layer on the trench sidewall reduces the top width of the trench. In the oxidization process, silicon oxide is formed on the sacrifice layer and the exposed trench sidewall, such that upper width of the trench will is not increased during subsequent wet etching.
    Type: Application
    Filed: August 18, 2003
    Publication date: December 2, 2004
    Applicant: Nanya Technology Corporation
    Inventors: Jiann-Jong Wang, Ping Hsu
  • Publication number: 20040194614
    Abstract: A blast-resistant cargo container includes side panels and connecting members. The connecting members are mounted between the adjacent side panels to create a frameless structure of the cargo container. Under ordinary conditions, the structure still has sufficient stiffness for loading goods. When an explosive blast occurs in the cargo container, the structure is flexible and utilizes membrane strength in the entire container structure, whereby the cargo container is capable of withstanding the explosive blast. Bottom perimeter bars are able to be mounted around a bottom surface of the cargo container. Grooves are defined in the perimeter bars and L-shaped flanges are formed on one end of the connecting members. Therefore, by receiving the L-shaped flanges into the grooves, the perimeter bars are securely connected with the side panels.
    Type: Application
    Filed: April 15, 2004
    Publication date: October 7, 2004
    Inventor: Ming-Jong Wang
  • Publication number: 20040011789
    Abstract: An strengthened door for an blast-resistant cargo container includes a door panel horizontally slidably mounted on the cargo container. The door panel has an upper side, a lower side, a first vertical side and a second vertical side each hooked on the cargo container to provide overlapping joints to effectively limit blast damage to the inside of the cargo container and prevent an aircraft from being damaged.
    Type: Application
    Filed: March 28, 2003
    Publication date: January 22, 2004
    Inventors: Ming-Jong Wang, Feng-Ho Wang, Chao-Chyun An, Buh-Shiuh Teng
  • Patent number: 6670664
    Abstract: A random access memory cell and a method for fabrication thereof provide a field effect transistor device laterally adjoining a metal oxide semiconductor capacitor device, each formed within an active region of a semiconductor substrate. Within the random access memory cell and method: (1) a single fluorinated silicon oxide layer of a single thickness serves as both a gate dielectric layer within the field effect transistor device and a capacitor dielectric layer within the metal oxide semiconductor capacitor device; and (2) a channel region within the field effect transistor device has a different threshold voltage adjusting dopant concentration in comparison with a semiconductor plate region within the metal oxide semiconductor capacitor device. The random access memory cell is fabricated with enhanced performance.
    Type: Grant
    Filed: October 22, 2002
    Date of Patent: December 30, 2003
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kuo-Chyuan Tzeng, Dennis J. Sinitsky, Chen-Jong Wang, Wen-Chaun Chiang
  • Publication number: 20030230589
    Abstract: A connection device for use with a blast-resistant container includes a frame with a recess, and a connecting member. An arcuate surface is formed on the outside of the opening of the recess. The connecting member is connected to the frame at one end with a head engaged in the recess and connected to a side panel at the other end. Thus, this connection device can transmit strong membrane force between each two panels of a container and meet the connection requirement of a blast-resistant container. When there is a blast, the connection device is able to confine the blast within the container for that the maximum strain of the plastic hinge in the connecting member can be controlled by the curvature of that arcuate surface formed on the frame.
    Type: Application
    Filed: May 23, 2003
    Publication date: December 18, 2003
    Inventors: Ming-Jong Wang, Chao-Chyun An, Buh-Shiuh Teng, Chuang-Chieh Hsu, Feng-Ho Wang
  • Patent number: 6661049
    Abstract: Within a method for fabricating a capacitor structure, and a capacitor structure fabricated employing the method, there is formed within an isolation region adjoining an active region of a semiconductor substrate a laterally asymmetric trench which leaves exposed an upper sidewall portion of the active region of the semiconductor substrate. There is then formed within the laterally asymmetric trench a capacitor node layer which contacts the exposed upper sidewall portion of the active region of the semiconductor substrate and extends above the active region of the semiconductor substrate. The capacitor may be a storage capacitor with increased capacitance fabricated within a memory cell structure of decreased dimensions.
    Type: Grant
    Filed: September 6, 2001
    Date of Patent: December 9, 2003
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Kuo-Chyuan Tzeng, Chen-Jong Wang, Chung-Wei Chang
  • Patent number: 6661050
    Abstract: Within both a memory cell structure and a method for fabricating the memory cell structure there is employed a storage capacitor formed within a trench adjoining an active region of a semiconductor substrate. Within the memory cell structure and the method for fabrication thereof, both the active region of the semiconductor substrate and the trench are contained within a doped well within the semiconductor substrate.
    Type: Grant
    Filed: March 20, 2002
    Date of Patent: December 9, 2003
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Kuo-Chyuan Tzeng, Chen-Jong Wang, Chung-Wei Chang
  • Patent number: 6638813
    Abstract: A process for forming a composite insulator spacer on the sides of a buried stack capacitor structure, wherein the buried stack capacitor structure is located overlying a portion of an insulator filled, shallow trench isolation (STI) region, has been developed. A thin silicon nitride spacer is first formed on the sides of the completed buried stack capacitor structure, followed by deposition of a silicon oxide layer. An anisotropic dry etch procedure is next employed removing a top portion of the silicon oxide layer, and resulting in a partially defined silicon oxide spacer. A critical wet etch procedure is next used to remove the bottom portion of the silicon oxide layer, defining the final silicon oxide spacer of the composite insulator spacer, now comprised of a silicon oxide spacer on an underlying silicon nitride spacer.
    Type: Grant
    Filed: January 29, 2002
    Date of Patent: October 28, 2003
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Kuo-Chyuan Tzeng, Chen-Jong Wang, Chung-Wei Chang, Wen-Chuan Chiang, Wen-Cheng Chen, Kuo-Ching Huang
  • Publication number: 20030178661
    Abstract: Within both a memory cell structure and a method for fabricating the memory cell structure there is employed a storage capacitor formed within a trench adjoining an active region of a semiconductor substrate. Within the memory cell structure and the method for fabrication thereof, both the active region of the semiconductor substrate and the trench are contained within a doped well within the semiconductor substrate.
    Type: Application
    Filed: March 20, 2002
    Publication date: September 25, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kuo-Chyuan Tzeng, Chen-Jong Wang, Chung-Wei Chang
  • Patent number: 6620679
    Abstract: A high performance 1T RAM cell in a system-on-a-chip is formed using an asymmetric LDD structure that improves pass gate performance and storage node junction leakage. The asymmetric LDD structure is formed using selective ion implantation of the core and I/O LDDs. The node junctions are both pocket implant-free and source/drain implant-free. Further, silicide formation is avoided within the storage node junctions by forming nearly merged sidewall spacers within the node junctions and by forming optional blocking portions over the nearly merged sidewall spacers.
    Type: Grant
    Filed: August 20, 2002
    Date of Patent: September 16, 2003
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Kuo-Chyuan Tzeng, Chen-Jong Wang, Dennis J. Sinitsky
  • Patent number: 6613690
    Abstract: A process for forming a buried stack capacitor structure in a recessed region of a shallow trench isolation (STI) region, has been developed. The process features a unique sequence of procedures eliminating possible polysilicon stringers or residuals which if left remaining would result in leakage or shorts between conductive elements. The unique sequence of procedures include: deposition of a silicon oxide layer on the polysilicon layer from which the storage node structure will be defined from; photoresist plugs used to protect the portions of the silicon oxide and the underlying polysilicon layer located in the recessed region, during definition of the polysilicon storage node structure; and definition of the polysilicon storage node structure via a wet etch procedure, using the silicon oxide layer for protection of the underlying polysilicon storage node structure.
    Type: Grant
    Filed: July 17, 2002
    Date of Patent: September 2, 2003
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chung-Wei Chang, Kuo-Chyuan Tzeng, Chen-Jong Wang, Min-Hsiang Chiang, Chi-Hsing Lo
  • Patent number: 6601964
    Abstract: A lamp comprising a readable disk and a socket. The readable disk includes a readable surface for retrieving recorded data and a light-emitting surface provided with a plurality of conductive terminals. The socket includes a body having a lengthwise slot for receiving a readable disk, a plug and a plurality of solder bumps placed in the slot to be electrically connected with a plug. When the readable disk is inserted into the slot, the plurality of conductive terminals and solder bumps are conducted to excite the readable disk to luminescent.
    Type: Grant
    Filed: March 14, 2001
    Date of Patent: August 5, 2003
    Assignee: Ritek Corporation
    Inventors: Shaw-Jong Wang, Joseph Shen, Chien-Hua Wu, Charen Yu
  • Publication number: 20030106414
    Abstract: A blast-resistant cargo container includes side panels and connecting members. The connecting members are mounted between the adjacent side panels to create a non-framed structure of the cargo container. Under ordinary conditions, the structure still has sufficient stiffness for loading goods. When an explosive blast occurs in the cargo container, the structure is flexible and utilizes membrane strength in the entire container structure, whereby the cargo container is capable of withstanding the explosive blast. Extruded bars can also be mounted around a bottom surface of the cargo container grooves are defined in the extruded bars and L-shaped flanges are formed on edges of the vertical side panels. Therefore, by receiving the L-shaped flanges into the grooves, the extruded bars are securely connected with the side panels.
    Type: Application
    Filed: September 5, 2002
    Publication date: June 12, 2003
    Inventor: Ming-Jong Wang
  • Publication number: 20030096021
    Abstract: A method for countering oxidization of low density lipoproteins, reducing cholesterol or triglyceride in plasma or inhibiting atherosclerosis comprising administering an effective amount of a Hibiscus sabdariffa extract.
    Type: Application
    Filed: November 21, 2001
    Publication date: May 22, 2003
    Inventor: Chau-Jong Wang
  • Patent number: 6561671
    Abstract: The present invention discloses a case with a vibration-activated light emitting indication apparatus comprising a case and a light emitting indication apparatus. The light emitting indication apparatus includes an indicator plate, which is transparent and contains a pattern, including, for example, a logo, characters, and drawings; an electroluminescent laminate; a power supply, which powers the electroluminescent laminate; a vibration sensor IC, which senses the vibration caused by an external act of pressing or shaking on the case, and then controls an inverter to activate the electroluminescent laminate. The above-mentioned case can be a container with a cover, such as a DVD case, a watch box, a jewelry box and any other cases. The pattern on the transparent indicator plate can be highlighted by the light emitted from the electroluminescent laminate, achieving a vivid image such that the case is elaborately ornamented.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: May 13, 2003
    Assignee: Ritek Corporation
    Inventors: Shaw-Jong Wang, Joseph Shen, Chien-Hua Wu, Charen Yu