Abstract: The present disclosure provides a pump including a housing having a shaft hole, a membrane assembly disposed inside the housing, and a shaft assembly mounted on the housing. The shaft assembly includes a shaft inserted into the shaft hole, and a sealing member disposed on an end portion of the shaft and having a plurality of contact regions on an inner surface of the housing along a longitudinal direction of the shaft.

Abstract: An electrode includes a unit body stack part formed by stacking at least one basic unit having a four-layer structure in which a first electrode, a first separator, a second electrode and a second separator are sequentially stacked. Each surface of the first separator and the second separator is coated with a coating material having adhesiveness, and the basic unit adheres to an adjacent radial unit in the unit body stack part. The electrode assembly of allows a heating and pressing process to be performed prior to a primary formation process so that a separator of one basic unit and a first electrode of the other basic unit to be adhered and fixed by a coating material coated on the separator, and thus a bending phenomenon caused by a difference in electrode expansion rates in a charging/discharging process is prevented.

Abstract: A semiconductor device includes a cell semiconductor pattern disposed on a semiconductor substrate. A semiconductor dummy pattern is disposed on the semiconductor substrate. The semiconductor dummy pattern is co-planar with the cell semiconductor pattern. A first circuit is disposed between the semiconductor substrate and the cell semiconductor pattern. A first interconnection structure is disposed between the semiconductor substrate and the cell semiconductor pattern. A first dummy structure is disposed between the semiconductor substrate and the cell semiconductor pattern. Part of the first dummy structure is co-planar with part of the first interconnection structure. A second dummy structure not overlapping the cell semiconductor pattern is disposed on the semiconductor substrate. Part of the second dummy structure is co-planar with part of the first interconnection structure.

Abstract: An apparatus for inspecting defects of a secondary battery having a pair of pressing jigs which press an outer surface of an electrode or a pouch accommodating the electrode assembly in directions corresponding to each other and on which a plurality of protrusions protrude from pressing surfaces and a measurement unit measuring one or more of current, a voltage, and resistance of the electrode assembly when the electrode assembly is pressed by the plurality of protrusions of the pair of pressing jigs is provided.

Abstract: Disclosed is a semiconductor memory device comprising a second substrate on a first substrate and including a lower semiconductor layer and an upper semiconductor layer on the lower semiconductor layer, an electrode structure on the upper semiconductor layer and including a plurality of stacked electrodes, a vertical channel structure that penetrates the electrode structure and is connected to the second substrate, an interlayer dielectric layer that covers the electrode structure, and a cutting structure that penetrates the interlayer dielectric layer and the upper semiconductor layer. The upper semiconductor layer has a first sidewall defined by the cutting structure. The lower semiconductor layer has a second sidewall adjacent to the first sidewall. The first sidewall and the second sidewall are horizontally offset from each other.

Abstract: A semiconductor memory device with improved reliability and a related method are provided. The semiconductor memory device includes a mold structure including a plurality of gate electrodes and a plurality of mold insulating films on a first substrate, a channel structure penetrating the mold structure and crossing a respective level of each of the gate electrodes, a plurality of first insulating patterns in the mold structure, the first insulating patterns including a material different from that of the mold insulating films, and a first through via in the first insulating patterns, the first through via penetrating the first substrate and the mold structure. The gate electrodes include a first word line and a second word line on the first word line. A first distance from the first word line to the first through via is different from a second distance from the second word line to the first through via.

Abstract: Devices included in a wireless neural interface system are disclosed.

Abstract: The present disclosure relates to a pharmaceutical composition for preventing or treating an inflammatory disease, comprising a benzofuran-based N-acylhydrazone compound, a stereoisomer thereof, or a pharmaceutically acceptable salt thereof. The benzofuran-based N-acylhydrazone compound according to the present disclosure inhibits the activity of NF-?B, which is a major signal transmitter in the inflammatory response, thereby disrupting the initial pathway and process of the biological inflammatory response system and inhibiting inflammatory immune cells and inflammatory cytokines, and thus can prevent and treat various pathological diseases caused by the inflammatory response.

Abstract: A three-dimensional semiconductor device includes a first gate group on a lower structure and a second gate group on the first gate group. The first gate group includes first pad regions that are: (1) lowered in a first direction that is parallel to an upper surface of the lower structure and (2) raised in a second direction that is parallel to an upper surface of the lower structure and perpendicular to the first direction. The second gate group includes second pad regions that are sequentially raised in the first direction and raised in the second direction.

Abstract: An embodiment discloses an ultraviolet light emitting element including: a light emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer, an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer, and an etched region in which the first conductive semiconductor layer is exposed; a first insulating layer disposed on the light emitting structure and including a first hole which exposes a portion of the etched region; a first electrode electrically connected to the first conductive semiconductor layer; and a second electrode electrically connected to the second conductive semiconductor layer, wherein the light emitting structure includes an intermediate layer regrown on the first conductive semiconductor layer exposed in the first hole, the first electrode is disposed on the intermediate layer, the etched region includes a first etched region disposed at an inner side and a second etched region disp

Abstract: A charging station recommendation device and a method therefor include a data collection device that collects real-time information of at least one charging station and real-time information of at least one vehicle associated with the at least one charging station, a data processing device that generates charging information including a congestion of the at least one charging station, based on the real-time information of the at least one charging station and the real-time information of the at least one vehicle, a data storage storing the charging information of the at least one charging station, and a data application device that recommends an optimal charging station among the at least one charging station to a host vehicle, based on the charging information of the at least one charging station, which is stored in the data storage.

Abstract: A nonvolatile memory device including a substrate extending in a first direction, a ground selection line extending in the first direction on the substrate, a plurality of word lines stacked sequentially on the ground selection line and extending in the first direction, a landing pad spaced apart from the ground selection line and the plurality of word lines in the first direction, a rear contact plug connected to a lower face of the landing pad and extending in a second direction intersecting the first direction, a front contact plug connected to an upper face of the landing pad opposite the lower face and extending in the second direction, an input/output pad electrically connected to the rear contact plug, and an upper bonding pad electrically connected to the front contact plug and connected to at least a part of a plurality of circuit elements of the nonvolatile memory device.

Abstract: A device for charging and discharging a battery cell capable of suppressing a swelling phenomenon of a terrace portion of a battery cell during a formation process of the battery cell includes first and second plates configured to receive a battery cell therebetween and to press two surfaces of the battery cell; first and second grippers connected to the first and second plates, respectively, the first and second grippers protrude to face each other and configured to contact a lead region of the battery cell; and first and second pressing pads positioned inward of the first and second grippers, the first and second pressing pads being configured to contact a terrace region of the battery cell. A method of charging and discharging a battery cell using the same is also provided.

Abstract: A nonvolatile memory device includes an upper insulating layer. A first substrate is on the upper insulating layer. An upper interlayer insulating layer is on the first substrate. A plurality of word lines is stacked on the first substrate in a first direction and extends through a partial portion of the upper interlayer insulating layer. A lower interlayer insulating layer is on the upper interlayer insulating layer. A second substrate is on the lower interlayer insulating layer. A lower insulating layer is on the second substrate. A dummy pattern is composed of dummy material. The dummy pattern is disposed in a trench formed in at least one of the first and second substrates. The trench is formed on at least one of a surface where the upper insulating layer meets the first substrate, and a surface where the lower insulating layer meets the second substrate.

Abstract: The nonvolatile memory device includes a substrate including a first surface and a second surface opposite to the first surface in a first direction; a common source line on the first surface of the substrate; a plurality of word lines stacked on the common source line; a first insulating pattern spaced apart from the plurality of word lines in a second direction crossing the first direction, and in the substrate; an insulating layer on the second surface of the substrate; a first contact plug penetrating the first insulating pattern and extending in the first direction; a second contact plug penetrating the insulating layer, extending in the first direction, and connected to the first contact plug; an upper bonding metal connected to the first contact plug and connected to a circuit element; and a first input/output pad connected to the second contact plug and electrically connected to the circuit element.

Abstract: An embodiment discloses an ultraviolet light-emitting device including: a light-emitting structure including a plurality of light-emitting portions disposed on a first conductive type semiconductor layer, the plurality of light-emitting portions including an active layer and a second conductive type semiconductor layer; a first contact electrode disposed on the first conductive type semiconductor layer; a second contact electrode disposed on the second conductive type semiconductor layer; a first cover electrode disposed on the first contact electrode; and a second cover electrode disposed on the second contact electrode, wherein the light-emitting structure includes an intermediate layer formed in an etched region through which the first conductive type semiconductor layer is exposed, the intermediate layer including a lower composition of aluminum than the first conductive type semiconductor layer, wherein the intermediate layer includes a first intermediate region disposed between the plurality of light-em

Abstract: An integrated circuit is provided which includes a physically unclonable function (PUF). The integrated circuit comprises a PUF block including a plurality of physically unclonable function (PUF) cells configured to output a cell signal having a unique value according to an input, a conversion unit is configured to receive the cell signal as input, convert the cell signal, and output a conversion signal. A select signal generator provides a first selection signal to the conversion unit. A key generator is configured to receive the conversion signal from the conversion unit and generate a security key therefrom, wherein the conversion unit includes a first layer which outputs a second signal obtained by converting a provided first signal on the basis of a bit value of the first selection signal.

Abstract: Disclosed herein is a percutaneous catheter apparatus, comprising two nested needles; and an inner plunger; which is guided as a catheter to the tissue surrounding a hard implant to actuate and deploy a pair of sharp-tip needle-forceps that perform two concentric cuts, circularly spaced 90-degree apart from each other, to complete a 360 degree bore around the implant before squeezing to arrest and extract the implant, together with its surrounding tissue.

Abstract: An embodiment discloses an ultraviolet light emitting element including: a light emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer, an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer, and an etched region in which the first conductive semiconductor layer is exposed; a first insulating layer disposed on the light emitting structure and including a first hole which exposes a portion of the etched region; a first electrode electrically connected to the first conductive semiconductor layer; and a second electrode electrically connected to the second conductive semiconductor layer, wherein the light emitting structure includes an intermediate layer regrown on the first conductive semiconductor layer exposed in the first hole, the first electrode is disposed on the intermediate layer, the etched region includes a first etched region disposed at an inner side and a second etched region disp

Abstract: The present invention relates to a method for manufacturing a secondary battery and an apparatus for manufacturing a secondary battery. The method for manufacturing the secondary battery according to the present invention comprises: an accommodation process of accommodating an electrode assembly, in which electrodes and separators are alternately stacked, an electrolyte, and one side portion of electrode leads connected to the electrodes, in a pouch to form a cell; an activation process of charging the cell to activate the cell; a pressing process of sequentially pressing the cell through pressing rolls after the activation process to press the cell; and a degassing process of discharging an internal gas of the cell to the outside after the pressing process.