Patents by Inventor Joon Yang

Joon Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050219408
    Abstract: An apparatus to suppress artifacts in an image signal. The apparatus includes a differential value calculation unit to calculate a differential value between adjacent pixels with respect to an input image signal, a diffusion amount calculation unit to calculate an amount of diffusion between the adjacent pixels on the basis of the differential value calculated by the differential value calculation unit, and a pixel value conversion unit to convert the present pixel value of the image signal inputted on the basis of the diffusion amount between the pixels calculated by the diffusion amount calculation unit. The apparatus changes the pixel value in consideration of the differential value between the adjacent pixels, and thus it can provide a high quality image signal without losing or misrecognizing the artifacts of the image signal.
    Type: Application
    Filed: October 15, 2004
    Publication date: October 6, 2005
    Inventors: Seung-joon Yang, Young-jin Kwon
  • Publication number: 20050207940
    Abstract: Apparatus and Methods are provided for a microfabricated fluorescence activated cell sorter based on an optical switch for rapid, active control of cell routing through a microfluidic channel network. This sorter enables low-stress, highly efficient sorting of populations of small numbers of cells (i.e., 1000-100,000 cells). The invention includes packaging of the microfluidic channel network in a self-contained plastic cartridge that enables microfluidic channel network to macro-scale instrument interconnect, in a sterile, disposable format.
    Type: Application
    Filed: August 27, 2004
    Publication date: September 22, 2005
    Inventors: William Butler, Mirianas Chachisvilis, Robert Dees, Norbert Hagen, Philippe Marchand, Daniel Raymond, Eugene Tu, Mark Wang, Joon Yang, Rong Yang, Haichuan Zhang
  • Publication number: 20050140869
    Abstract: A CMOS-TFT array substrate and a method for fabricating the same is disclosed, by a low-mask technology to decrease the usage count of masks, which includes a substrate comprising an active area having a plurality of pixel regions and a driving circuit area for driving the active area, each pixel region having a transmitting part and a reflective part; a first semiconductor layer having first source/drain regions formed in the pixel region; a second semiconductor layer having second source/drain regions formed in the driving circuit area; a gate insulating layer on an entire surface of the substrate including the first and second semiconductor layers; first and second gate electrodes on the gate insulating layer above the first and second semiconductor layers; a storage electrode in the pixel region; an insulating interlayer on the entire surface of the substrate; a transmitting electrode on the insulating interlayer of the transmitting part; a passivation layer on the entire surface of the substrate includin
    Type: Application
    Filed: October 18, 2004
    Publication date: June 30, 2005
    Inventors: Joon Yang, Yong Park, Sang Jang, Su Choi, Sang Kim
  • Publication number: 20050134752
    Abstract: An LCD device and a fabrication method having a reduced number of masks and simplified fabrication processes. The method includes providing a substrate, forming an active pattern on the substrate, forming a first insulating layer on the substrate, forming a gate electrode and a pixel electrode on the substrate, forming a second insulating layer provided with a contract hole on the substrate, and forming source and drain electrodes respectively connected to a source region and a drain region through the contact hole.
    Type: Application
    Filed: June 29, 2004
    Publication date: June 23, 2005
    Inventors: Joon Yang, Yong Park, Sang Kim
  • Publication number: 20050134755
    Abstract: A method of fabricating a liquid crystal display device includes forming an active pattern and a data line on a substrate, forming a first insulating layer on the data line, forming a second insulating layer on the substrate, forming a gate electrode on the second insulating layer above the active pattern, forming a third insulating layer on the substrate, forming first and second contact holes through the second and third insulating layers to expose first and second portions of the active pattern, and forming a third contact hole through the first, second, and third insulating layers exposing a portion of the data line, respectively, and forming source and drain electrodes on the third insulating layer, the source electrode connected to the first exposed portion of the active pattern through the first contact hole and connected to the first exposed portion of the data line through the third contact hole, and the drain electrode connected to the second exposed portion of the active pattern through the second
    Type: Application
    Filed: June 29, 2004
    Publication date: June 23, 2005
    Inventors: Joon Yang, Yong Park, Sang Kim
  • Publication number: 20050133791
    Abstract: A TFT array substrate includes a substrate, seminconductor layers, a gate insulating layer, a storage electrode, and a passivation layer. The semiconductor layers that include a first, a second, and a third semiconductor layer positioned above the substrate. The gate insulating layer separates the first semiconductor layer from the second semiconductor layer and the second semiconductor layer from the third seminconductor layer. The storage electrode is positioned above the gate insulating layer and a passivation layer directly encloses a top and a plurality of side surfaces of the storage electrode. A method of making a TFT array substrate includes providing the first semiconductor layer with first source/drain regions, providing the second semiconductor layer with a storage layer, and providing the third semiconductor layer with second source/drain regions between the substrate and the gate insulating layer.
    Type: Application
    Filed: June 29, 2004
    Publication date: June 23, 2005
    Inventor: Joon Yang
  • Publication number: 20050134754
    Abstract: A method of fabricating a liquid crystal display device includes forming a first active layer on a substrate, forming a first gate insulating film on the first active layer, forming a first gate electrode on the first gate insulating film, forming a first interlayer insulating layer on the first gate electrode, forming a pixel electrode on the first interlayer insulating layer, forming at least one insulating film to cover the pixel electrode, forming a first plurality of contact holes in the first interlayer insulating layer and the at least one insulating film, the first plurality of contact holes including a first source contact hole to expose a first source area of the first active layer and a first drain contact hole to expose a first drain area of the first active layer, forming a pixel contact hole in the at least one insulating film to expose the pixel electrode, performing a hydrogenating treatment to the substrate including the first source contact hole, the first drain contact hole, and the pixel c
    Type: Application
    Filed: June 28, 2004
    Publication date: June 23, 2005
    Inventors: Joon Yang, Yong Park, Sang Kim
  • Publication number: 20050134756
    Abstract: A method of fabricating a liquid crystal display device includes forming an active pattern on a substrate, forming a first insulating layer on the substrate over the active pattern, forming a gate line including a gate electrode and a data line on the substrate, the data line including a plurality of segmented portions electrically disconnected from each other, forming source and drain regions in the active pattern, forming a second insulating layer on the first insulating layer, the gate line, and the data line, simultaneously forming a pair of first contact holes through the first and second insulating layers, a second contact hole through the second insulating layer, and a pair of third contact holes through the second insulating layer, forming a conductive material along an entire surface of the substrate, and patterning the conductive material to form a drain electrode, a first connection line, and a second connection line on the second insulating layer.
    Type: Application
    Filed: June 29, 2004
    Publication date: June 23, 2005
    Inventors: Joon Yang, Yong Park, Sang Kim
  • Publication number: 20050110902
    Abstract: A de-interlacing apparatus with a noise reduction/removal device. The noise reduction/removal device can include a motion prediction unit that predicts motion vectors between an image one period ahead of a previous image and a current image with respect to individual images which are sequentially inputted; a motion checking unit that applies the motion vectors predicted by the motion prediction unit to the image one period ahead of the previous image and two different images ahead of the current image in time, and checks whether the motion vectors are precise motion vectors; a motion compensation unit that compensates for motions in use of the motion vectors checked for preciseness thereof by the motion checking unit; and a noise removal unit that removes noise on images using the motion-compensated images by the motion compensation unit and the inputted images. Accordingly, the noise reduction/removal device can reduce or remove noise through simple procedures on noise-bearing images.
    Type: Application
    Filed: July 29, 2004
    Publication date: May 26, 2005
    Inventor: Seung-joon Yang
  • Publication number: 20050111055
    Abstract: An apparatus and method of image sharpness enhancement. The apparatus includes a slope value calculator to set in an input video signal a window of a predetermined size with reference to a current pixel, and to calculate a slope value based on pixel values within the window, a gain calculator to calculate a gain corresponding to the magnitude of the slope value, a differential value calculator to calculate a differential value which is a difference between pixel values of the current pixel and other pixels within the window, a diffusivity calculator to calculate the diffusivity between the pixels corresponding to the magnitude of the differential value, a diffusivity summer to assign a predetermined weight to the diffusivities between the pixels and to calculate the sum of the diffusivities; and a pixel value converter to multiply the sum of the diffusivities by the gain and to add the multiplied result to the current pixel value.
    Type: Application
    Filed: November 12, 2004
    Publication date: May 26, 2005
    Inventors: Seung-joon Yang, Young-jin Kwon
  • Publication number: 20050105826
    Abstract: An edge detection apparatus and method includes a mapping part to map a two-dimensional plane of an input image into a three-dimensional vector surface, a coefficient calculation part to calculate coefficients for an equation of planes each formed with plural pixels and mapped by the mapping part, an angle calculation part to calculate an angle formed by a normal vector with respect to the equation of planes, and an edge decision part to determine whether an edge exists based on the angle calculated by the angle calculation part. Accordingly, the edge detection apparatus can not only efficiently detect edges without sensitivity to noise over high frequency bands, but also adaptively perform edge detections depending on the extent of noise so as to provide diverse adjustment points for the edge detections.
    Type: Application
    Filed: August 27, 2004
    Publication date: May 19, 2005
    Inventors: Seong-joon Yang, Hwa-sup Lim, Young-ho Lee
  • Patent number: 6895361
    Abstract: An adaptive motion estimation apparatus and method. A full search motion estimation part obtains a motion vector from all blocks in a predetermined search range based on a current frame and/or field and a reference frame and/or field and a prediction motion estimation part estimates a motion vector from ambient blocks about a block in which a candidate motion vector is estimated. A motion vector selection part determines a motion vector having a position value of a smallest error in comparison with a stored threshold value among the obtained and estimated motion vectors as a final motion vector. Since the full search motion estimation algorithm and the prediction motion estimation algorithm are adaptively selected, a smooth and correct motion vector reflecting an actual motion is obtainable.
    Type: Grant
    Filed: February 20, 2003
    Date of Patent: May 17, 2005
    Assignee: Samsung Electronics, Co., Ltd.
    Inventor: Seung-Joon Yang
  • Patent number: D509819
    Type: Grant
    Filed: July 1, 2004
    Date of Patent: September 20, 2005
    Assignee: Reigncom Ltd.
    Inventor: Deok-Joon Yang
  • Patent number: D509833
    Type: Grant
    Filed: July 1, 2004
    Date of Patent: September 20, 2005
    Assignee: Reigncom Ltd.
    Inventor: Deok-Joon Yang
  • Patent number: D510081
    Type: Grant
    Filed: July 1, 2004
    Date of Patent: September 27, 2005
    Assignee: Reigncom Ltd.
    Inventor: Deok-Joon Yang
  • Patent number: D511512
    Type: Grant
    Filed: October 17, 2003
    Date of Patent: November 15, 2005
    Assignee: Reigncom Ltd.
    Inventor: Deok Joon Yang
  • Patent number: D511528
    Type: Grant
    Filed: July 1, 2004
    Date of Patent: November 15, 2005
    Assignee: Reigncom Ltd.
    Inventor: Deok-Joon Yang
  • Patent number: D512403
    Type: Grant
    Filed: July 1, 2004
    Date of Patent: December 6, 2005
    Assignee: Reigncom Ltd.
    Inventor: Deok-Joon Yang
  • Patent number: D512404
    Type: Grant
    Filed: July 1, 2004
    Date of Patent: December 6, 2005
    Assignee: Reigncom Ltd.
    Inventor: Deok-Joon Yang
  • Patent number: D512435
    Type: Grant
    Filed: July 1, 2004
    Date of Patent: December 6, 2005
    Assignee: Reigncom Ltd.
    Inventor: Deok-Joon Yang