Patents by Inventor Joseph Fjelstad

Joseph Fjelstad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020029902
    Abstract: A microelectronic assembly includes a component having one or more conductive pads, with each conductive pad having a plurality of solder-wettable strips extending outwardly away from a center, the solder wettable strips being bounded by non solder-wettable material. The microelectronic assembly also includes a composite conductive element positioned atop at least one of the conductive pads, the composite conductive element including a solid conductive core and a layer of solder material overlying the solid conductive core, the solid conductive core having a higher melting temperature than the layer of solder material.
    Type: Application
    Filed: September 13, 2001
    Publication date: March 14, 2002
    Inventors: Thomas H. DiStefano, Joseph Fjelstad
  • Publication number: 20020017702
    Abstract: A method of making resistors includes providing a sacrificial layer. Conductive material is then formed over a region of the sacrificial layer. Resistive material is then deposited over the first surface of the sacrificial layer such that the resistive material covers the sacrificial layer and the conductive material. A portion of the sacrificial layer is then removed to expose the conductive material. A method of making resistors includes the steps of providing a sacrificial layer, removing at least a portion of the sacrificial layer from regions of the sacrificial layer so as to create a plurality of cavities within the sacrificial layer, plating said cavities with a conductive material, disposing resistive material over the first surface of the sacrificial layer such that resistive material covers the sacrificial layer and said conductive material, and removing at least a portion of said sacrificial layer to expose the conductive material.
    Type: Application
    Filed: September 12, 2001
    Publication date: February 14, 2002
    Inventor: Joseph Fjelstad
  • Publication number: 20020009827
    Abstract: Electrically conductive elements such as terminals and leads are held on a support structure by a degradable connecting layer such as a adhesive degradable by heat or radiant energy. After connecting these elements to a microelectronic element such as a chip or wafer, the conductive elements are released from the support structure by degrading the connecting layer. The support structure desirably has a predictable, isotropic coefficient of thermal expansion and such coefficient of thermal expansion may be close to that of silicon to minimize the effect of the temperature changes. The conductive elements may be mounted on a plurality of individual tiles rather than on an unitary sheet covering an entire wafer to minimize dimensional changes when the dielectric is released from the support structure.
    Type: Application
    Filed: September 24, 2001
    Publication date: January 24, 2002
    Inventors: Masud Beroz, Joseph Fjelstad, Belgacem Haba, Christopher M. Pickett, John Smith
  • Publication number: 20020009860
    Abstract: A method of making resistors includes providing a sacrificial layer. Conductive material is then formed over a region of the sacrificial layer. Resistive material is then deposited over the first surface of the sacrificial layer such that the resistive material covers the sacrificial layer and the conductive material. A portion of the sacrificial layer is then removed to expose the conductive material. A method of making resistors includes the steps of providing a sacrificial layer, removing at least a portion of the sacrificial layer from regions of the sacrificial layer so as to create a plurality of cavities within the sacrificial layer, plating said cavities with a conductive material, disposing resistive material over the first surface of the sacrificial layer such that resistive material covers the sacrificial layer and said conductive material, and removing at least a portion of said sacrificial layer to expose the conductive material.
    Type: Application
    Filed: December 7, 2000
    Publication date: January 24, 2002
    Inventor: Joseph Fjelstad
  • Publication number: 20020008966
    Abstract: Microelectronic contacts, such as flexible, tab-like, cantilever contacts, are provided with asperities disposed in a regular pattern. Each asperity has a sharp feature at its tip remote from the surface of the contact. As mating microelectronic elements are engaged with the contacts, a wiping action causes the sharp features of the asperities to scrape the mating element, so as to provide effective electrical interconnection and, optionally, effective metallurgical bonding between the contact and the mating element upon activation of a bonding material.
    Type: Application
    Filed: January 2, 2001
    Publication date: January 24, 2002
    Inventors: Joseph Fjelstad, John W. Smith, Thomas H. Distefano, James Zaccardi, A. Christian Walton
  • Publication number: 20020000815
    Abstract: A probe card for testing electronic elements includes a layer of dielectric material provided with a plurality of cavities supported on a substrate. A mass of fusible conductive material having a melting temperature below about 150° C. is disposed in each of said cavities, the dielectric material electrically insulating the masses of fusible conductive material from one another. A probe tip of conductive material having a melting temperature greater than about 150° C. is provided at one common end of each of the masses of fusible conductive material. The probe contacts are separated from an adjacent probe contact by at least one channel formed with the layer of dielectric material.
    Type: Application
    Filed: February 27, 2001
    Publication date: January 3, 2002
    Inventors: Joseph Fjelstad, John W. Smith
  • Publication number: 20020001869
    Abstract: A method of making a microelectronic package includes providing a sacrificial layer having a first surface and providing an optoelectronic element having a front face including one or more contacts and a rear surface and securing the rear surface of the optoelectronic element over the first surface of the sacrificial layer. The one or more contacts are then electrically interconnected with one or more conductive pads on the sacrificial layer and a curable and at least partially transparent encapsulant is provided over the first surface of the sacrificial layer so as to encapsulate the optoelectronic element and the conductive pads. The encapsulant is then cured the sacrificial layer is at least partially removed so as to leave said one or more conductive pads on a bottom surface of the encapsulant, the bottom surface of the encapsulant defining the bottom of the package.
    Type: Application
    Filed: February 18, 1998
    Publication date: January 3, 2002
    Inventor: JOSEPH FJELSTAD
  • Patent number: 6329607
    Abstract: A microelectronic connection component has flexible leads formed by polymeric strips with metallic conductors thereon. The metallic conductors may be very thin, desirably less than 5 microns thick, and provide good fatigue resistance. Each strip may have two conductors thereon, one serving as a principal or signal conductor for connection to a contact on a chip or other microelectronic element and the other serving as potential reference or ground conductor. The potential reference conductor on the lead provides enhanced resistance to crosstalk.
    Type: Grant
    Filed: September 18, 1996
    Date of Patent: December 11, 2001
    Assignee: Tessera, Inc.
    Inventors: Joseph Fjelstad, John W. Smith
  • Publication number: 20010048591
    Abstract: A connection component is provided. The connection component includes (1) a first interposer having a first surface to which a microelectronic may be mounted and a second surface opposite from the first surface, (2) a second interposer that is more flexible than the first interposer and that is disposed under the second surface of the rigid interposer, and (3) a plurality of conductive parts that may be positioned in the first and second interposers and that may be exposed at the first surface of the first interposer, a bottom surface of the second interposer, or both the first and bottom surfaces. The electrically conductive parts may include leads. A socket assembly or a microelectronic element such as semiconductor chip may be mounted onto the first surface of the rigid interposer. The connection component may be mounted onto a support substrate.
    Type: Application
    Filed: January 26, 2001
    Publication date: December 6, 2001
    Inventors: Joseph Fjelstad, John Myers
  • Patent number: 6324754
    Abstract: Solder pads for microelectronic connections are formed with a set of solder-wettable strips extending radially outwardly from a central point. A solid core solder ball is positioned on each pad and reflowed. The pad configuration helps to center the solder ball and keeps the solder ball down in the desired position thereby minimizing variations in height of the resulting solder bumps. Also, the solder pad may include non-wettable surfaces defined by a non-wettable metal, a metal compound or a dielectric material. The non-wettable areas on the pad confine the solder and avoid the need for a separate solder mask.
    Type: Grant
    Filed: March 25, 1998
    Date of Patent: December 4, 2001
    Assignee: Tessera, Inc.
    Inventors: Thomas H. DiStefano, Joseph Fjelstad
  • Patent number: 6317974
    Abstract: A method of making a contact having a wear resistant edge by forming a photoresist layer on a copper clad polyimide composite structure, patterning the photoresist layer to expose a portion of the copper; etching the copper to form a contact and/or contact tabs having etched edges, and plating a wear resistant material on the etched edges. After the photoresist layer is stripped, the top portion of the contact and/or contact tabs are etched to height that is below the height of the wear resistant edge.
    Type: Grant
    Filed: October 8, 1998
    Date of Patent: November 20, 2001
    Assignee: Tessera, Inc.
    Inventor: Joseph Fjelstad
  • Patent number: 6307260
    Abstract: A structure including a conductive, preferably metallic conductive layer is provided with leads on a bottom surface. The leads have fixed ends permanently attached to the structure and free ends detachable from the structure. The structure is engaged with a microelectronic element such as a semiconductor chip or wafer, the free ends of the leads are bonded to the microelectronic element, and the leads are bent by moving the structure relative to the microelectronic element. Portions of the conductive layer are removed, leaving residual portions of the conductive layer as separate electrical terminals connected to at least some of the leads. The conductive layer mechanically stabilizes the structure before bonding, and facilitates precise registration of the leads with the microelectronic element. After the conductive layer is converted to separate terminals, it does not impair free movement of the terminals relative to the microelectronic element.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: October 23, 2001
    Assignee: Tessera, Inc.
    Inventors: John W. Smith, Joseph Fjelstad
  • Patent number: 6294830
    Abstract: A microelectronic assembly includes a microelectronic element having a front face including contacts and a back surface remote therefrom, and a mass of a dielectric material at least partially encapsulating the microelectronic element so that the encapsulated microelectronic element forms a body having exterior surfaces, whereby the back surface of the microelectronic element is exposed at an exterior surface of the body. The microelectronic assembly also includes conductive units secured to the mass of dielectric material, the units including bottom flange portions overlying a surface of the body, top flange portions remote from the bottom flange portions and posts extending from the flange portions into the body, the bottom and top flange portions having larger cross-sectional dimensions than the posts, and conductive elements extending through the mass of dielectric material, the conductive elements electrically interconnecting the contacts with the conductive units.
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: September 25, 2001
    Assignee: Tessera, Inc.
    Inventor: Joseph Fjelstad
  • Patent number: 6284563
    Abstract: A method of making a compliant microelectronic assembly includes providing a microelectronic element having a first surface, the first surface having a central region and a peripheral region surrounding the central region, the microelectronic element including a plurality of contacts disposed in the central region and providing a compliant layer over the peripheral region of the first surface, the compliant layer having a bottom surface facing toward the first surface of the microelectronic element, a top surface facing upwardly away from the microelectronic element and one or more edge surfaces extending between the top and bottom surfaces. Next, flexible bond ribbons are selectively formed over the compliant layer so that the bond ribbons extend over the top surface and one or more of the edge surfaces and the bond ribbons electrically connect the contacts to conductive terminals overlying the top surface of the compliant layer.
    Type: Grant
    Filed: May 1, 1998
    Date of Patent: September 4, 2001
    Assignee: Tessera, Inc.
    Inventor: Joseph Fjelstad
  • Patent number: 6274820
    Abstract: An interposer for interconnection between microelectronic circuit panels has contacts at its surfaces. Each contact has a central axis normal to the surface and a peripheral portion adapted to expand radially outwardly from the central axis responsive to a force applied by a pad on the engaged circuit panel. Thus, when the circuit panels are compressed with the interposers, the contacts expand radially and wipe across the pads. The wiping action facilitates bonding of the contacts to the pads, as by conductive bonding material carried on the contacts themselves.
    Type: Grant
    Filed: September 1, 2000
    Date of Patent: August 14, 2001
    Assignee: Tessera, Inc.
    Inventors: Thomas H. DiStefano, John W. Smith, Konstantine N. Karavakis, Zlata Kovac, Joseph Fjelstad
  • Publication number: 20010011605
    Abstract: An interposer for interconnection between microelectronic circuit panels has contacts at its surfaces. Each contact extends from a central conductor, and has a peripheral portion adapted to contract radially inwardly toward the central conductor response to a force applied by a contact pad defining a central hole on the engaged circuit panel. Thus, when the circuit panels are compressed with the interposers, the contacts contract radially inwardly and wipe across the pads. The wiping action facilitates bonding of the contacts to the pads, as by friction welding, or by a conductive bonding material carried on the contacts themselves.
    Type: Application
    Filed: February 8, 2001
    Publication date: August 9, 2001
    Inventors: Thomas H. Distefano, Joseph Fjelstad
  • Publication number: 20010010400
    Abstract: A sheet such as a polymeric dielectric has elongated lead regions partially separated from the main region of the sheet by gaps in the sheet, and has conductors extending along the lead regions. The lead regions are connected to contacts on a microelectronic element, and the microelectronic element is moved away from the main region of the sheet, thereby bending the lead regions downwardly to form leads projecting from the main region of the sheet.
    Type: Application
    Filed: March 2, 2001
    Publication date: August 2, 2001
    Inventors: John W. Smith, Joseph Fjelstad
  • Patent number: 6266872
    Abstract: A method of making a microelectronic assembly includes providing a connection component including a dielectric element with electrically conductive parts, providing a fugitive material in contact with the dielectric element and providing a curable material on the dielectric element after providing the fugitive material and curing the curable material to provide a compliant element so that the fugitive material isolates the electrically conductive parts from the compliant element. The method also includes storing the connection component with the fugitive material and the compliant element. After the storing step, the fugitive material is removed from the connection component and the electrically conductive parts are then connected to a microelectronic element. The step of removing the fugitive material is generally performed less than 24 hours before the electrically conductive parts are connected together and preferably less than one hour before the parts are connected together.
    Type: Grant
    Filed: December 9, 1997
    Date of Patent: July 31, 2001
    Assignee: Tessera, Inc.
    Inventor: Joseph Fjelstad
  • Patent number: 6266874
    Abstract: A method of making a microelectronic component by providing a conductive element, providing a resist at selected locations on said conductive element and electrophoretically depositing an uncured dielectric material on the conductive element, wherein the uncured material will be deposited on the conductive element except at locations covered by the resist. The deposited material is cured to form a dielectric layer and the resist is removed so that the dielectric layer has openings extending to the conductive element at locations the locations which were covered by the resist.
    Type: Grant
    Filed: July 17, 1998
    Date of Patent: July 31, 2001
    Assignee: Tessera, Inc.
    Inventors: Thomas H. DiStefano, John W. Smith, Konstantine N. Karavakis, Zlata Kovac, Joseph Fjelstad
  • Publication number: 20010009305
    Abstract: An element such as a semiconductor wafer or other body is provided with flexible leads, the tip ends of which project over the front surface of the element. The tips of the flexible leads are spaced apart from the front surface and are independently moveable with respect to the element. The flexible leads may be curved in a plane parallel to the front surface of the element, or may be curved so that the tip end of each flexible lead is disposed further from the front surface of the element than the main body of the flexible lead.
    Type: Application
    Filed: February 16, 2001
    Publication date: July 26, 2001
    Inventor: Joseph Fjelstad