Abstract: Delay associated with each of two signals along respective transmission paths is accurately measured using a delay measurement circuit that is fabricated in situ on the actual device where the circuitry for propagating the two signals is fabricated. Thus, the measured delay associated with each of the two signals is subject to the same fabrication-dependent attributes that affect the actual circuitry through which the two signals will be propagated during operation of the device. The skew between the two signals is quantified as the difference in the measured delays. Coarse and fine delay modules are defined within the transmission path of each of the two signals. Based on the measured skew between the two signals, the coarse and fine delay modules are appropriately set to compensate for the skew. The appropriately settings for the coarse and fine delay modules can be stored in non-volatile memory elements.

Abstract: Circuits, methods, and apparatus that isolate an input register from spurious transitions on a DQS signal. One example receives an enable signal from a core. A logic circuit, which may be referred to as a one-half period circuit, shortens enable pulses at their front end by one-half a period. The shortened enable signal is passed to a storage element such as a register. Active pulses of the shortened enable signal clear the register, which provides a control signal closing a switch, such as an AND gate. The switch passes the DQS signal to the input register when closed and isolates the input register from the DQS signal when open. The shortened enable signal prevents the switch from opening early and passing spurious transitions on the DQS signal, for example during back-to-back non-consecutive read cycles.

Abstract: A memory stick includes a -shaped metal plate member having two tenones respectively protruded from an inner wall thereof at two opposite sides and aimed at each other, each tenon being formed on the -shaped metal plate member by means of punching the inner wall of the -shaped metal plate member with a punch to form a protrusion and then punching the protrusion with a punch rod to extend the height of the protrusion and to deform the protrusion into a tubular configuration, and a casing accommodating a PC board that has a USB connector at its one end and having two pivot holders symmetrically located on two opposite sides thereof and respectively pivotally coupled to the tenones of the -shaped metal plate member for enabling the -shaped metal plate member to be turned relative to the casing to close or open the USB connector.

Abstract: A method of forming a tenon on one side of a metal plate member by means of punching the wall of one side of the metal plate member with a punch or punches to form a protrusion and then punching the protrusion with a punch rod to extend the height of the protrusion and to deform the protrusion into a tubular configuration.

Abstract: Method and circuitry for implementing high speed multiple-data-rate interface architectures for programmable logic devices. The invention partitions I/O pins and their corresponding registers into independent multiple-data rate I/O modules each having at least one pin dedicated to the strobe signal DQS and others to DQ data signals. The modular architecture facilitates pin migration from one generation of PLDs to the next larger generation.

Abstract: A retractable USB memory stick includes a metal casing formed of a seamless flat tube having opposing front opening and rear opening, a sliding slot located on one peripheral wall thereof, and first and second locating holes located on the sliding slot, a PC board having a front USB interface circuit and a rear memory IC package, and an insulation PC board holder holding the PC board and slidably mounted in the metal casing. The insulation PC board holder has a spring strip bridged on the outside wall thereof, a sliding block located on the spring strip and forced by the spring power of the spring strip into the sliding slot of the metal casing, and a retaining block protruded from the sliding block for selectively engaging the first locating hole or second locating hole of the metal casing to lock the insulation PC board holder to the metal casing in the extended position and received position.

Abstract: A method to assemble functional materials, such as nanomaterials, onto a polymer surface to create a corresponding functionalized surface involves creating a solution of the functional material, providing a sacrificial substrate, disposing the functional solution onto a surface of the substrate and then covering the substrate with a liquid polymer. The sacrificial substrate is then dissolved, leaving behind a functional surface embedded within the cured polymer. One specific aspect of the invention relates to the embedding of functionalized carbon nanotubes onto a polymer surface for creating a nano-engineered surface. Devices employing functional surfaces are disclosed that are suitable for the immobilization of enzymes, DNA, peptides, proteins, cells, catalyst, and/or other chemicals or molecules for chemical, biochemical, or biological analysis, reactions, filtration.

Abstract: A USB flash disk is disclosed as being inserted therein with an internal structure composed of a printed circuit board, a metallic tray, a lower insulation seat and a clamping strip unit etc. for completing the USB flash disk.

Abstract: A USB flash disk with a none-joint metallic housing, the main point is that the USB flash disk is formed by inserting an internal structure composed of a printed circuit board, a metallic tray and an insulation upper seat in the metallic housing which is a none-joint rectangular pipe formed by drawing shaping.

Abstract: The Improved Mobile Digital Video Recorder (IMDVR) system is a ruggedized, multiple camera video and audio recording system that is installed within a public transit vehicle to record, store, and manage an integrated data stream of data captured within and exterior to the transit vehicle. The system is focused on multiple person vehicles and the capture of an integrated data stream for use in transit security, liability, and evidentiary processes.

Abstract: Digitally controlled delay-locked loops can have a phase detector, control logic, and a delay chain. The control logic generates digital signals in response to an output signal of the phase detector. The delay chain generates a delay that varies in response to the digital signals. In some embodiments, the control logic maintains logic states of the digital signals constant in response to an enable signal to maintain the delay of the delay chain constant in a lock mode of the digitally controlled delay-locked loop. In other embodiments, the delay of the delay chain varies by a discrete time period in response to a change in logic states of the digital signals, and the maximum phase error between a phase of the reference clock signal and a phase of the feedback clock signal is less than the discrete time period when the digitally controlled delay-locked loop is in a lock mode.

Abstract: Methods and apparatus for delaying a clock signal for a multiple-data-rate interface. An apparatus provides an integrated circuit including a frequency divider configured to receive a first clock signal and a first variable-delay block configured to receive an output from the frequency divider. Also included is a phase detector configured to receive the first clock signal and an output from the first variable-delay block, and an up/down counter configured to receive an output from the phase detector. A second variable-delay block is configured to receive a second clock signal and a plurality of flip-flops are configured to receive an output from the second variable-delay block. The first variable-delay block and the second variable-delay block are configured to receive an output from the up/down counter.

Abstract: An input buffer circuit has a plurality of selectively enabled differential amplifier circuits, where each differential amplifier is configured for compatibility with a particular differential I/O standard and its corresponding input operating range. For example, the input buffer may have two differential amplifiers suitable for receiving LVDS differential input signals over a wide input operating range, and another differential amplifier suitable for receiving the PCML differential input signals. One or more control signals are provided to the input buffer, e.g., programmably, to selectively enable the required differential amplifier(s) for a given I/O standard.

Abstract: Circuits, methods and apparatus are provided to reduce skew among signals being provided or transmitted by a data interface. Signal path delays are varied such that signals transmitted by a memory interface are calibrated or aligned with each other along a rising and/or falling edge. For example, self-calibration, external circuitry, or design tools can provide skew adjustment of each output channel by determining one or more delays for each output channel path. When aligning multiple edges, the edges of the output signals may be aligned independently, e.g., using edge specific delay elements.

Abstract: Circuits, methods, and apparatus that detect whether a soft error that occurs in stored configuration data is a false positive that can be ignored such that reloading configuration data or other remedial measures are not unnecessarily performed. One example provides an integrated circuit including an error detection circuit and a sensitivity processor. The error detection circuit detects the presence of errors. The sensitivity processor determines whether a detected error can be ignored, or whether remedial action, such as providing an error flag, reconfiguring the device, or correcting the error, should be commenced. The sensitivity processor may make this determination based on whether the error occurred in a memory cell that configures unused circuitry. The sensitivity processor may make use of an error log to track known errors that may be ignored, so that this determination does not need to be done each time the configuration data is checked.

Abstract: Delay associated with each of two signals along respective transmission paths is accurately measured using a delay measurement circuit that is fabricated in situ on the actual device where the circuitry for propagating the two signals is fabricated. Thus, the measured delay associated with each of the two signals is subject to the same fabrication-dependent attributes that affect the actual circuitry through which the two signals will be propagated during operation of the device. The skew between the two signals is quantified as the difference in the measured delays. Coarse and fine delay modules are defined within the transmission path of each of the two signals. Based on the measured skew between the two signals, the coarse and fine delay modules are appropriately set to compensate for the skew. The appropriately settings for the coarse and fine delay modules can be stored in non-volatile memory elements.

Abstract: Methods and apparatus for providing either high-speed, or lower-speed, flexible inputs and outputs. An input and output structure having a high-speed input, a high-speed output, a low or moderate speed input, and an low or moderate speed output is provided. One of the input and output circuits are selected and the others are deselected. The high-speed input and output circuits are comparatively simple, in one example having only a clear signal for a control line input, and are able to interface to lower speed circuitry inside the core of an integrated circuit. The low or moderate speed input and output circuits are more flexible, for example, having preset, enable, and clear as control line inputs, and are able to support JTAG boundary testing. These parallel high and lower speed circuits are user selectable such that the input output structure is optimized between speed and functionality depending on the requirements of the application.

Abstract: Methods and circuitry for distributing and synchronizing a divided clock signal in an electronic device are disclosed. In one aspect of an embodiment, a series of registers distributes the divided clock signal and the series of registers is clocked by a full-speed clock signal from which the divided clock signal is derived. In another aspect, the divided clock signal and the full-speed clock signal are distributed to IO circuitry of the electronic device. In yet another aspect, the divided clock signal is also distributed to circuitry in a core of the electronic device.

Abstract: Circuits, methods, and apparatus for transferring data from a device's input clock domain to a core clock domain. One example achieves this by using a retiming element between input and core circuits. The retiming element is calibrated by incrementally sweeping a delay and receiving data at each increment. Minimum and maximum delays where data is received without errors are averaged. This average can then be used to adjust the timing of a circuit element inserted in an input path between an input register clocked by an input strobe signal and an output register clocked by a core clock signal. In one example, an input signal may be delayed by an amount corresponding to the delay setting. In other examples, each input signal is registered using an intermediate register between the input register and the output register, where a clock signal is delayed by an amount corresponding to the delay setting.

Abstract: A method and apparatus for changing engine motor oil more quickly and simply than previously existing methods. To change oil on a gasoline or diesel engine, the conventional oil filter is removed and an adapter is screwed in its place. An inlet oil port of the adapter connects with the oil filter inlet line and an outlet port of the adapter connects to the oil filter outlet line. The adapter top is sealed with a recessed O-ring extending around the periphery so that oil can be pumped through the adapter into and out of the engine without leaking. The adapter inlet and outlet ports are connected by hoses/tubes to an external container with its own internal piston. The engine is turned on to idle and the engine oil pump pumps used oil from the oil pan out through the adapter outlet port into the external container.