Patents by Inventor Jun He

Jun He has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260150675
    Abstract: A package structure and method for manufacturing the same are provided. The package structure includes a package component and a protruding feature attached to the package component. The package structure further includes a lid disposed over the package component and the protruding feature and a first thermal interface material under a bottom surface of the lid and at a first side of the protruding feature. The package structure includes a second thermal interface material. In addition, the second thermal interface material includes a first portion under the bottom surface of the lid and at a second side of the protruding feature, a second portion over a bottom portion of the lid, and a third portion through the bottom portion of the lid and connecting with the first portion and the second portion.
    Type: Application
    Filed: November 22, 2024
    Publication date: May 28, 2026
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Bang-Li WU, Chien-Chang WANG, Ching WANG, Kuo-Chin CHANG, Kathy Wei YAN, Jun HE
  • Publication number: 20260121674
    Abstract: Provided is an apparatus including interface circuitry, machine-readable instructions, and processing circuitry. The processing circuitry is configured to execute the machine-readable instructions to receive data indicating a frequency range used by a computing platform for wireless communication. The computing platform includes a notch filter for filtering platform noise from communication signals of the wireless communication. The machine-readable instructions further include instructions to search a database based on the received data. The comprises multiple frequency ranges for a respective notch filter configuration. The machine-readable instructions further include instructions to, if the database comprises a notch filter configuration for the frequency range of the received data, apply the respective notch filter configuration to the notch filter.
    Type: Application
    Filed: December 18, 2024
    Publication date: April 30, 2026
    Inventors: Dong-Ho HAN, Hagay BAREL, Shlomi VITURI, Noam KOGOS, Michael SHUSTERMAN, Joy PODDAR, Amit ZEEVI, Jun HE
  • Publication number: 20260115645
    Abstract: A multistage uniform temperature phase change absorption tower for capturing high-concentration carbon dioxide is provided, including an absorption tower, where the absorption tower is provided with multiple inlets, packing layers, and redistributors distributed from top to bottom; a phase separation tank, where a bottom of the phase separation tank is in communication with a bottom of the absorption tower through the pipelines, and a top of the phase separation tank is in communication with the third inlet and the first inlet through the pipelines; a heat exchanger, where the heat exchanger is in communication with the bottom of the phase separation tank through a rich liquid pump, and the heat exchanger is in communication with the fourth inlet and the second inlet through the pipelines; and a desorption tower, where the desorption tower is connected with a reboiler and connected with the heat exchanger through the pipelines.
    Type: Application
    Filed: August 15, 2025
    Publication date: April 30, 2026
    Inventors: Tingyu ZHU, Wenqing XU, Yang YANG, Jun HE, Zanbu GENG
  • Patent number: 12575356
    Abstract: An integrated circuit chip package and a method of fabricating the same are disclosed. The method includes forming a device layer on a substrate with a first die and a second die, forming an interconnect structure on the device layer, depositing an insulating layer on the interconnect structure, forming first and second conductive pads on the interconnect structure, forming first and second conductive vias on the first and second conductive pads, respectively, patterning a polymer layer to form first and second buffer layers with tapered side profiles on the first and second conductive vias, respectively, forming a trench in the substrate and between the first and second buffer layers, and dicing the substrate through the trench to separate the first die from the second die. Portions of the first and second conductive pads extend over the insulating layer.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: March 10, 2026
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Hsien Huang, Yao-Chun Chuang, Hua-Wei Tseng, Yu-Jin Hu, Jun He
  • Patent number: 12575436
    Abstract: A semiconductor device with a multi-tier construction includes a first tier having a first die, a second die spaced apart from the first die in a first direction and a fill material therebetween. A second tier overlays the first tier, and includes a bridge die partially overlaying the fill material and the first and second dies. The bridge die provides an electrical interconnection between the first and second dies in the first tier. The device also has a first protective structure aligned with a first interface between an end of the first die and the fill material that includes a first part formed on a first side of the first die at the end of the first die; and a second part formed on a first side of the bridge die. The first and second parts are aligned and form the first protective structure, mitigating cracking near the bridge die.
    Type: Grant
    Filed: May 3, 2023
    Date of Patent: March 10, 2026
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Li-Hsien Huang, Jun He, Yinlung Lu, Yao-Chun Chuang
  • Publication number: 20260057219
    Abstract: Some aspects relate to technologies for employing generative models to produce personalized content based on insights extracted from user data. In accordance with some aspects, user data for an end user is accessed, and a plurality of insights are extracted from the user data. A prompt is generated using at least a portion of the insights. The prompt is provided as input to a generative model, causing the generative model to generate content. A message based on the content from the generative model is provided to a user device of the end user.
    Type: Application
    Filed: August 23, 2024
    Publication date: February 26, 2026
    Inventors: Lei ZHANG, Shengyun PENG, Xirui WANG, Joy WANG, Juliane LEITE DE SOUZA FLORES, Jun HE, Zhenyu YAN, David BERGER
  • Patent number: 12561601
    Abstract: Provided are an intelligent sensor system architecture and an implementation method and apparatus therefor. The system architecture includes a sensor module and an artificial intelligence processing module, where the sensor module and the artificial intelligence processing module are connected to each other in a monolithic integration manner or a modular integration manner; the sensor module is configured to acquire a measurement signal and convert the measurement signal into an electrical signal; and the artificial intelligence processing module is configured to execute a corresponding artificial intelligence processing operation according to the electrical signal generated by the sensor module.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: February 24, 2026
    Assignee: ANHUI YUNTA ELECTRONIC TECHNOLOGIES CO., LTD.
    Inventors: Chengjie Zuo, Jun He
  • Publication number: 20260047435
    Abstract: A method includes forming a package component, including forming a thermal via extending through a substrate; and bonding a die to the thermal via; attaching the thermal via of the package component to a first conductive pad of a package substrate, wherein the package substrate includes a heat pipe underneath the first conductive pad; and attaching a support structure to a second conductive pad of the package substrate, wherein the heat pipe is underneath the second conductive pad, wherein the support structure includes a first thermoelectric cooler.
    Type: Application
    Filed: December 6, 2024
    Publication date: February 12, 2026
    Inventors: Chien-Chang Wang, Ching Wang, Bang Li Wu, Kuo-Chin Chang, Kathy Wei Yan, Jun He
  • Patent number: 12536192
    Abstract: Providing Quality of Service (QoS) for replicating datasets including: receiving, by a target data repository from a source data repository, a checkpoint describing one or more updates to one or more datasets stored in the source data repository and the target data repository; adding, by the target data repository, the checkpoint to a first queue for checkpoints directed to one or more volumes in the target data repository, wherein the first queue is included in a plurality of queues for the target data repository; selecting, by the target data repository, one or more queues from the plurality of queues; and servicing an operation from each of the selected one or more queues.
    Type: Grant
    Filed: July 22, 2024
    Date of Patent: January 27, 2026
    Assignee: PURE STORAGE, INC.
    Inventors: Daniel Sonner, Jun He, Zong Wang, John Colgrove, Matthew Fay
  • Patent number: 12500322
    Abstract: A filter structure and a filter device provided by the present application relate to the technical field of electronic devices. The filter structure includes: a shielding component, which includes a first shielding layer and a second shielding layer, which are arranged opposite each other at an interval; at least two resonance components, which are arranged at an interval, wherein each resonance component includes a resonance column and a resonance disk connected to the resonance column, and the resonance column is located between the first shielding layer and the second shielding layer and is connected to the first shielding layer; and a coupling enhancement component, which is respectively arranged at intervals from the first shielding layer and the second shielding layer, and is respectively connected to at least two resonance columns, so as to increase a coupling coefficient between the at least two resonance columns.
    Type: Grant
    Filed: April 2, 2021
    Date of Patent: December 16, 2025
    Assignee: ANHUI ANUKI TECHNOLOGIES CO., LTD.
    Inventors: Jian Niu, Chengjie Zuo, Jun He
  • Patent number: 12494758
    Abstract: A resonance circuit and a filtering device, which relate to the technical field of electronic devices. The resonance circuit includes: a connection port, wherein the connection port includes a first port and a second port; and a resonance unit, wherein the resonance unit includes at least one inductor element and at least one capacitor element, and the inductor element is connected to the capacitor element. The first port and the second port are respectively connected to the resonance unit, so as to form at least two branches which are connected in parallel, and at least one of the first port and the second port is not connected to any of the capacitor elements.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: December 9, 2025
    Assignee: ANHUI ANUKI TECHNOLOGIES CO., LTD.
    Inventors: Wei Cheng, Lijie Dai, Chengjie Zuo, Jun He
  • Publication number: 20250372475
    Abstract: An exemplary package structure includes a package substrate; an integrated circuit (IC) package comprises one or more dies and having a first side and a second side opposite the first side, wherein the first side of the IC package is attached to the package substrate; a heat-dissipating lid module attached to the second side of the IC package, wherein the heat-dissipating lid module comprises an upper portion, a lower portion, and a middle portion disposed between and thermally coupled to the upper portion and the lower portion, wherein the middle portion includes a heat sink separating the heat-dissipating lid module into a liquid cooling system and a vapor chamber.
    Type: Application
    Filed: May 31, 2024
    Publication date: December 4, 2025
    Inventors: Chien-Chang WANG, Kuan-Min WANG, Bang Li WU, Kuo-Chin CHANG, Kathy Wei YAN, Jun HE
  • Publication number: 20250372540
    Abstract: A laser grooving operation is performed to form a plurality of grooves in a semiconductor die prior to attaching the semiconductor die to a semiconductor device package substrate. In addition to forming a first groove through which blade sawing is to be performed to separate the semiconductor die from other semiconductor dies, a second groove may be formed between the first groove and a seal ring of the semiconductor die. The second groove is configured to contain any potential delamination that might otherwise propagate to an active region of the semiconductor die. Accordingly, the second groove and the associated laser grooving operation described herein may reduce the likelihood of delamination that might otherwise be caused by swelling and/or expansion in a molding compound formed around the semiconductor die after the semiconductor die is attached to the semiconductor device package substrate.
    Type: Application
    Filed: August 7, 2025
    Publication date: December 4, 2025
    Inventors: Tien-Chung YANG, Li-Hsien HUANG, Ming-Feng WU, Yung-Sheng LIU, Chun-Jen CHEN, Jun HE
  • Publication number: 20250364384
    Abstract: The present disclosure provides methods and structures to prevent cracks in redistribution layers. A redistribution structure according to the present disclosure includes a first polymer layer disposed over a silicon substrate, a first contact via disposed in the first polymer layer, a second polymer layer disposed over the first contact via, a first redistribution layer including a first conductive pad disposed on the second polymer layer and a second contact via extending through the second polymer layer to physical contact the first contact via, a third polymer layer disposed over the first redistribution layer, a second redistribution layer including a second conductive pad disposed on the third polymer layer and a plurality of third contact vias extending through the third polymer layer to physically contact the first conductive pad. The first conductive pad has at least one opening and the second conductive pad has at least one opening.
    Type: Application
    Filed: August 6, 2025
    Publication date: November 27, 2025
    Inventors: Ting-Ting Kuo, Li-Hsien Huang, Tien-Chung Yang, Yao-Chun Chuang, Yinlung Lu, Jun He
  • Publication number: 20250364391
    Abstract: An adhesion layer may be formed over portions of a redistribution layer (RDL) in a redistribution structure of a semiconductor device package. The portions of the RDL over which the adhesion layer is formed may be located in the “shadow” of (e.g., the areas under and/or over and within the perimeter of) one or more TIVs that are connected with the redistribution layer structure. The adhesion layer, along with a seed layer on which the portions of the RDL are formed, encapsulate the portions of the RDL in the shadow of the one or more TIVs, which promotes and/or increases adhesion between the portions of the RDL and the polymer layers of the redistribution structure.
    Type: Application
    Filed: August 5, 2025
    Publication date: November 27, 2025
    Inventors: Ting-Ting KUO, Li-Hsien HUANG, Tien-Chung YANG, Yao-Chun CHUANG, Yinlung LU, Jun HE
  • Publication number: 20250364418
    Abstract: A graphene-clad metal interconnect extends material properties of graphene to both damascene and patterned interconnect structures at lower metal layers, leading to significant reductions in resistance. Graphene cladding can be used with or without a metal barrier/liner. Presence of a barrier/liner can serve to catalyze growth of an overlying graphene layer. Graphene may also be selectively grown on barrier surfaces. Fully integrated structures and process flows for integrated circuits with graphene-clad metallization are described.
    Type: Application
    Filed: August 5, 2025
    Publication date: November 27, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jian-Hong LIN, Yinlung LU, Jun HE, An Shun TENG, Chun-Wei CHANG
  • Publication number: 20250364441
    Abstract: A laser grooving operation is performed to form a plurality of grooves in a semiconductor die prior to attaching the semiconductor die to a semiconductor device package substrate. In addition to forming a first groove through which blade sawing is to be performed to separate the semiconductor die from other semiconductor dies, a second groove may be formed between the first groove and a seal ring of the semiconductor die. The second groove is configured to contain any potential delamination that might otherwise propagate to an active region of the semiconductor die. Accordingly, the second groove and the associated laser grooving operation described herein may reduce the likelihood of delamination that might otherwise be caused by swelling and/or expansion in a molding compound formed around the semiconductor die after the semiconductor die is attached to the semiconductor device package substrate.
    Type: Application
    Filed: August 7, 2025
    Publication date: November 27, 2025
    Inventors: Tien-Chung YANG, Li-Hsien HUANG, Ming-Feng WU, Yung-Sheng LIU, Chun-Jen CHEN, Jun HE
  • Patent number: 12482763
    Abstract: A laser grooving operation is performed to form a plurality of grooves in a semiconductor die prior to attaching the semiconductor die to a semiconductor device package substrate. In addition to forming a first groove through which blade sawing is to be performed to separate the semiconductor die from other semiconductor dies, a second groove may be formed between the first groove and a seal ring of the semiconductor die. The second groove is configured to contain any potential delamination that might otherwise propagate to an active region of the semiconductor die. Accordingly, the second groove and the associated laser grooving operation described herein may reduce the likelihood of delamination that might otherwise be caused by swelling and/or expansion in a molding compound formed around the semiconductor die after the semiconductor die is attached to the semiconductor device package substrate.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: November 25, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tien-Chung Yang, Li-Hsien Huang, Ming-Feng Wu, Yung-Sheng Liu, Chun-Jen Chen, Jun He
  • Patent number: D1109109
    Type: Grant
    Filed: December 24, 2024
    Date of Patent: January 13, 2026
    Assignee: EMOMO TECH (ZHEJIANG) CO., LTD
    Inventors: Wenji Tang, Dasheng Hu, Jun He, Zaigui Yang, Guifeng Zhou
  • Patent number: D1104322
    Type: Grant
    Filed: October 3, 2023
    Date of Patent: December 2, 2025
    Assignee: SIGNIFY HOLDING B.V.
    Inventors: Morna Shen, Jun He, Ran Hu Ze, Xiaoqing Duan