Abstract: Provided are an ALD processing apparatus and a processing method. A reactor of the processing apparatus includes a vacuum chamber and a reaction chamber, the reaction chamber is built in the vacuum chamber and is open at a top, a bottom of the reaction chamber is formed with a gas inlet channel and a gas outlet channel arranged opposite to each other with respect to centerline of the bottom of the reaction chamber in a first direction, a lifting device is provided on the reactor, an output end of the lifting device stretches and contracts vertically and is provided with a sealing cover, which operably seals the top of the reaction chamber, a transporting device is configured to transport a substrate into the vacuum chamber, a grabbing device is provided on the sealing cover, and the grabbing device is configured to grab the substrate transported into the vacuum chamber.

Abstract: A memory system identifies memory cells connected to a common word line that have had their threshold voltage unintentionally drift lower than programmed by determining whether memory cells meet two criteria: (1) the memory cells have threshold voltages within an offset of a read compare voltage of a data state; and (2) adjacent memory cells (connected to word lines that are adjacent to the common word line) are in one or more low data states. For those memory cells meeting the two criteria, the memory system performs some amount of programming on the memory cells to refresh the data stored in those memory cells to be as originally intended.

Abstract: The memory device includes a control circuitry that is communicatively coupled to memory cells are arranged in a plurality of word lines. The control circuitry is configured to perform a first programming pass on a selected word line. The first programming pass includes a plurality of programming loops, each of which includes the application of a programming pulse (Vpgm). The programming pulse voltage is increased between programming loops of the first programming pass by a step size. The step size is a first step size between two programming loops of the first programming pass and is a second step size that is different than the first step size between two other programming loops of the first programming pass. The control circuitry is also configured to perform a second programming pass to further program the memory cells of the selected word line to the plurality of data states.

Abstract: Technology for sensing non-volatile memory cells in which one or more sense nodes are charged to a sense voltage having a magnitude that improves sensing accuracy. One sense node may be charged to different sense voltages when sensing different memory cells at different times. Multiple sense nodes may be charged to a corresponding multiple different sense voltages when sensing different memory cells at the same time. The one or more sense nodes are allowed to discharge based on respective currents of memory cells for a pre-determined time while applying a reference voltage to the memory cells. The Vts of the selected memory cells are assessed based on respective voltages on the one or more of sense nodes after the pre-determined time. Different sensing voltages may be used based on bit line voltage, bit line resistance, distance of memory cells from the sense node, or other factors.

Abstract: A winding device includes a mandrel for winding the electrode laminate, the mandrel having a first end and a second end opposite the first end; a first rotation driver located at the first end of the mandrel to rotate the mandrel; and a second rotation driver located at the second end of the mandrel to rotate the mandrel.

Abstract: Computer technology where a data table and its index are created using a VOLATILE column type. Records are inserted with a final value and index is inserted with staging value. One bit is used in the data record header to indicate whether it is in-sync with its index. One bit in index key header indicates either this can be an index only update or needs to be a regular update. In the beginning, when a record is inserted into data page, both flag bits will be in the off status, meaning the data record is not in sync with its index entry and only index-only update(s) may be performed. This can prevent needless updates to a data page stored in a volatile memory (for example, a random access memory).

Abstract: Technology for sensing non-volatile memory cells in which one or more sense nodes are charged to a sense voltage having a magnitude that improves sensing accuracy. One sense node may be charged to different sense voltages when sensing different memory cells at different times. Multiple sense nodes may be charged to a corresponding multiple different sense voltages when sensing different memory cells at the same time. The one or more sense nodes are allowed to discharge based on respective currents of memory cells for a pre-determined time while applying a reference voltage to the memory cells. The Vts of the selected memory cells are assessed based on respective voltages on the one or more of sense nodes after the pre-determined time. Different sensing voltages may be used based on bit line voltage, bit line resistance, distance of memory cells from the sense node, or other factors.

Abstract: The present disclosure provides a system and method for medical image visualization. The method may include obtaining original image data of a subject, the original image data including a first region of interest (ROI) and a second ROI. The method may also include generating first image data associated with the first ROI according to a first instruction, and causing the first ROI to be displayed on a display device as a first image based on the first image data. The method may further include generating, according to a second instruction, second image data corresponding to a target region that includes the second ROI, updating the first image data based on the second image data, and causing the second ROI to be displayed on the display device as a second image based on the updated first image data.

Abstract: Apparatuses and techniques are described for optimizing a program operation in a memory device in which groups of memory cells are programmed from checkpoint states to respective data states. In a first program pass, groups of memory cells are programmed to respective checkpoint states with verify tests. Each checkpoint state is associated with a set of data states. In a second program pass, the memory cells are programmed closer to their assigned data state with a specified number of program pulses. In a third program pass, the memory cells are programmed to their assigned data state by applying program pulses and performing verify tests. The number of checkpoint states and the number of data states associated with each checkpoint state can be optimized based on a spacing between the verify voltages of the data states.

Abstract: The present disclosure provides a system and method for medical image visualization. The method may include obtaining original image data of a subject, the original image data including a first region of interest (ROI) and a second ROI. The method may also include generating first image data associated with the first ROI according to a first instruction, and causing the first ROI to be displayed on a display device as a first image based on the first image data. The method may further include generating, according to a second instruction, second image data corresponding to a target region that includes the second ROI, updating the first image data based on the second image data, and causing the second ROI to be displayed on the display device as a second image based on the updated first image data.

Abstract: Embodiments of a three-dimensional (3D) memory device and a method of operating the 3D memory device are provided. The 3D memory device includes an array of 3D NAND memory cells, an array of static random-access memory (SRAM) cells, and a peripheral circuit. The array of SRAM cells and the peripheral circuit arranged at one side are bonded with the array of 3D NAND memory cells at another side to form a chip. Data is received from a host through the peripheral circuit, buffered in the array of SRAM cells, and transmitted from the array of SRAM cells to the array of 3D NAND memory cells. The data is programmed into the array of 3D NAND memory cells.

Abstract: A method of preparing an electrode for an electrode assembly having a structure in which electrodes are laminated, including: (i) a process of coating an electrode mixture on at least one surface of a metal sheet so that n (n?2) electrode mixture coated layer lines are formed between non-coated portions parallel to a first direction; (ii) a process of rolling the metal sheet sequentially from a first electrode mixture coated layer line to an nth electrode mixture coated layer line using a rolling roller rotated in a second direction perpendicular to the first direction; (iii) a process of slitting the rolled metal sheet at least twice in the second direction to prepare electrode plate base materials having n electrode mixture coated layers formed thereon; and (iv) a process of cutting each of the electrode plate base materials in the first direction to obtain n single sheet electrodes.

Abstract: Embodiments of three-dimensional (3D) memory devices with a 3D NAND memory array having a plurality of pages and an on-die data buffer coupled to the memory array on a same chip and configured to buffer a plurality of batches of program data between a host and the memory array. The on-die data buffer may include SRAM cells. The 3D memory device also includes a controller coupled to the on-die data buffer on the same chip. The controller may be configured to receive control instructions for performing a first pass program and a second pass program on memory cells in a page. The controller may also be configured to buffer, in the on-die data buffer, first program data for a first pass program and second program data for a second pass program from a host and retrieve the first program data from the on-die data buffer.

Abstract: A peeling device includes a rolling mechanism, a peeling mechanism, and a suction mechanism. The rolling mechanism includes a feeding wheel and a receiving wheel. At least one of the feeding wheel and the receiving wheel is configured to rotate. The peeling mechanism includes a peeling plate including a first surface and a side surface. The suction mechanism includes a support table and a rotary suction cup. A carrier tape is transmitted in sequence around the feeding wheel, the first surface, the side surface, and the receiving wheel. The peeling plate peels the material from the carrier tape at a junction of the first surface and the side surface. The support table holds the material peeled from the carrier tape. The rotary suction cup is used to suck the material from the support table and move the material to a next processing area.

Abstract: A method and system for fusing image data. The method may include obtaining a first volume image and a second volume image. The method may further include casting a plurality of rays through at least one of the first volume image or the second volume image. Each of the plurality of rays may correspond to a pixel of an image to be displayed. For each of at least a portion of the plurality of rays, the at least one processor may further be directed to cause the system to set a series of sampling positions along the ray. The method may further include selecting a reference position from the series of sampling positions. The method may further include determining fusion data of the ray. The method may further include determining a pixel value of a pixel of the image to be displayed that corresponds to the ray.

Abstract: Proposed is a composition for preventing, ameliorating or treating acne symptoms including a Sesamum indicum seed extract, a Quercus robur bark extract and a Houttuynia cordata extract as active ingredients, and at least one natural substance of a Cirsium japonicum extract and Thuja orientalis as an additional active ingredient. The composition for preventing, ameliorating or treating acne symptoms contains, as active ingredients, natural extracts having the effects of prevention, amelioration or treatment of acne by exhibiting high antibacterial activity against C. acnes, which is a strain causative of acne.

Abstract: Proposed is a composition for preventing, ameliorating or treating acne symptoms including a Sesamum indicum seed extract, a Quercus robur bark extract and a Houttuynia cordata extract as active ingredients, and at least one natural substance of a Cirsium japonicum extract and Thuja orientalis as an additional active ingredient. The composition for preventing, ameliorating or treating acne symptoms contains, as active ingredients, natural extracts having the effects of prevention, amelioration or treatment of acne by exhibiting high antibacterial activity against C. acnes, which is a strain causative of acne.

Abstract: Apparatuses and techniques are described for performing an erase operation for a set of memory cells, where the erase operation includes an all word line erase phase to save time followed by an odd-even word line erase phase to improve data retention. A transition to the odd-even word line erase phase can be triggered when the memory cells pass a first verify test which indicates that the threshold voltages of the memory cells have decreased below a first voltage. Or, the transition can be triggered when a threshold number of erase-verify iterations have been performed. The erase operation may be completed when the memory cells pass a second verify test which indicates that the threshold voltages of the memory cells have decreased below a second voltage which is less than the first voltage.

Abstract: Apparatuses and techniques are described for performing an erase operation for a set of memory cells, where the erase operation includes an all word line erase phase to save time followed by an odd-even word line erase phase to improve data retention. A transition to the odd-even word line erase phase can be triggered when the memory cells pass a first verify test which indicates that the threshold voltages of the memory cells have decreased below a first voltage. Or, the transition can be triggered when a threshold number of erase-verify iterations have been performed. The erase operation may be completed when the memory cells pass a second verify test which indicates that the threshold voltages of the memory cells have decreased below a second voltage which is less than the first voltage.

Abstract: The present invention discloses a method of manufacturing an electrode for a secondary battery by using a single process to notch and cut a unit electrode from an electrode sheet. The method for manufacturing electrodes for a secondary battery includes supplying an electrode sheet in a moving direction (MD), wherein the electrode sheet has a plurality of coated portions and uncoated portions alternately arranged along the MD, wherein each coated portion has an electrode active material, and each uncoated portion does not have an electrode active material; and cutting the uncoated portions to form the plurality of unit electrodes.