Patents by Inventor Jun Yao

Jun Yao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230341386
    Abstract: The present disclosure presents biosensor devices, systems, and related methods. One such biosensor device comprises a substrate; a semiconductive channel member suspending between a pair of contacts on the substrate, wherein the semiconductive channel member comprises a convex protruding channel structure; and wherein the convex protruding channel structure is configured to detect both electrical and mechanical cellular responses. Other devices, systems, and methods are also presented.
    Type: Application
    Filed: April 25, 2023
    Publication date: October 26, 2023
    Inventors: Jun Yao, Hongyan Gao
  • Patent number: 11791462
    Abstract: A modified silicon monoxide material is used for a negative electrode of a lithium battery, and is prepared by reacting raw materials of silicon, silicon dioxide and metal silicate under high-temperature and vacuum conditions to prepare silicon monoxide; and meanwhile, reacting the metal vapor with silicon monoxide in the preparation process to in situ form metal silicate. In the modified silicon monoxide material, the metal silicate is uniformly dispersed around the silicon and the silicon monoxide to form silicon-containing particles, and a carbon material coats the surfaces of the silicon-containing particles.
    Type: Grant
    Filed: March 14, 2020
    Date of Patent: October 17, 2023
    Assignee: JIANGXI IAMETAL NEW ENERGY TECHNOLOGY CO., LTD
    Inventors: Anguang Zhao, Fengshu Yue, Jun Yao
  • Publication number: 20230299987
    Abstract: A method of forwarding received broadcast packets by a receiving node device in a network of operatively interconnected node devices is disclosed. The received broadcast packets is broadcasted by a transmitting node device in the network. The method is performed by each receiving node device in the network and comprises the steps of: enabling a fast broadcasting mode in response to a trigger condition; adjusting a transmission power for forwarding received broadcast packets to a reduced transmission power, and forwarding, a broadcast packet received from the transmitting node device using the reduced transmission power. The method further comprises selectively forwarding a part of broadcast packets received from the transmitting node device. The method thereby reduces a number of broadcast packets transmitted simultaneously in the network, ensuring good network performance.
    Type: Application
    Filed: July 15, 2021
    Publication date: September 21, 2023
    Inventors: JUN YAO, AMOLOD JIANG, PENG WANG, PEILING DONG
  • Publication number: 20230282279
    Abstract: A filament forming method includes: performing first stage to apply first bias including gate and drain voltages to a resistive memory unit plural times until read current reaches first saturating state, latching read current in first saturating state as saturating read current, determining whether increasing rate of saturating read current is less than first threshold value; when increasing rate of saturating read current is not less than first threshold value, performing second stage to apply second bias, by increasing gate voltage and decreasing drain voltage, to the resistive memory unit plural times until read current reaches second saturating state, latching read current in second saturating state as saturating read current and determining whether increasing rate of saturating read current is less than first threshold value; finishing the method when increasing rate of saturating read current is less than first threshold value and saturating read current reaches target current value.
    Type: Application
    Filed: March 1, 2022
    Publication date: September 7, 2023
    Applicant: Winbond Electronics Corp.
    Inventors: Frederick Chen, Ping-Kun Wang, Chia-Hung Lin, Jun-Yao Huang
  • Publication number: 20230273153
    Abstract: A protein transfer system includes at least one base configured to receive one or more consumable protein transfer stacks and at least one lid configured to cover the base. The lid(s) comprise(s) one or more electrodes for supplying current to the one or more consumable protein transfer stacks. The protein transfer system further includes at least one voltage source configured to supply the current to the one or more consumable protein transfer stacks, one or more processors, and one or more hardware storage devices storing instructions that are executable by the one or more processors to configure the protein transfer system to control operation of the one or more voltage sources.
    Type: Application
    Filed: February 22, 2023
    Publication date: August 31, 2023
    Inventors: Chee Woei CHONG, Hwee Siong KUAH, Mio Xiu Lu LING, Kian Soon WONG, Jun Yao LIM, Jia Ni Beatrice LIM, Li Yong ONG, Xin Jie Jeryl CHENG, Kok Shyong CHONG, Zeqi TAN, Kguan Tyng LIM, Wei Fuh TEO, Quoc Cuong DINH, Tong BAO, Beng Heng LIM, Paul HANEY, Brian STEER, Michael THACKER, Boguslawa DWORECKI, Kelli FEATHER-HENIGAN, Xin MATHERS, Shahar SCHLEZINGER, Ronen BENARIEH
  • Publication number: 20230274782
    Abstract: A block erase method for a flash memory is provided. The block erase method is to perform block erase on a block with a predetermined block size. The block erase method includes: performing an erase verification on bytes byte-by-byte in the block when performing the block erase; checking an erase step of the byte when the byte does not pass the erase verification; when the erase step of the byte exceeds a predetermined threshold value, performing the block erase with a partitioned block smaller than the predetermined block size, and returning to an erase verification stage to perform the erase verification; and when the erase step of the bytes does not exceed the predetermined threshold value, continuing to perform the block erase with the predetermined block size, and returning to the erasure verification stage to continue to perform the erase verification.
    Type: Application
    Filed: December 1, 2022
    Publication date: August 31, 2023
    Applicant: Winbond Electronics Corp.
    Inventors: Lung-Chi Cheng, Ying-Shan Kuo, Jun-Yao Huang, Ju-Chieh Cheng, Yu-Cheng Chuang
  • Publication number: 20230270018
    Abstract: An integrated circuit die includes a magnetic tunnel junction as a storage element of a MRAM cell. The integrated circuit die includes a top electrode positioned on the magnetic tunnel junction. The integrated circuit die includes a first sidewall spacer laterally surrounding the top electrode. The first sidewall spacer acts as a mask for patterning the magnetic tunnel junction. The integrated circuit die includes a second sidewalls spacer positioned on a lateral surface of the magnetic tunnel junction.
    Type: Application
    Filed: May 2, 2023
    Publication date: August 24, 2023
    Inventors: Jun-Yao CHEN, Harry-Hak-Lay CHUANG, Hung Cho WANG
  • Publication number: 20230187804
    Abstract: This document describes techniques, apparatuses, and systems utilizing a high-isolation transition design for differential signal ports. A differential input transition structure includes a first layer and a second layer made of a conductive metal and a substrate positioned between the first and second layers. The second layer includes a first section that electrically connects to a single-ended signal contact point and to a first contact point of a differential signal port. The first section includes a first stub based on an input impedance of the single-ended signal contact point and a second stub based on a differential input impedance associated with the differential signal port. The second layer includes a second section that electrically connects to a second contact point of the differential signal port and to the first layer through a via housed in a pad. The second section includes a third stub associated with the differential input impedance.
    Type: Application
    Filed: February 6, 2023
    Publication date: June 15, 2023
    Inventors: Jun Yao, Roberto Leonardi, Dennis C. Nohns, Ryan K. Rossiter
  • Publication number: 20230178347
    Abstract: The present application provides a preparation method of a hydrogenated composite film and an optical filter, and relates to the field of optical film filter technologies. The preparation method includes: introducing inert gas and hydrogen into a reaction chamber, and bombarding at least two materials in the reaction chamber and the introduced hydrogen using plasma formed by the inert gas, such that the at least two materials are sputtered onto a substrate and react with hydrogen ions generated by the hydrogen to form a hydrogenated composite film layer. The hydrogenated composite film layer includes at least two materials which are co-sputtered onto the same substrate using the sputtering technology to obtain a required material performance, so as to obtain the hydrogenated composite film layer with a refractive index greater than 3.5 and an extinction coefficient less than 0.005 under a wavelength of 700 nm to 1800 nm.
    Type: Application
    Filed: July 8, 2021
    Publication date: June 8, 2023
    Applicant: ZHEJIANG CRYSTAL-OPTECH CO., LTD.
    Inventors: Yanzhi WANG, Yonghui WU, Ren LU, Ruizhi ZHANG, Jun YAO, Jinlong CHEN, Lijian JIN, Fenglei LIU, Jian TANG
  • Publication number: 20230179117
    Abstract: An active clamp flyback circuit includes: a clamp capacitor that is connected to a primary-side winding of a transformer and that is configured to absorb leakage inductance energy of the primary-side winding; an auxiliary switching transistor that is configured to control the clamp capacitor to perform reverse excitation power charging on the primary-side winding by using the auxiliary switching transistor; a first diode, where the first diode is connected in series between the clamp capacitor and the auxiliary switching transistor; and a second diode, where the second diode is connected between the first diode and the clamp capacitor , and the second diode is connected in series between the clamp capacitor and a primary-side auxiliary winding.
    Type: Application
    Filed: February 2, 2023
    Publication date: June 8, 2023
    Applicant: Huawei Digital Power Technologies Co., Ltd.
    Inventors: Jie REN, Xue ZHANG, Jun YAO
  • Patent number: 11659775
    Abstract: An integrated circuit die includes a magnetic tunnel junction as a storage element of a MRAM cell. The integrated circuit die includes a top electrode positioned on the magnetic tunnel junction. The integrated circuit die includes a first sidewall spacer laterally surrounding the top electrode. The first sidewall spacer acts as a mask for patterning the magnetic tunnel junction. The integrated circuit die includes a second sidewalls spacer positioned on a lateral surface of the magnetic tunnel junction.
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: May 23, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jun-Yao Chen, Harry-Hak-Lay Chuang, Hung Cho Wang
  • Publication number: 20230148634
    Abstract: The present invention discloses a high-voltage electric field low-temperature plasma cold sterilization system circuit and apparatus, and belongs to the field of frequency converter power source circuit technologies. The present invention including a power source module, a voltage/current/power adjustment module, a switch module, and a transformer module. The power source module includes a single-phase frequency converter and a first-stage inductance.
    Type: Application
    Filed: October 11, 2021
    Publication date: May 18, 2023
    Inventors: Lianghao WAN, Jun YAO, Long XU, Jinglin WAN
  • Publication number: 20230125476
    Abstract: This application provides an electrical element, a circuit board, and a switching power supply. The electrical element includes a first magnetic core and a second magnetic core disposed opposite to each other. The first magnetic core and the second magnetic core enclose space for accommodating a winding. The first magnetic core and the second magnetic core are further configured to bind a magnetic induction wire. The electrical element further includes a third magnetic core located in the space enclosed by the first magnetic core and the second magnetic core. The third magnetic core is configured to wind the winding. The third magnetic core is fixedly connected to the first magnetic core and the second magnetic core. An air gap is disposed in at least one of the first magnetic core and/or the second magnetic core.
    Type: Application
    Filed: December 22, 2022
    Publication date: April 27, 2023
    Inventors: Xijun ZHANG, Jia LI, Jun YAO, Chao GAO
  • Patent number: 11637273
    Abstract: A preparation method of silicon-based composite negative electrode material for a lithium battery includes the following steps: forming steam from a raw material A containing Si and a reducing substance raw material B capable of reacting to generate a silicate under a vacuum heating condition, condensing and depositing in a deposition system after a reaction, and then carrying out carbon coating to obtain the silicon-based composite material. A certain amount of alloy is added into the raw material B, so that a proportion of a crystal region in the silicon-based composite material can be reduced, and the initial coulombic efficiency and the cycling stability of the negative electrode material are further improved.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: April 25, 2023
    Assignee: BEIJING IAMETAL NEW ENERGY TECHNOLOGY CO., LTD
    Inventors: Yuguo Guo, Linbo Huang, Quan Xu, Yaxia Yin, Fengshu Yue, Jun Yao, Anguang Zhao
  • Patent number: 11631824
    Abstract: A memristive device includes a biomaterial comprising protein nanowires and at least two electrodes in operative arrangement with the biomaterial such that an applied voltage induces conductance switching. An artificial neuron or an artificial synapse includes a memrisitive device with the electrodes configured to apply a pulsed voltage configured to mimic an action-potential input.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: April 18, 2023
    Assignee: University of Massachusetts
    Inventors: Jun Yao, Derek R. Lovley, Tianda Fu
  • Patent number: 11616282
    Abstract: This document describes techniques, apparatuses, and systems utilizing a high-isolation transition design for differential signal ports. A differential input transition structure includes a first layer and a second layer made of a conductive metal and a substrate positioned between the first and second layers. The second layer includes a first section that electrically connects to a single-ended signal contact point and to a first contact point of a differential signal port. The first section includes a first stub based on an input impedance of the single-ended signal contact point and a second stub based on a differential input impedance associated with the differential signal port. The second layer includes a second section that electrically connects to a second contact point of the differential signal port and to the first layer through a via housed in a pad. The second section includes a third stub associated with the differential input impedance.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: March 28, 2023
    Assignee: Aptiv Technologies Limited
    Inventors: Jun Yao, Roberto Leonardi, Dennis C. Nohns, Ryan K. Rossiter
  • Publication number: 20230073457
    Abstract: A method is outlined for controlling a node to a join a wireless network, which increases the speed of the wireless network commissioning procedure by reducing the chance of congestion. This is achieved by differentiating the joining time of nodes attempting to join the wireless network. Nodes indirectly communicate by transmitting beacon request messages to nodes of the wireless network, which results in the transmission of beacon messages by nodes of the wireless network. These beacon messages can be received by all nodes attempting to join the wireless network. Therefore, the beacon messages can be utilized as an indicator for nodes attempting to join the wireless network as to the number of other nodes attempting to join the wireless network. Based on this indication, the node can be controlled to wait for a further length of time, or to join the wireless network.
    Type: Application
    Filed: March 9, 2021
    Publication date: March 9, 2023
    Inventors: Peiliang DONG, Mansoor Ali HAJAMYDEEN, Xuwen ZHOU, Junxi WU, Jun YAO
  • Publication number: 20230075194
    Abstract: A magnetic power component includes a printed circuit board and a magnetic core assembled to the printed circuit board. The magnetic core includes a magnetic core body and a plurality of heat dissipation teeth. The magnetic core body is bonded to the printed circuit board. The plurality of heat dissipation teeth is protruded from an outer surface that is of the magnetic core body and that faces away from the printed circuit board. The plurality of heat dissipation teeth and the magnetic core body are bonded through direct contact.
    Type: Application
    Filed: August 25, 2022
    Publication date: March 9, 2023
    Inventors: Xijun Zhang, Jia Li, Jun Yao, Chao Gao, Qiang Gao, Zhitao Li
  • Publication number: 20230061143
    Abstract: The present disclosure relate to semiconductor structure that includes a substrate and a memory array. The memory array is spaced over the substrate and has a plurality of rows and a plurality of columns. Further, the memory array comprises a first memory cell and a second memory cell that are adjacent at a common elevation above the substrate. The second memory cell is at an edge of the memory array and separates the first memory cell from the edge, and a top surface of the first memory cell is recessed relative to a top surface of the second memory cell.
    Type: Application
    Filed: August 26, 2021
    Publication date: March 2, 2023
    Inventors: Jun-Yao Chen, Hung Cho Wang, Harry-Hak-Lay Chuang
  • Publication number: 20230050614
    Abstract: A method of selectively commissioning a node device by a coordinator device in a network created by the coordinator device is disclosed. The coordinator device and the node device interact with each other to check and confirm that a coordinator temporal indication related to a commissioning start time recorded by the coordinator device and a node temporal indication related to a commissioning start time recorded by the node device are the same or temporally very similar or close to each other. Then the coordinator device will commission the node device by joining the node device into the network created by the coordinator device. The ensures that only wanted or expected node devices will be joined into the network created and managed by the coordinator device.
    Type: Application
    Filed: February 8, 2021
    Publication date: February 16, 2023
    Inventors: Jun YAO, Zhizhong ZHANG, Peiliang DONG