Patents by Inventor Jung Hsu

Jung Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210302690
    Abstract: An optical member driving mechanism for connecting an optical member is provided, including a fixed portion and a first adhesive member. The fixed portion includes a first member and a second member, wherein the first member is fixedly connected to the second member via the first adhesive member.
    Type: Application
    Filed: March 26, 2021
    Publication date: September 30, 2021
    Inventors: Hsiang-Chin LIN, Shou-Jen LIU, Guan-Bo WANG, Kai-Po FAN, Chan-Jung HSU, Shao-Chung CHANG, Shih-Wei HUNG, Ming-Chun HSIEH, Wei-Pin CHIN, Sheng-Zong CHEN, Yu-Huai LIAO, Sin-Hong LIN, Wei-Jhe SHEN, Tzu-Yu CHANG, Kun-Shih LIN, Che-Hsiang CHIU, Sin-Jhong SONG
  • Publication number: 20210285816
    Abstract: The present application provides a light sensor module, which comprise a display element, a first polarizing element, a light sensor, a transparent layer, and a second polarizing element. The display element emits a display light source. The first polarizing element covers the display element, and blocks a first phase portion of the display light source and allows a second phase portion of the display light source to penetrate. The transparent layer covers the first polarizing element. The light sensor is disposed on one side of the display element or the first polarizing element. The second polarizing element is disposed between the light sensor and the transparent layer and blocks a second phase portion of the display light source.
    Type: Application
    Filed: October 28, 2020
    Publication date: September 16, 2021
    Inventors: FENG-JUNG HSU, TSUNG-HUA WU
  • Patent number: 11117853
    Abstract: A method for manufacturing and a method for decolorizing dioctyl terephthalate are provided. The decolorizing dioctyl terephthalate includes: providing an unpurified dioctyl terephthalate; mixing the unpurified dioctyl terephthalate with a reducing agent and an adsorption medium to obtain a first decolorizing product; and mixing the first decolorizing product with a decolorizing adsorbent material to obtain a second decolorizing product. The method for manufacturing dioctyl terephthalate includes: a transesterification step, an alkaline washing and neutralization step, a redox step, a decolorization step and a stripping step; the decolorizing adsorbent material has an acid value between 0.1 and 2 mg KOH/g, a relative humidity between 2 and 10%, and a fineness between 80 and 100 cm2/g.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: September 14, 2021
    Assignee: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Jung-Jen Chuang, Chung-Yu Chen, Che-Jung Hsu
  • Publication number: 20210248036
    Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.
    Type: Application
    Filed: April 28, 2021
    Publication date: August 12, 2021
    Inventors: Tsung-Chieh Yang, Hong-Jung Hsu, Jian-Dong Du
  • Publication number: 20210223504
    Abstract: An optical system is provided. The optical system includes an immovable part, a second movable part, a second drive mechanism, and a second circuit mechanism. The second movable part is used for connecting to a second optical element. The second movable part is movable relative to the immovable part. The second drive mechanism is used for driving the second movable part to move relative to the immovable part. The second circuit mechanism is electrically connected to the second drive mechanism.
    Type: Application
    Filed: January 22, 2021
    Publication date: July 22, 2021
    Inventors: Chan-Jung HSU, I-Mei HUANG, Yi-Ho CHEN, Shao-Chung CHANG, Ichitai MOTO, Chen-Chi KUO, Ying-Jen WANG, Ya-Hsiu WU, Wei-Jhe SHEN, Chao-Chang HU, Che-Wei CHANG, Sin-Jhong SONG, Shu-Shan CHEN, Chih-Wei WENG, Chao-Hsi WANG
  • Publication number: 20210202308
    Abstract: Provided is a semiconductor device, including a substrate including a pixel region, a gate structure on the substrate in the pixel region, wherein the gate structure comprises a gate dielectric layer and a gate conductive layer on the gate dielectric layer; a dielectric layer located over the substrate and the gate structure; and a contact located in the dielectric layer and electrically connected to the gate conductive layer. The contact includes a doped polysilicon layer in contact with the gate conductive layer; a metal layer located on the doped polysilicon layer, wherein a part of the metal layer is embedded in the doped polysilicon layer; a barrier layer located between the metal layer and the doped polysilicon layer; and a metal silicide layer located between the barrier layer and the doped polysilicon layer.
    Type: Application
    Filed: February 25, 2021
    Publication date: July 1, 2021
    Applicant: United Microelectronics Corp.
    Inventors: Chih-Kai Hsu, Ssu-I Fu, Chia-Jung Hsu, Chun-Ya Chiu, Chin-Hung Chen, Yu-Hsiang Lin
  • Publication number: 20210193823
    Abstract: A method for fabricating semiconductor device includes: forming a first semiconductor layer and an insulating layer on a substrate; removing the insulating layer and the first semiconductor layer to form openings; forming a second semiconductor layer in the openings; and patterning the second semiconductor layer, the insulating layer, and the first semiconductor layer to form fin-shaped structures.
    Type: Application
    Filed: March 10, 2021
    Publication date: June 24, 2021
    Inventors: Chin-Hung Chen, Ssu-I Fu, Chih-Kai Hsu, Chia-Jung Hsu, Yu-Hsiang Lin
  • Publication number: 20210179649
    Abstract: Organic metal compounds, and organic light-emitting devices employing the same are provided. The organic metal compound has a chemical structure of Formula (I): The definitions of R1-R18 and n are as defined in specification. The organic light-emitting device includes a pair of electrodes; and an organic light-emitting element, disposed between the electrodes, wherein the organic light-emitting element includes the aforementioned organic metal compound.
    Type: Application
    Filed: June 29, 2020
    Publication date: June 17, 2021
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Jia-Lun LIOU, Po-Jung HSU, Han-Cheng YEH, Mei-Rurng TSENG
  • Patent number: 11030042
    Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: June 8, 2021
    Assignee: Silicon Motion, Inc.
    Inventors: Tsung-Chieh Yang, Hong-Jung Hsu, Jian-Dong Du
  • Patent number: 11026003
    Abstract: Disclosed is an optical network unit (ONU) capable of reporting current Dynamic Bandwidth Report upstream (DBRu) information to an optical line terminal (OLT) according to the amount variation of to-be-transmitted upstream data in a buffer. The ONU includes: the buffer temporarily storing the to-be-transmitted upstream data; a register circuit recording previous data amount information related to the previous data amount of the buffer at a previous time point earlier than a current time point; a DBRu information generating circuit generating the current DBRu information according to an amount difference and a current data amount of the buffer at the current time point, wherein the amount difference is dependent on the difference between the previous data amount information and current data amount information that is dependent on the current data amount; and a transmitting circuit transmitting the current DBRu information to the OLT.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: June 1, 2021
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hung-Wen Lin, Mu-Jung Hsu
  • Publication number: 20210157383
    Abstract: An example non-transitory computer-readable medium storing machine-readable instructions that, when executed by a processor, cause the processor to: set a graphical processing unit (GPU) power allocation, the GPU power allocation indicating power available for use by a GPU. The processor sets a processor power allocation, the processor power allocation indicating power available for use by the processor. The processor receives a GPU usage value and modifies the GPU power allocation to a modified GPU power allocation based on the GPU usage value. The processor modifies the processor power allocation to a modified processor power allocation based on the modification of the GPU power allocation.
    Type: Application
    Filed: August 17, 2018
    Publication date: May 27, 2021
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Chun Jung Hsu, Lung Chi Huang
  • Patent number: 11011533
    Abstract: A memory structure including a first select transistor, a first floating gate transistor, a second select transistor, a second floating gate transistor, and a seventh doped region is provided. The first select transistor includes a select gate, a first doped region, and a second doped region. The first floating gate transistor includes a floating gate, the second doped region, and a third doped region. The second select transistor includes the select gate, a fourth doped region, and a fifth doped region. The second floating gate transistor includes the floating gate, the fifth doped region, and a sixth doped region. A gate width of the floating gate in the second floating gate transistor is greater than a gate width of the floating gate in the first floating gate transistor. The floating gate covers at least a portion of the seventh doped region.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: May 18, 2021
    Assignee: eMemory Technology Inc.
    Inventors: Chia-Jung Hsu, Wein-Town Sun
  • Publication number: 20210135409
    Abstract: An automatic retractable connecting cable and an associated plug are disclosed which the retractable connecting cable has a first connector and a second connector mounted respectively at two ends of a cable and a coupler. The coupler is configured for retaining the first connector and the second connector which makes the first connector, the second connector and the cable connected in a pile. plug comprises a movable plug and an adapter. The movable plug as a plug pattern formed on a side of the movable plug, and a first interface is formed on another side of the movable plug. The plug pattern is configured for operatively coupled to a socket of a mobile device. The adapter is connected to the connecting cable, and comprises a second interface. The second interface is configured to connect the first interface, wherein the second interface is rotatable relatively to the first interface.
    Type: Application
    Filed: November 5, 2019
    Publication date: May 6, 2021
    Inventor: CHAN JUNG HSU
  • Publication number: 20210124864
    Abstract: A power rail design method is disclosed that includes the steps outlined below. A plurality of power rails and a plurality of power domains corresponding thereto in an integrated circuit design file are identified. A design rule check for a plurality of circuit units in the integrated circuit design file is performed to retrieve a plurality of non-violating circuit regions that correspond to the power rails in each of the power domains. The power rails corresponding to at least part of the plurality of non-violating circuit regions in the integrated circuit design file are widened to occupy at least part of the non-violating circuit regions for the plurality of power rails.
    Type: Application
    Filed: October 22, 2020
    Publication date: April 29, 2021
    Inventors: Cheng-Chen HUANG, Yun-Ru WU, Hsin-Chang LIN, Shu-Yi KAO, Chih-Chan CHEN, Chia-Jung HSU, Li-Yi LIN
  • Publication number: 20210122699
    Abstract: A method for manufacturing and a method for decolorizing dioctyl terephthalate are provided. The decolorizing dioctyl terephthalate includes: providing an unpurified dioctyl terephthalate; mixing the unpurified dioctyl terephthalate with a reducing agent and an adsorption medium to obtain a first decolorizing product; and mixing the first decolorizing product with a decolorizing adsorbent material to obtain a second decolorizing product. The method for manufacturing dioctyl terephthalate includes: a transesterification step, an alkaline washing and neutralization step, a redox step, a decolorization step and a stripping step; the decolorizing adsorbent material has an acid value between 0.1 and 2 mg KOH/g, a relative humidity between 2 and 10%, and a fineness between 80 and 100 cm2 /g.
    Type: Application
    Filed: August 26, 2020
    Publication date: April 29, 2021
    Inventors: TE-CHAO LIAO, JUNG-JEN CHUANG, CHUNG-YU CHEN, CHE-JUNG HSU
  • Patent number: 10985264
    Abstract: A method for fabricating semiconductor device includes: forming a first semiconductor layer and an insulating layer on a substrate; removing the insulating layer and the first semiconductor layer to form openings; forming a second semiconductor layer in the openings; and patterning the second semiconductor layer, the insulating layer, and the first semiconductor layer to form fin-shaped structures.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: April 20, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chin-Hung Chen, Ssu-I Fu, Chih-Kai Hsu, Chia-Jung Hsu, Yu-Hsiang Lin
  • Publication number: 20210109022
    Abstract: A biosensor is provided. The biosensor includes a substrate, photodiodes, pixelated filters, an excitation light rejection layer and an immobilization layer. The substrate has pixels. The photodiodes are disposed in the substrate and correspond to one of the pixels, respectively. The pixelated filters are disposed on the substrate. The excitation light rejection layer is disposed on the pixelated filter. The immobilization layer is disposed on the excitation light rejection layer.
    Type: Application
    Filed: October 10, 2019
    Publication date: April 15, 2021
    Inventors: Hsin-Yi HSIEH, Chin-Chuan HSIEH, Wei-Ko WANG, Yu-Jen CHEN, Yi-Hua CHIU, Chung-Jung HSU
  • Publication number: 20210104900
    Abstract: A power hank is provided that comprises a body, a battery module and a plug assembly. The battery module is mounted inside the body. The plug assembly is pivotally connected to a first end of the body, electrically connects to the battery module, and has a plug, wherein the plug is corresponded to a socket and is configured to allow the battery module charges a mobile device. Accordingly, the power bank of the present invention does not require additional charging cable for charging the mobile device. The pivotal structure of the present invention allows the plug to rotate relative to the body which breaks out the limits of the conventional cover-type power bank.
    Type: Application
    Filed: October 5, 2019
    Publication date: April 8, 2021
    Inventor: CHAN JUNG HSU
  • Patent number: 10971397
    Abstract: A method of fabricating a semiconductor device includes the following steps. A substrate is provided. The substrate includes a pixel region having a first conductive region and a logic region having a second conductive region. A dielectric layer is formed on the substrate to cover the first conductive region. A first contact opening is formed in the dielectric layer to expose the first conductive region. A doped polysilicon layer is sequentially formed in the first contact opening. A first metal silicide layer is formed on the doped polysilicon layer. A second contact opening is formed in the dielectric layer to expose the second conductive region. A barrier layer and a metal layer are respectively formed in the first contact opening and the second contact opening.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: April 6, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Kai Hsu, Ssu-I Fu, Chia-Jung Hsu, Chun-Ya Chiu, Chin-Hung Chen, Yu-Hsiang Lin
  • Patent number: 10964277
    Abstract: A method for determining and controlling performance of pre-charge operations of a plurality of source lines in an ESL system includes: obtaining voltage data of a plurality of lines of a frame to be displayed by a display module in the ESL system; determining whether pre-charge of the source lines in a rest period of a first line is required according to an amount of forthcoming voltage transitions to be generated on the source lines and accordingly obtaining a determination result; and controlling performance of pre-charge operations of the source lines in the rest period of the first line according to the determination result. When the amount of forthcoming voltage transitions to be generated on the source lines exceeds a predefined threshold, pre-charge of the source lines in the rest period of the first line is determined as required.
    Type: Grant
    Filed: January 7, 2020
    Date of Patent: March 30, 2021
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventors: Kuang-Jung Hsu, Chih Hsu