Patents by Inventor Jung Lin

Jung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250259890
    Abstract: A method includes forming a first metallic feature, forming a dielectric layer over the first metallic feature, etching the dielectric layer to form an opening, with a top surface of the first metallic feature being exposed through the opening, and performing a first treatment on the top surface of the first metallic feature. The first treatment is performed through the opening, and the first treatment is performed using a first process gas. After the first treatment, a second treatment is performed through the opening, and the second treatment is performed using a second process gas different from the first process gas. A second metallic feature is deposited in the opening.
    Type: Application
    Filed: April 1, 2025
    Publication date: August 14, 2025
    Inventors: Chun-Hsien Huang, I-Li Chen, Pin-Wen Chen, Yuan-Chen Hsu, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai
  • Publication number: 20250254948
    Abstract: A high electron mobility transistor and a method for manufacturing the same are disclosed. The high electron mobility transistor includes an epi layer, a source, a drain, a gate structure and a gate metal. The source, the gate structure and the drain locate on the epi layer. The gate structure is located between the source and the drain. The gate structure includes a first doped semiconductor layer with a first width W1, a current suppression layer with a third width W3, and a second doped semiconductor layer with a first width W2, wherein W1>W2, W3=W2. The first doped semiconductor layer is disposed on the epi layer. The current suppression layer is disposed on the first doped semiconductor layer. The second doped semiconductor layer is disposed on the current suppression layer. The gate metal is disposed on the second doped semiconductor layer.
    Type: Application
    Filed: December 5, 2024
    Publication date: August 7, 2025
    Inventors: WEI-CHIH HO, PO-JUNG LIN
  • Patent number: 12369474
    Abstract: An organic light-emitting diode (OLED) display may have an array of organic light-emitting diode pixels that each have OLED layers interposed between a cathode and an anode. Voltage may be applied to the anode of each pixel to control the magnitude of emitted light. The conductivity of the OLED layers may allow leakage current to pass between neighboring anodes in the display. To reduce leakage current and the accompanying cross-talk, the display may include active and/or passive leakage-mitigating structures. The passive leakage-mitigating structures may have an undercut that causes discontinuities in the overlying OLED layers. Active leakage-mitigating structures may include a conductive layer (e.g., a conductive ring) that drains leakage current to ground. Alternatively, the active leakage-mitigating structures may include a gate electrode modulator with a variable voltage that stops the current flow laterally.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: July 22, 2025
    Assignee: Apple Inc.
    Inventors: Po-Chun Yeh, Jiun-Jye Chang, Doh-Hyoung Lee, Caleb Coburn, Niva A. Ran, Ching-Sang Chuang, Themistoklis Afentakis, Chuan-Jung Lin, Jung Yen Huang, Shinya Ono, Ting-Kuo Chang, Shih Chang Chang, Chih-Hung Yu, Chia-Yu Chen, Yung Fong Kao, Shih Lun Huang, Xingfeng He, Chieh-Wei Chen, Lei Yuan, Gwanwoo Park
  • Publication number: 20250226918
    Abstract: Systems, methods, and instrumentalities are disclosed for interleaving coded bits. A wireless transmit/receive unit (WTRU) may generate a plurality of polar encoded bits using polar encoding. The WTRU may divide the plurality of polar encoded bits into sub-blocks of equal size in a sequential manner. The WTRU may apply sub-block wise interleaving to the sub-blocks using an interleaver pattern. The sub-blocks associated with a subset of the sub-blocks may be interleaved, and sub-blocks associated with another subset of the sub-blocks may not be interleaved. The sub-block wise interleaving may include applying interleaving across the sub-blocks without interleaving bits associated with each of the sub-blocks. The WTRU may concatenate bits from each of the interleaved sub-blocks to generate interleaved bits, and store the interleaved bits associated with the interleaved sub-blocks in a circular buffer. The WTRU may select a plurality of bits for transmission from the interleaved bits.
    Type: Application
    Filed: February 27, 2025
    Publication date: July 10, 2025
    Applicant: InterDigital Patent Holdings, Inc.
    Inventors: Chunxuan Ye, Fengjun Xi, Sungkwon Hong, Kyle Jung-Lin Pan, Robert L. Olesen
  • Patent number: 12349108
    Abstract: A WTRU apparatus and method for operation thereby are provided. The method may comprise receiving, from a network, a mapping rule which indicates HARQ feedback characteristics to employ for a QoS level and a channel load. The WTRU may determine a QoS level of data buffered for transmission and may further determine a channel load of a channel. Based on the QoS level and channel load, HARQ feedback characteristics may be determined. The WTRU may then transmit an SCI to another WTRU which indicates the HARQ feedback characteristics. In an embodiment, the mapping rule may indicate that a HARQ feedback format is to be used for HARQ feedback of the data. The data may be transmitted and HARQ feedback of the data may be received in accordance with the HARQ feedback format. Groupcast data may be transmitted to a plurality of WTRUs and feedback my be received.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: July 1, 2025
    Assignee: InterDigital Patent Holdings, Inc.
    Inventors: Aata El Hamss, Martino M. Freda, Tao Deng, Tuong Duc Hoang, Chunxuan Ye, Fengjun Xi, Kyle Jung-Lin Pan
  • Patent number: 12347504
    Abstract: A memory device includes a memory array comprising a plurality of one-time-programmable (OTP) memory cells. Each of the plurality of OTP memory cells comprises a select transistor, a diode, and a conductor fuse. The diode and the conductor fuse are coupled in series, with the select transistor coupled to a common node between the diode and the conductor fuse.
    Type: Grant
    Filed: June 2, 2023
    Date of Patent: July 1, 2025
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TSING HUA UNIVERSITY
    Inventors: Chrong Jung Lin, Ya-Chin King, Li-Yu Wang
  • Publication number: 20250212127
    Abstract: Open loop power control may be based on an estimated pathloss. A set of transmission and reception points (TRPs) may provide a set of reference signals (RSs) to a reference point (RP). The RP, and/or the RP in conjunction with a network with which the RP is associated, may determine a RSRP for each received RS (signature of RSRPs). A WTRU may be configured with the signature of RSRPs. The TRP may provide the set of RSs to the WTRU. The WTRU may determine a set of RSRPs for the received RSs (RSRPWTRU). The WTRU may determine a difference between the signature RSs and RSRPWTRU. The WTRU may determine an estimated uplink pathloss associated with the WTRU and the RP based on the determined difference. The determined pathloss may be utilized in open-loop power control.
    Type: Application
    Filed: April 4, 2023
    Publication date: June 26, 2025
    Applicant: InterDigital Patent Holdings, Inc.
    Inventors: Patrick Svedman, Arman Shojaeifard, Allan Yingming Tsai, Kyle Jung-Lin Pan, Guodong Zhang
  • Publication number: 20250207600
    Abstract: An electrical conducting plate structure for axial fan includes a fan having a frame that internally defines an airflow passage; a base, a plurality of stationary blades, and a plurality of and conductor thin plates provided in the airflow passage; and a circuit board mounted on the base. The stationary blades are extended between and connected to the frame and the base, and the conductor thin plates are located between two adjacent stationary blades to extend across the airflow passage with two ends connected to the circuit board and the fan frame respectively. Since the conductor thin plates respectively have a thin and flat configuration, their upwind area against the airflow flowing through the airflow passage is minimized, which effectively reduces the fluid resistance in the airflow passage and enables upgraded fan static pressure and output air volume and reduced noise possibly produced by the fan in operation.
    Type: Application
    Filed: December 22, 2023
    Publication date: June 26, 2025
    Inventors: Hsu-Jung Lin, Ting-Yen Chiu, Yung-Chun Chou
  • Patent number: 12340839
    Abstract: A memory device includes a first active area, a first doped structure of a first doping type, a second active area, a first gate structure and a second doped structure of a second doping type different from the first doping type. The second active area is disposed between the first active area and the first doped structure. The first gate structure is disposed between the first active area and the second active area in a layout view, and configured to store a first bit with the first active area and the second active area. The second doped structure is coupled to the first gate structure and disposed between the first doped structure and the second active area. The second doped structure and the first doped structure are configured to receive a first signal corresponding to the first bit from the first gate structure.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: June 24, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Der Chih, Yun-Sheng Chen, Jonathan Tsung-Yung Chang, Hsin-Yuan Yu, Chrong Jung Lin, Ya-Chin King
  • Publication number: 20250202539
    Abstract: A WTRU may detect a reflected SSB transmission from a RIS. The reflected SSB is associated with an index. The WTRU may determine a source device of the reflected SSB transmission based on the index. For example, the WTRU may determine that the reflected SSB transmission was reflected by the RIS based on the index associated with the RIS. The WTRU may perform a random access procedure with a network device via the RIS based on the index. The SSB transmission may be associated with an SSB burst transmission comprising a plurality of SSB transmissions, where each of the plurality of SSB transmissions may be associated with the index. The plurality of SSB transmissions may comprise SSB transmissions reflected by the RIS and/or SSB transmissions not reflected by the RIS. The spatial state of the RIS may be maintained constant and/or may change during the SSB burst transmission.
    Type: Application
    Filed: April 3, 2023
    Publication date: June 19, 2025
    Applicant: InterDigital Patent Holdings, Inc.
    Inventors: Ibrahim Hemadeh, Allan Yingming Tsai, Patrick Svedman, Deepa Gurmukhdas Jagyasi, Kyle Jung-Lin Pan, Tezcan Cogalan, Guodong Zhang, Arman Shojaeifard
  • Patent number: 12336212
    Abstract: An improved high electron mobility transistor (HEMT) structure includes a substrate, a nitride nucleation layer, a nitride buffer layer, a nitride channel layer, and a barrier layer. The nitride buffer layer includes a metal dopant. The nitride channel layer has a metal doping concentration less than that of the nitride buffer layer. A two-dimensional electron gas is formed in the nitride channel layer along an interface between the nitride channel layer and the barrier layer. A metal doping concentration X at an interface between the nitride buffer layer and the nitride channel layer is defined as the number of metal atoms per cubic centimeter, and a thickness Y of the nitride channel later is in microns (?m) and satisfies Y?(0.2171)ln(X)?8.34, thereby reducing an influence of the metal dopant to a sheet resistance value of the nitride channel layer and providing the improved HEMT structure having a better performance.
    Type: Grant
    Filed: November 17, 2022
    Date of Patent: June 17, 2025
    Assignee: GLOBALWAFERS CO., LTD.
    Inventors: Po-Jung Lin, Jia-Zhe Liu
  • Publication number: 20250193848
    Abstract: A WTRU apparatus and method for operation thereby are provided. The method may comprise receiving, from a network, a mapping rule which indicates HARQ feedback characteristics to employ for a QoS level and a channel load. The WTRU may determine a QoS level of data buffered for transmission and may further determine a channel load of a channel. Based on the QoS level and channel load, HARQ feedback characteristics may be determined. The WTRU may then transmit an SCI to another WTRU which indicates the HARQ feedback characteristics. In an embodiment, the mapping rule may indicate that a HARQ feedback format is to be used for HARQ feedback of the data. The data may be transmitted and HARQ feedback of the data may be received in accordance with the HARQ feedback format. Groupcast data may be transmitted to a plurality of WTRUs and feedback may be received.
    Type: Application
    Filed: February 19, 2025
    Publication date: June 12, 2025
    Applicant: InterDigital Patent Holdings, Inc.
    Inventors: Aata El Hamss, Martino M. Freda, Tao Deng, Tuong Duc Hoang, Chunxuan Ye, Fengjun Xi, Kyle Jung-Lin Pan
  • Patent number: 12328731
    Abstract: A method and apparatus for transmitting uplink control information (UCI) for Long Term Evolution-Advanced (LTE-A) using carrier aggregation is disclosed. Methods for UCI transmission in the uplink control channel, uplink shared channel or uplink data channel are disclosed. The methods include transmitting channel quality indicators (CQI), precoding matrix indicators (PMI), rank indicators (RI), hybrid automatic repeat request (HARQ) acknowledgement/non-acknowledgement (ACK/NACK), channel status reports (CQI/PMI/RI), source routing (SR) and sounding reference signals (SRS). In addition, methods for providing flexible configuration in signaling UCI, efficient resource utilization, and support for high volume UCI overhead in LTE-A are disclosed.
    Type: Grant
    Filed: April 9, 2024
    Date of Patent: June 10, 2025
    Assignee: InterDigital Patent Holdings, Inc.
    Inventors: Erdem Bala, Philip J. Pietraski, Sung-Hyuk Shin, Guodong Zhang, Allan Y. Tsai, Joseph S. Levy, Pascal M. Adjakple, John W. Haim, Robert L. Olesen, Kyle Jung-Lin Pan
  • Publication number: 20250182632
    Abstract: The invention discloses a semi-open source control system for unmanned aerial vehicles and a design method thereof which is constructed single-chip multi-core processor and shared register on a UAV. A main processing core of the single-chip multi-core processor is built with a semi-open source control module configured to control the UAV. The semi-open source control module includes a closed source control function module and an open source control program module. The closed source control function module includes data processing function module, communication function module, flight control function module and hardware setting function module, enabling the semi-open source control module to perform power management, ground communication, aviation sensing, flight control, navigation calculation and flight record information processing of the UAV.
    Type: Application
    Filed: December 5, 2023
    Publication date: June 5, 2025
    Inventor: Huan-Jung Lin
  • Publication number: 20250172520
    Abstract: A method includes applying a first voltage to a source of a first transistor of a detection unit of a semiconductor detector in a test wafer and applying a second voltage to a gate of the first transistor and a drain of a second transistor of the detection unit. The first transistor is coupled to the second transistor in series, and the first voltage is higher than the second voltage. A pre-exposure reading operation is performed to the detection unit. Light of an exposure apparatus is illuminated to a gate of the second transistor after applying the first and second voltages. A post-exposure reading operation is performed to the detection unit. Data of the pre-exposure reading operation is compared with the post-exposure reading operation. An intensity of the light is adjusted based on the compared data of the pre-exposure reading operation and the post-exposure reading operation.
    Type: Application
    Filed: November 24, 2023
    Publication date: May 29, 2025
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TSING HUA UNIVERSITY
    Inventors: Ya-Chin KING, Chrong Jung LIN, Burn Jeng LIN, Ting-Kai HUANG, Wei CHANG
  • Publication number: 20250176014
    Abstract: Methods, systems, and devices for addressing collisions of possible random access channel (RACH) occasions. A wireless transmit receive unit (WTRU) may receive an indication of semi-static UL/DL information including configuration of RACH occasions in a remaining minimum system information (RMSI) and an indication of one or more actually transmitted synchronization signal (SS) blocks. The WTRU may then assess whether there are RACH occasions based on the configuration information and determine whether any of the RACH occasions are valid, wherein the RACH occasion may be valid based on Based on the RACH occasion is after all actually transmitted SS blocks indicated and/or whether an SS block override is disabled or enabled. The WTRU may transmit a RACH in one or more of the RACH occasions that have been determined to be valid.
    Type: Application
    Filed: January 30, 2025
    Publication date: May 29, 2025
    Applicant: InterDigital Patent Holdings, Inc.
    Inventors: Kyle Jung-Lin Pan, Fengjun Xi, Chunxuan Ye
  • Publication number: 20250168824
    Abstract: Methods, devices, and systems for resource allocation are disclosed herein. Specifically, a wireless transmit receive unit (WTRU) may measure a reference signal received power (RSRP) level and a received signal strength indicator (RSSI) value of one or more resources in each of a plurality of patterns. The WTRU may exclude, from the selection, each pattern for which at least one resource in the pattern is reserved by another WTRU and has an RSRP greater than a threshold. On a condition that at least one of the plurality of patterns is not excluded, the WTRU may select a pattern with a lowest pattern RSSI value and a one or more resources satisfying a quality of service (QoS) requirement of data of the WTRU. The WTRU may then transmit the data of the WTRU using the selected pattern.
    Type: Application
    Filed: January 17, 2025
    Publication date: May 22, 2025
    Applicant: InterDigital Patent Holdings, Inc.
    Inventors: Chunxuan Ye, Fengjun Xi, Hanqing Lou, Kyle Jung-Lin Pan
  • Publication number: 20250169125
    Abstract: A high electron mobility transistor includes a substrate, a nucleation layer, a buffer layer, a channel layer, and a barrier layer. The buffer layer includes a first buffer region, a second buffer region and a third buffer region. The first buffer region includes a first III-nitride stacked layer disposed on the nucleation layer and a second III-nitride stacked layer disposed on the first III-nitride stacked layer. The second buffer region is doped with carbon and iron. The third buffer region is doped with carbon and iron and has a carbon concentration greater than an iron concentration of the third buffer region. The second III-nitride stacked layer is doped with carbon and iron and has a carbon concentration greater than an iron concentration of the second III-nitride stacked layer.
    Type: Application
    Filed: October 22, 2024
    Publication date: May 22, 2025
    Applicant: HiPer Semiconductor Inc.
    Inventors: PO-JUNG LIN, WEI-CHEN YANG
  • Publication number: 20250167045
    Abstract: A method of fabricating a contact structure includes the following steps. An opening is formed in a dielectric layer. A conductive material layer is formed within the opening and on the dielectric layer, wherein the conductive material layer includes a bottom section having a first thickness and a top section having a second thickness, the second thickness is greater than the first thickness. A first treatment is performed on the conductive material layer to form a first oxide layer on the bottom section and on the top section of the conductive material layer. A second treatment is performed to remove at least portions of the first oxide layer and at least portions of the conductive material layer, wherein after performing the second treatment, the bottom section and the top section of the conductive material layer have substantially equal thickness.
    Type: Application
    Filed: January 23, 2025
    Publication date: May 22, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chang-Ting Chung, Shih-Wei Yeh, Kai-Chieh Yang, Yu-Ting Wen, Yu-Chen Ko, Ya-Yi Cheng, Min-Hsiu Hung, Chun-Hsien Huang, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai
  • Publication number: 20250167047
    Abstract: A semiconductor device is disclosed. The device includes a source/drain feature formed over a substrate. A dielectric layer formed over the source/drain feature. A contact trench formed through the dielectric layer to expose the source/drain feature. A titanium nitride (TiN) layer deposited in the contact trench and a cobalt layer deposited over the TiN layer in the contact trench.
    Type: Application
    Filed: January 17, 2025
    Publication date: May 22, 2025
    Inventors: Chun-Hsien Huang, Wei-Jung Lin, Hsien-Lung Yang, Yu-Kai Chen, Hong-Mao Lee