Abstract: Methods, devices and systems are provided for performing a random access (RA) procedure. A wireless transmit/receive unit (WTRU) may be configured to receive RA resource sets, where each of the RA resource sets is associated with a node-B directional beam, select an RA resource set from among the RA resource sets, and initiate an RA procedure based on the selected RA resource set. The RA procedure may include selecting multiple preambles which include a preamble for each resource of a plurality of resources corresponding to the selected RA resource set. The WTRU may be configured to sequentially transmit the selected multiple preambles in sequential RA transmissions, and may be configured to receive, from a node-B, in response to the RA transmissions, at least one RA response (RAR), where each of the received at least one RAR corresponds to one of the transmitted multiple preambles.

Abstract: A method for performing network control in a wireless communications system and associated apparatus are provided. The method may include: carrying a set of link information in a preamble of a first data transmission frame transmitted from the first network device to a second network device, wherein the set of link information may include at least one indication among the following indications: a destination device indication, a device assignment indication and a transmission power control indication; wherein a third network device is arranged to monitor wireless transmission in the wireless communications system to obtain the set of link information from the first data transmission frame, and determine spatial reuse (SR) transmission availability of the third network device based on the set of link information.

Abstract: A semiconductor structure includes a first tier, a redistribution circuit structure, and a second tier. The first tier includes at least one first die. The redistribution circuit structure is disposed on the first tier and electrically coupled to the at least one first die, where the redistribution circuit structure has a multi-layer structure and includes a vertical connection structure continuously extending from a first side of the redistribution circuit structure to a second side of the redistribution circuit structure, and the first side is opposite to the second side along a stacking direction of the first tier and the redistribution circuit structure. The second tier includes a plurality of second dies, and is disposed on and electrically coupled to the redistribution circuit structure.

Abstract: A display may include an array of pixels. Each pixel in the array includes an organic light-emitting diode coupled to associated thin-film transistors. The diode may be coupled to drive transistor circuitry, a data loading transistor, and emission transistors. The drive transistor circuitry may include at least two transistor portions connected in series. The data loading transistor has a drain region connected to a data line and a source region connected directly to the drive transistor circuitry. The data line may be connected to and overlap the drain region of the data loading transistor. The data line and the source region of the data loading transistor are non-overlapping to reduce row-to-row crosstalk.

Abstract: A method and apparatus for performing sidelink communications in a wireless transmit receive unit (WTRU) using Long Term Evolution (LTE) and New Radio (NR) technologies is described herein. A WTRU receives downlink control information (DCI) on a physical downlink control channel (PDCCH) from a gNodeB (gNB), wherein the DCI is associated with a cyclic redundancy check (CRC). The a determination is made as to whether the DCI is for an LTE or NR technology sidelink transmission. On a condition that the DCI is for NR technology, the WTRU determines which transmit modulation and coding scheme (MCS) table to apply based on the masking of at least some of the bits in the CRC. Then the WTRU transmits sidelink data on resources indicated by the DCI using the determined MCS table. The WTRU may also receive HARQ feedback on resources indicated by the DCI for HARQ feedback.

Abstract: Methods and apparatus for sounding reference signal (SRS) power control for a wireless transmitter/receiver unit (WTRU) are disclosed. These methods and apparatus include methods and apparatus for carrier-specific and carrier-common SRS power control in WTRUs that utilize carrier aggregation techniques. These methods and apparatus also include methods and apparatus for SRS power control in WTRUs utilizing both carrier aggregation and time division multiplexing (TDM) techniques. Additionally, these methods and apparatus include methods and apparatus for SRS power control for WTRUs utilizing multiple input multiple output MIMO operation. Methods and apparatus for SRS overhead reduction and power management in a WTRU are also disclosed.

Abstract: A WTRU may select sidelink unicast or groupcast to transmit data. If the WTRU selects sidelink unicast, the WTRU may select to use HARQ ACK/NACK feedback for the transmission. If the WTRU selects sidelink groupcast, either HARQ NACK or HARQ ACK/NACK may be selected depending upon one or more factors. The WTRU may select HARQ NACK or HARQ ACK/NACK depending upon one or more of: a number of WTRUs to receive the data; a condition of a channel associated with transmission; or a quality of service associated with transmission. The WTRU may select a first or second PSFCH format for feedback based upon one or more factors. The WTRU may select a first or second PSFCH format based upon one or more of: the selected sidelink unicast or groupcast; the selected HARQ NACK or HARQ ACK/NACK feedback; or a quality of service associated with the transmission.

Abstract: A request to perform a write operation at a memory device is received. Current wordline start voltage (WLSV) information associated with a particular memory segment of the plurality of memory segments is retrieved. The write operation is performed on the particular memory segment. In a firmware record in a memory sub-system controller, information is stored indicative of a last written memory page associated with the particular memory segment on which the write operation is performed. The firmware record is managed in view of the information indicative of the last written memory page associated with the performed write operation. Each entry of the firmware record comprises one or more identifying indicia associated with a respective memory segment, at least one of the identifying indicia being a wordline start voltage (WLSV) associated with the respective memory segment.

Abstract: A chip package having four sides provided with electromagnetic interference (EMI) shielding layers correspondingly and a method of manufacturing the same are provided. The four EMI shielding layers are made of metals, located on four lateral sides of the chip package, and completely covering four lateral sides of a substrate and four lateral sides of an insulating layer to prevent at least one first circuit layer, at least one second circuit layer, and at least one chip from electromagnetic interference. Moreover, the EMI shielding layers help to improve heat dissipation efficiency of the first circuit layer, the second circuit layer, and the chip.

Abstract: A light-emitting element structure includes a substrate, a nucleation layer located above the substrate, a buffer layer located above the nucleation layer, a first nitride layer located above the buffer layer and being in contact with the buffer layer, a second nitride layer located above the first nitride layer and being in contact with the first nitride layer, a first semiconductor layer located above the second nitride layer, a light-emitting layer, and a second semiconductor layer located above the light-emitting layer. A film thickness of the first nitride layer is smaller than a film thickness of the second nitride layer. A dislocation defect density of the second nitride layer is smaller than or equal to 3×109 cm?2. The light-emitting layer is located above the first semiconductor layer and is adapted to emit light when electrons and holes recombine.

Abstract: An organic light-emitting diode (OLED) display may have an array of organic light-emitting diode pixels that each have OLED layers interposed between a cathode and an anode. Voltage may be applied to the anode of each pixel to control the magnitude of emitted light. The conductivity of the OLED layers may allow leakage current to pass between neighboring anodes in the display. To reduce leakage current and the accompanying cross-talk, the display may include active and/or passive leakage-mitigating structures. The passive leakage-mitigating structures may have an undercut that causes discontinuities in the overlying OLED layers. Active leakage-mitigating structures may include a conductive layer (e.g., a conductive ring) that drains leakage current to ground. Alternatively, the active leakage-mitigating structures may include a gate electrode modulator with a variable voltage that stops the current flow laterally.

Abstract: Methods, systems, and devices for addressing collisions of possible random access channel (RACH) occasions. A wireless transmit receive unit (WTRU) may receive an indication of semi-static UL/DL information including configuration of RACH occasions in a remaining minimum system information (RMSI) and an indication of one or more actually transmitted synchronization signal (SS) blocks. The WTRU may then assess whether there are RACH occasions based on the configuration information and determine whether any of the RACH occasions are valid, wherein the RACH occasion may be valid based on Based on the RACH occasion is after all actually transmitted SS blocks indicated and/or whether an SS block override is disabled or enabled. The WTRU may transmit a RACH in one or more of the RACH occasions that have been determined to be valid.

Abstract: A method may comprise receiving a first signal comprising first LDPC bits including systematic bits and parity bits and transmitting information indicating that the first signal was incorrectly received. A second signal comprising second LDPC bits may be received in response to the transmitting. The second signal may include LDPC bits according to a lifting size of an LDPC base graph.

Abstract: A fan braking structure includes a fan including a frame having an upright bearing cup, and a fan impeller having a vertical rotating shaft pivotally received in the bearing cup and provided at a free end with a groove; a braking structure located at a lower part of the bearing cup and including a brake plate and an electromagnet, and the brake plate being provided at one side with a protruded brake pin and at another side with a magnetic member; and an elastic element disposed between and pressed against a top of the shell and the brake plate. When the fan is inactive, the electromagnet is energized to produce magnetic poles that repel the magnetic member and compress the elastic element, such that the brake pin is magnetically pushed toward the rotating shaft to engage with the groove, causing the fan to brake and stop rotating inertially.

Abstract: A fan braking structure includes a fan including a frame having an upright bearing cup, and a fan impeller having a vertical rotating shaft pivotally received in the bearing cup and provided at a free end with a groove; a braking structure located at a lower part of the bearing cup and including a brake plate and an electromagnet, and the brake plate being provided at one side with a protruded brake pin and at another side with a magnetic member; and an elastic element disposed between and pressed against the brake plate and the electromagnet. When the fan is powered off, the electromagnet is energized and produces magnetic poles that magnetically repel the magnetic member, such that the brake pin is pushed by a magnetic force and the elastic element toward the rotating shaft to engage with the groove, causing the fan to brake and stop rotating inertially.

Abstract: A chip package with an electromagnetic interference shielding layer and a method of manufacturing the same are provided. The chip package includes a substrate, at least one first circuit layer, at least one second circuit layer, at least one chip, a first insulating layer, and at least one electromagnetic interference shielding layer. The electromagnetic interference shielding layer is made of metals and covering a first surface of the first insulating layer completely for preventing the respective first circuit layers, the respective second circuit layers, and the respective chips from external electromagnetic interference (EMI).

Abstract: A fan brake structure includes a fan and a brake device. The fan has a frame body, a fan impeller and a stator. The brake device is disposed under a bottom of a bearing cup. The brake device has a driving member, a brake member and an elastic member. The elastic member abuts against one end of the brake member. The other end of the brake member has a boss body. The driving member has a spiral rail. When the driving member rotates, the boss body moves along the spiral rail, whereby the brake member linearly reciprocally moves upward to brake the fan impeller or linearly reciprocally moves downward to release the fan impeller from the braking.

Abstract: Methods, systems, and apparatus for supporting uplink Transmission Time Interval (TTI) bundling in Long Term Evolution (LTE) are provided. Methods, systems, and apparatus for signaling, activation/deactivation, and wireless transmit/receive unit (WTRU) behavior are also provided.

Abstract: A device includes an active region, an isolation structure, a gate structure, an interlayer dielectric (ILD) layer, a reading contact, and a sensing contact. The isolation structure laterally surrounds the active region. The gate structure is across the active region. The ILD layer laterally surrounds the gate structure. The reading contact is in contact with the isolation structure and is separated from the gate structure by a first portion of the ILD layer. The sensing contact is in contact with the isolation structure and is separated from the gate structure by a second portion of the ILD layer.

Abstract: A chip package unit, a method of manufacturing the same, and package structure formed by stacking the same are provided. At least one first connecting pad, at least one second connecting pad, and at least one third connecting pad of a flexible printed circuit (FPC) board in the chip package unit are electrically connected with one another by circuit of the FPC board. At least one die pad disposed on a front surface of a chip is electrically connected with the first connecting pad first and then electrically connected with the outside by the second connecting pad or the third connecting pad. Thereby the chip of the chip package unit can be electrically connected with the outside by the front surface or a back surface thereof. Therefore, not only production is reduced due to simplified production process and energy saved, volume of the package structure is also reduced.