Abstract: The present disclosure provides a composition for biological pretreatment of hemicellulose and lignin, comprising a red oleaginous yeast strain. Further, the present disclosure discloses a method for biological pretreatment of hemicellulose and lignin using a red oleaginous yeast strain, and a method for enzymatic saccharification comprising the same. According to the present disclosure, the efficiency of producing sugars from lignocellulosic biomass can be increased by biologically pretreating hemicellulose and lignin without sugar loss.

Abstract: The present invention relates to a composition for endometrial regeneration containing a uterus-derived decellularized extracellular matrix (UdECM) and a manufacturing method therefor. Characterized by containing uterus-derived decellularized extracellular matrix (UdECM), the composition can exhibit the effect of enhancing the regeneration, receptivity, and implantation capabilities of the endometrium.

Abstract: A homomorphic operation system according to an embodiment includes a homomorphic encryption device configured to output a first ciphertext data generated based on a first base, a homomorphic encryption server including a storage device storing base conversion table configured to convert ciphertext data based on the first base into a second ciphertext data based on a second base and the first ciphertext data received from the homomorphic encryption device, and a homomorphic encryption operation device configured to perform a predetermined operation using the base conversion table on the first ciphertext data to convert the first ciphertext data into the second ciphertext data based on the second base.

Abstract: The present disclosure provides a recombinant microorganism for producing PHBV, a method for preparing the same, and a method for producing PHBV using the microorganism. The present disclosure may provide a recombinant microorganism capable of producing PHBV, which is a biodegradable plastic material with superior physical properties, directly from an inexpensive single carbon source with high efficiency without supplementation of organic acid. The present disclosure can enhance the utilization of PHA, which is expensive and has limited physical properties, and can also provide a technology more effective for industrialization using an inexpensive single carbon source. The PHBV produced according to an exemplary embodiment of the present disclosure can be used not only for general-purpose inexpensive products such as ecofriendly packing materials but also as a high-value-added medical biopolymer.

Abstract: An image sensor includes a substrate, a photoelectric conversion region inside the substrate, a first active pattern protruding from a surface of the substrate, an element isolation pattern covering at least a part of a side face of the first active pattern, a first gate electrode on the first active pattern and the element isolation pattern, a lower face of the first gate electrode being lower than an upper face of the first active pattern, a first source/drain region inside the first active pattern adjacent to one face of the first gate electrode and a second source/drain region inside the first active pattern adjacent to the other face of the first gate electrode. A first depth of the first source/drain region is greater than a second depth of the second source/drain region from an upper surface of the first active pattern.

Abstract: Disclosed herein are an enzyme capable of degrading a highly recalcitrant plastic or a variant thereof, a composition comprising the same, and a method of degrading a highly recalcitrant plastic using the same. In addition, according to the present disclosure, polyethylene (PE) as a highly recalcitrant plastic can be effectively degraded as well as oxidized PE, which can be useful for developing plastic waste treatment and upcycling of plastic waste.

Abstract: Disclosed is a server device. The server device includes a communication unit configured to perform communication with an electronic device; a memory configured to store an artificial intelligence (AI) model for performing computation in an encrypted state; and a processor, in which the processor is configured tobased on receiving homomorphic ciphertext of CinS-encoded data obtained by performing CinS encoding on a plurality of images from the electronic device through the communication unit, transmit the encryption computation result to the electronic device through the communication unit by obtaining an encryption computation result by inputting the homomorphic ciphertext to the AI model, wherein. the AI model performs each of convolutional computation based on the CinS-encoded data and activation function computation based on slot-encoded data converted from the CinS-encoded data a plurality of times.

Abstract: Disclosed is an electronic device. The electronic device includes: a communication unit configured to perform communication with a server device storing an artificial intelligence (AI) model that performs computation in an encrypted state; a memory configured to store a plurality of images; a processor configured to divide each of the plurality of images into a plurality of divided images and list all the divided images in a form of a one-dimensional vector to perform slot encoding, and configured to obtain CinS-encoded data in a form of a frequency signal by performing discrete Fourier transform (DFT) on slot-encoded data in units of slots corresponding to each image and transmit a homomorphic ciphertext obtained by performing homomorphic encryption on the CinS-encoded data to the server device through the communication unit; and a display.

Abstract: A memory controller includes a plurality of computing units and a controller. The plurality of computing units perform calculations related to a matrix multiplication. The controller identify first information indicating a plurality of vectors required for the calculations with respect to a plurality of rows of a matrix, identify second information indicating at least one row to which each of the plurality of vectors corresponds among the plurality of rows, and control the plurality of computing units to perform the calculations with respect to the plurality of rows by sequentially inputting the plurality of vectors into the plurality of computing units based on the first information and the second information.

Abstract: Proposed are counter-based selective row hammer refresh apparatus and method for row hammer prevention and, more particularly, proposed are an apparatus and a method for reducing energy consumption of dynamic random access memory (DRAM) by improving counter-based algorithms for solving a row hammer problem when applying a refresh management (RFM) command that is a new command applied to the latest DRAM standards, such as DDR5, LPDDR5, and the like.

Abstract: The present disclosure relates to a biomimetic chip for three-dimensionally simulating an endometrium, and an endometrium simulating method using the biomimetic chip. The biomimetic chip according to an embodiment of the present disclosure is a three-dimensional biomimetic chip including a plate, a plurality of chambers, and a plurality of posts, which are arranged between the plurality of chambers, wherein the plurality of chambers include channels in which different cells are cultured, are arranged on the plate to be parallel to each other in one direction, and are arranged adjacent to each other such that at least some sections communicate with each other.

Abstract: A method with a number-theoretic transform (NTT) operation includes allocating an element of a matrix to a data lane such that elements in a first column of the matrix corresponding to a polynomial are allocated to the data lane of a first lane group among lane groups, wherein the matrix is a square matrix, and a number of elements comprised in the matrix is N, performing a first NTT operation on a data lane of a fourth root of the N for each of the lane groups, allocating a result of the first NTT operation to the data lane such that the matrix is transposed, based on adjustment of a reading order of a buffer that stores the result of the first NTT operation, and performing a second NTT operation on the data lane of the fourth root of the N for each of the lane groups.

Abstract: Disclosed are a motor control device and method for semiconductor process equipment, more particularly a motor control technology for semiconductor process equipment capable of applying a line drive type signal processing technique to determine an error of an operation signal of a motor and compensating for the error to perform sensorless control of the motor.

Abstract: A homomorphic operation system according to an embodiment includes a homomorphic encryption device configured to output a first ciphertext data generated based on a first base, a homomorphic encryption server including a storage device storing base conversion table configured to convert ciphertext data based on the first base into a second ciphertext data based on a second base and the first ciphertext data received from the homomorphic encryption device, and a homomorphic encryption operation device configured to perform a predetermined operation using the base conversion table on the first ciphertext data to convert the first ciphertext data into the second ciphertext data based on the second base.

Abstract: The present disclosure discloses a strain having resistance by neutralizing furfural, an inhibitor derived from lignocellulosic biomass, based on a technique using aldehyde dehydrogenase and a method of using the same. According to the present disclosure, furfural, an inhibitor derived from lignocellulosic biomass, is neutralized based on a technique using aldehyde dehydrogenase, so that a resistant strain overexpresses aldehyde dehydrogenase (EcAldH) in Yarrowia lipolytica, which has the ability to produce yeast oil, and has resistance to furfural, a biomass-derived inhibitor. Accordingly, even in the medium containing furfural, it can provide excellent strain growth and yeast oil production ability.

Abstract: A device including processors configured to execute instructions and memories storing the instructions, which when executed by the processors configure the processors to perform an operation for training a transformer model having a plurality of encoders and a plurality of decoders by configuring the processors to identify the batches of training data into a plurality of micro-batches, select layer pairs for the plurality of micro-batches, assemble a processing order of the layer pairs, determining resource information to be allocated to the layer pairs, and allocate resources to the layer pairs based on the determined resource information to be allocated to the layer pairs, dependent con the processing order of the layer pairs.

Abstract: A device and method with batch normalization are provided. An accelerator includes: core modules, each core module including a respective plurality of cores configured to perform a first convolution operation using feature map data and a weight; local reduction operation modules adjacent to the respective core modules, each including a respective plurality of local reduction operators configured to perform a first local operation that obtains first local statistical values of the corresponding core module; a global reduction operation module configured to perform a first global operation that generates first global statistical values of the core module based on the first local statistical values of the core modules; and a normalization operation module configured to perform a first normalization operation on the feature map data based on the first global statistical values.

Abstract: A device including processors configured to execute instructions and memories storing the instructions, which when executed by the processors configure the processors to perform an operation for training a transformer model having a plurality of encoders and a plurality of decoders by configuring the processors to identify the batches of training data into a plurality of micro-batches, select layer pairs for the plurality of micro-batches, assemble a processing order of the layer pairs, determining resource information to be allocated to the layer pairs, and allocate resources to the layer pairs based on the determined resource information to be allocated to the layer pairs, dependent con the processing order of the layer pairs.

Abstract: An accelerator includes: a memory configured to store input data; a plurality of shift buffers each configured to shift input data received sequentially from the memory in each cycle, and in response to input data being stored in each of internal elements of the shift buffer, output the stored input data to a processing element (PE) array; a plurality of backup buffers each configured to store input data received sequentially from the memory and transfer the stored input data to one of the shift buffers; and the PE array configured to perform an operation on input data received from one or more of the shift buffers and on a corresponding kernel.

Abstract: The present disclosure is to provide a method capable of producing an organic acid in high yield from an acetic acid strain using synthesis gas as a substrate. According to the present disclosure, the productivity of metabolites with C2 to C6 carbon atoms derived from synthesis gas and the selectivity of hexanoic acid production among metabolites can be improved through a first fermentation step of simultaneously providing a substrate comprising synthesis gas and sugar; and a second fermentation step of semi-mixotrophic fermentation of providing only the substrate comprising the synthesis gas. Therefore, the disclosure can contribute to sustainable chemical production using synthesis gas.