Patents by Inventor Junichi Kimura

Junichi Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130179822
    Abstract: A character information display device includes: a display format deciding part 2 for deciding that the display format of a character string to be displayed is telop display when the number of characters making up the character string exceeds the number of characters for one line on the screen; a scroll speed setting part 6 for setting the scroll speed of the character string to be displayed at a reference speed in a case where the character string is judged as a character string easy to read, and setting the scroll speed of the character string to be displayed at a slower speed than the reference speed in a case where the character string is judged as a character string difficult to read by a reading difficulty judging part 4; and so on.
    Type: Application
    Filed: October 5, 2011
    Publication date: July 11, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Shinyoung Park, Junichi Kimura
  • Publication number: 20120317442
    Abstract: The redundancy that is effected by preparing a plurality of units of hardware of an identical configuration results in high costs, complicating the application of same to inexpensive products. The present invention detects a fault in a function that is provided via hardware upon an apparatus having a variety of components, such as a CPU, capable of changing content to be processed at the application level, and an FPGA, capable of changing the content to be processed. When a fault is thus detected, the invention uses configuration information of an apparatus either within the apparatus or within apparatuses upon the network to select an apparatus capable of serving as a substitute, selects software required to implement the function, carries out procedures for facilitating the use of the software upon the substitute hardware (i.e., downloading the software, loading the software into a memory region accessible to the hardware), and carries out the processing in substitution.
    Type: Application
    Filed: January 12, 2011
    Publication date: December 13, 2012
    Applicant: HITACHI, LTD.
    Inventors: Takehiko Nagano, Junichi Kimura
  • Publication number: 20120176204
    Abstract: An oscillator circuit includes a clock oscillator which outputs a main clock signal having an oscillating frequency switched between a high frequency and a low frequency in response to a frequency selection signal, and a frequency divider circuit which outputs a sub-clock signal having a divided frequency equivalent to a frequency division ratio of the oscillating frequency of the main clock signal, the frequency division ratio being switched in response to the frequency selection signal. The divided frequency of the sub-clock signal is predetermined for each of the high frequency and the low frequency to which the oscillating frequency is switched in response to the frequency selection signal.
    Type: Application
    Filed: January 5, 2012
    Publication date: July 12, 2012
    Applicant: MITSUMI ELECTRIC CO., LTD.
    Inventors: Makio Abe, Fumihiro Inoue, Junichi Kimura
  • Patent number: 8217515
    Abstract: A semiconductor mounting substrate according to the present invention comprises: a substrate; a semiconductor device, mounted on this substrate; solder bumps, which connect the semiconductor device and the substrate; a first resin, filled in a space between the semiconductor device and the substrate; and electronic components, mounted on a face side of the semiconductor device where the semiconductor device is mounted, wherein bond strength reinforcing resin section is provided at least between a side face in the vicinity of a corner part of the semiconductor device and a substrate surface of the substrate in a position corresponding to the corner part.
    Type: Grant
    Filed: February 22, 2011
    Date of Patent: July 10, 2012
    Assignee: Panasonic Corporation
    Inventors: Junichi Kimura, Hideki Niimi, Yuji Fuwa, Tsuyoshi Sakaue
  • Patent number: 8160146
    Abstract: A method and apparatus for coding an image includes calculation of motion vectors of vertices of a patch in an image being encoded and transmitting information of horizontal and vertical components of the motion vectors of the vertices and information specifying that values of the horizontal and vertical components of a motion vector for each pixel in the patch are integral multiples of 1/d of a distance between adjacent pixels, where d is an integer not less than 2.
    Type: Grant
    Filed: October 23, 2007
    Date of Patent: April 17, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Yuichiro Nakaya, Junichi Kimura
  • Patent number: 8155186
    Abstract: A conventional coding method has a problem that, for frame-by-frame reverse playback, data must be once decoded in a forward direction and thus a larger volume of data must be processed and a larger volume of memory is required. By recoding a forward predicted picture and a backward predicted picture for a frame in a bit stream, the bit stream can be played back reversely frame by frame easily. By the use of this method for multi-viewpoint video coding, a device that can play back pictures while varying the viewpoint in real time is realized.
    Type: Grant
    Filed: August 11, 2004
    Date of Patent: April 10, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Tomokazu Murakami, Junichi Kimura
  • Patent number: 8155199
    Abstract: A method and apparatus for coding an image includes calculation of motion vectors of vertices of a patch in an image being encoded and transmitting information of horizontal and vertical components of the motion vectors of the vertices and information specifying that values of the horizontal and vertical components of a motion vector for each pixel in the patch are integral multiples of 1/d of a distance between adjacent pixels, where d is an integer not less than 2.
    Type: Grant
    Filed: October 23, 2007
    Date of Patent: April 10, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Yuichiro Nakaya, Junichi Kimura
  • Patent number: 8135070
    Abstract: A method and apparatus for coding an image includes calculation of motion vectors of vertices of a patch in an image being encoded and transmitting information of horizontal and vertical components of the motion vectors of the vertices and information specifying that values of the horizontal and vertical components of a motion vector for each pixel in the patch are integral multiples of 1/d of a distance between adjacent pixels, where d is an integer not less than 2.
    Type: Grant
    Filed: October 23, 2007
    Date of Patent: March 13, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Yuichiro Nakaya, Junichi Kimura
  • Publication number: 20110305280
    Abstract: A compressed dynamic image encoding device is provided, in which a motion vector is generated by searching a reference image read from a frame memory for an image area most similar to an image area of a video input signal; a motion-compensated reference image is generated from the motion vector and the reference image read from the frame memory; a prediction residual is generated, by subtracting the motion-compensated reference image from the video input signal; the reference image to be stored in the frame memory is generated, by adding the motion-compensated reference image and the result of processing of orthogonal transform, quantization, inverse quantization, and inverse orthogonal transform performed to the prediction residual; and an encoded video output signal is generated by the processing of orthogonal transform, quantization, and variable-length encoding performed to the prediction residual.
    Type: Application
    Filed: March 4, 2009
    Publication date: December 15, 2011
    Inventors: Seiji Mochizuki, Junichi Kimura, Masakazu Ehama
  • Publication number: 20110280305
    Abstract: Adopted is a decoder, in which on condition that a prediction block shown by vector information extracted from a data stream, and a decode-target block have an overlap where respective pixels overlay each other, pixel information of an already-decoded portion at a distance of an integer multiple of a vector provided by the vector information from the overlap is made a prediction signal instead of the overlap, and the prediction signal is added to difference image data taken from the data stream to generate reproduction image data. The decoder is adopted for an intra-frame decoder, a local decoder of an encoder, and the like. According to a fundamental rule concerning a repetitive pattern of an image, a pixel at a distance of an integer multiple is a like pixel, and therefore the process of decoding can be performed efficiently.
    Type: Application
    Filed: June 15, 2009
    Publication date: November 17, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Seiji Mochizuki, Yutaka Funabashi, Junichi Kimura, Masakazu Ehama
  • Publication number: 20110216661
    Abstract: Disclosed is a communication control device for measuring the delivery quality of unicast/multicast video delivery by a user premises device. The communication control device connects a first network to a second network. The first network is connected to a delivery server for delivering data packets containing plural pieces of content. The second network is connected to a plurality of computers for acquiring the data packets from the delivery server. The communication control device acquires control information that is transmitted from the computers to the delivery server, extracts computer identification information and data packet identification information from the acquired control information, and measures the delivery quality of data packets targeted for measurement, which are to be transmitted to the identified computers, in accordance with the extracted computer identification information and the extracted data packet identification information.
    Type: Application
    Filed: December 28, 2010
    Publication date: September 8, 2011
    Applicant: Hitachi, Ltd.
    Inventors: Mitsuhiro IMAI, Junichi Kimura
  • Publication number: 20110140270
    Abstract: A semiconductor mounting substrate according to the present invention comprises: a substrate; a semiconductor device, mounted on this substrate; solder bumps, which connect the semiconductor device and the substrate; a first resin, filled in a space between the semiconductor device and the substrate; and electronic components, mounted on a face side of the semiconductor device where the semiconductor device is mounted, wherein bond strength reinforcing resin section is provided at least between a side face in the vicinity of a corner part of the semiconductor device and a substrate surface of the substrate in a position corresponding to the corner part.
    Type: Application
    Filed: February 22, 2011
    Publication date: June 16, 2011
    Inventors: JUNICHI KIMURA, Hideki Niimi, Yuji Fuwa, Tsuyoshi Sakaue
  • Patent number: 7919359
    Abstract: A semiconductor mounting substrate according to the present invention comprises: a substrate; a semiconductor device, mounted on this substrate; solder bumps, which connect the semiconductor device and the substrate; a first resin, filled in a space between the semiconductor device and the substrate; and electronic components, mounted on a face side of the semiconductor device where the semiconductor device is mounted, wherein bond strength reinforcing resin section is provided at least between a side face in the vicinity of a corner part of the semiconductor device and a substrate surface of the substrate in a position corresponding to the corner part.
    Type: Grant
    Filed: October 17, 2007
    Date of Patent: April 5, 2011
    Assignee: Panasonic Corporation
    Inventors: Junichi Kimura, Hideki Niimi, Yuji Fuwa, Tsuyoshi Sakaue
  • Publication number: 20100146779
    Abstract: A component-embedded printed wiring board (PWB) is disclosed. This PWB includes (a) a fluid-resin embedding section formed at a location corresponding to electronic components such that the embedding section covers the electronic components, (b) a resin flow-speed accelerator placed in parallel with a top face of a circuit board and surrounding the embedding section, and (c) bonding resin placed at least between the accelerator and the circuit board. The fluid resin embedding section is filled up with the same resin as the bonding resin. This structure allows the accelerator to compress the resin with pressure applied to the PWB, so that the resin tends to flow along the circuit board. As a result, the fluid-resin embedding section is thoroughly filled up with the resin without leaving any air, and the reliable PWB is thus obtainable.
    Type: Application
    Filed: February 22, 2010
    Publication date: June 17, 2010
    Inventors: Kazuhiko HONJO, Toshihiko MORI, Eiji KAWAMOTO, Junichi KIMURA, Motoyoshi KITAGAWA
  • Publication number: 20100147569
    Abstract: A component-embedded printed wiring board (PWB) is disclosed. This PWB includes (a) a fluid-resin embedding section formed at a location corresponding to electronic components such that the embedding section covers the electronic components, (b) a resin flow-speed accelerator placed in parallel with a top face of a circuit board and surrounding the embedding section, and (c) bonding resin placed at least between the accelerator and the circuit board. The fluid resin embedding section is filled up with the same resin as the bonding resin. This structure allows the accelerator to compress the resin with pressure applied to the PWB, so that the resin tends to flow along the circuit board. As a result, the fluid-resin embedding section is thoroughly filled up with the resin without leaving any air, and the reliable PWB is thus obtainable.
    Type: Application
    Filed: February 22, 2010
    Publication date: June 17, 2010
    Inventors: Kazuhiko Honjo, Toshihiko Mori, Eiji Kawamoto, Junichi Kimura, Motoyoshi Kitagawa
  • Patent number: 7704797
    Abstract: A method of manufacturing a module, formed of a semiconductor element flip-chip bonded to a substrate and chip component soldered to the substrate, is disclosed. The method includes a step of mounting the chip component and the semiconductor element to the substrate, a first injection step for injecting first resin from a center of a lateral face of the semiconductor element into a gap between the semiconductor element and the substrate, a second injection step for applying second resin having a greater viscosity than the first resin to corners of the semiconductor element before the first resin reaches the corners, and a curing step for heating the module. This method allows mounting the chip component closer to the semiconductor element, so that the component can be mounted at a higher density on the module.
    Type: Grant
    Filed: July 16, 2007
    Date of Patent: April 27, 2010
    Assignee: Panasonic Corporation
    Inventors: Junichi Kimura, Yoshitsugu Uenishi, Masanori Sadano, Yoshihisa Maehata, Nobuhiro Tada
  • Patent number: 7694415
    Abstract: The printed wiring board (PWB) includes (a) a fluid-resin embedding section formed at a location corresponding to electronic components such that the embedding section covers the electronic components, (b) a resin flow-speed accelerator placed in parallel with a top face of a circuit board and surrounding the embedding section, and (c) bonding resin placed at least between the accelerator and the circuit board. The fluid resin embedding section is filled up with the same resin as the bonding resin. This structure allows the accelerator to compress the resin with pressure applied to the PWB, so that the resin tends to flow along the circuit board. As a result, the fluid-resin embedding section is thoroughly filled up with the resin without leaving any air, and the reliable PWB is thus obtainable.
    Type: Grant
    Filed: May 17, 2006
    Date of Patent: April 13, 2010
    Assignee: Panasonic Corporation
    Inventors: Kazuhiko Honjo, Toshihiko Mori, Eiji Kawamoto, Junichi Kimura, Motoyoshi Kitagawa
  • Patent number: 7684487
    Abstract: A method and apparatus for coding an image includes calculation of motion vectors of vertices of a patch in an image being encoded and transmitting information of horizontal and vertical components of the motion vectors of the vertices and information specifying that values of the horizontal and vertical components of a motion vector for each pixel in the patch are integral multiples of 1/d of a distance between adjacent pixels, where d is an integer not less than 2.
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: March 23, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Yuichiro Nakaya, Junichi Kimura
  • Patent number: 7680188
    Abstract: A method and apparatus for coding an image includes calculation of motion vectors of vertices of a patch in an image being encoded and transmitting information of horizontal and vertical components of the motion vectors of the vertices and information specifying that values of the horizontal and vertical components of a motion vector for each pixel in the patch are integral multiples of 1/d of a distance between adjacent pixels, where d is an integer not less than 2.
    Type: Grant
    Filed: October 23, 2007
    Date of Patent: March 16, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Yuichiro Nakaya, Junichi Kimura
  • Patent number: 7626353
    Abstract: When the mobile type information terminal is transferred between an operating state and a standby state, self diagnosis is performed. The fuel cell charges the secondary cells with a normal current of fixed value I1, and when the output voltage of the boost DC/DC converter (when PG=L), the charge current is reduced to the fixed value and aging is performed. After aging is performed for 60 seconds, charging is performed once again performed at the normal fixed value I1. This type of operation is repeated 30 times. During aging, when the output voltage from the boost DC/DC converter is reduced (when PG=L), aging is stopped and after 20 seconds aging is performed again, and this operation is done 10 times. The mobile type information terminal can perform self diagnosis and retrial of regeneration without the user being aware, in which secondary batteries and a fuel cell are loaded.
    Type: Grant
    Filed: October 19, 2005
    Date of Patent: December 1, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Akihiko Kanouda, Mutsumi Kikuchi, Yasuaki Norimatsu, Junichi Kimura, Eisaku Fujita, Makoto Suzuki, Akira Ishii, Manabu Murakawa, Hideaki Koyama, Kazuaki Adachi