Patents by Inventor Junji Kotani

Junji Kotani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10600901
    Abstract: A compound semiconductor device includes: a carrier transit layer; a carrier supply layer that is formed over the carrier transit layer and is made of InAlN; and a spacer layer that is formed between the carrier transit layer and the carrier supply layer and is made of at least one of AlGaN and InAlGaN.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: March 24, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Junji Kotani, Norikazu Nakamura, Tetsuro Ishiguro
  • Patent number: 10574949
    Abstract: A projection apparatus that projects one of a plurality of projection screens for an integrated screen, comprises: at least one processor or circuit to perform the operations of the following units: a first reception unit configured to receive, from other projection apparatus, notification indicating that the other projection apparatus joined a projection apparatus group by a first designation method that involves moving an external apparatus into proximity; and a control unit configured to control a display to display a projection apparatus list for setting the group by a second designation method that involves designating a projection apparatus from among a plurality of projection apparatuses, wherein the control unit controls the display to display the projection apparatus list in a manner in which projection apparatuses that joined the group by the first designation method are identifiable based on the notification.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: February 25, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Junji Kotani
  • Patent number: 10431656
    Abstract: A semiconductor crystal substrate includes a first buffer layer formed of a nitride semiconductor over a substrate, a second buffer layer formed of a nitride semiconductor on the first buffer layer, a first semiconductor layer formed of a nitride semiconductor on or over the second buffer layer, and a second semiconductor layer formed of a nitride semiconductor on the first semiconductor layer. The Fe concentration of the first buffer layer is higher than the C concentration of the first buffer layer. The C concentration of the second buffer layer is higher than the Fe concentration of the second buffer layer.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: October 1, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Tetsuro Ishiguro, Atsushi Yamada, Junji Kotani, Norikazu Nakamura
  • Publication number: 20190296137
    Abstract: A semiconductor device includes a substrate; a first barrier layer containing AlN, over the substrate; a channel layer containing BGaN, over the first barrier layer; and a second barrier layer containing AlN, over the channel layer. A difference between a first lattice constant of the channel layer and a second lattice constant of the first barrier layer is less than or equal to 1.55% of the second lattice constant.
    Type: Application
    Filed: February 25, 2019
    Publication date: September 26, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Atsushi Yamada, Junji Kotani
  • Publication number: 20190214494
    Abstract: A disclosed compound semiconductor device includes a channel layer configured to generate carriers; a spacer layer of Aly1Ga1-y1N (0.20<y1?0.70) formed on the channel layer; and a barrier layer of Inx2Aly2 Ga1-x2-y2N (0?x2?0.15 and 0.20?y2<0.70) formed on the spacer layer, where y1 and y2 satisfy a relationship of y1>y2.
    Type: Application
    Filed: January 2, 2019
    Publication date: July 11, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Atsushi Yamada, JUNJI KOTANI
  • Publication number: 20190155563
    Abstract: A communication apparatus that is capable of communicating with one of a plurality of display apparatuses, so that an integrated image screen is constituted by combining display image screens of the plurality of display apparatuses, comprises at least one processor or circuit to perform the operations of the following units: a detection unit configured to detect, among the plurality of display apparatuses, a display apparatus that is close to the communication apparatus within a predetermined range to establish near field wireless communication; and a display unit configured to display information relating to, of the plurality of display apparatuses, a first display apparatus to which the communication apparatus is to be brought close so that the first display apparatus is detected by that detection unit.
    Type: Application
    Filed: November 16, 2018
    Publication date: May 23, 2019
    Inventor: Junji Kotani
  • Publication number: 20190149783
    Abstract: A projection apparatus that projects one of a plurality of projection screens for an integrated screen, comprises: at least one processor or circuit to perform the operations of the following units: a first reception unit configured to receive, from other projection apparatus, notification indicating that the other projection apparatus joined a projection apparatus group by a first designation method that involves moving an external apparatus into proximity; and a control unit configured to control a display to display a projection apparatus list for setting the group by a second designation method that involves designating a projection apparatus from among a plurality of projection apparatuses, wherein the control unit controls the display to display the projection apparatus list in a manner in which projection apparatuses that joined the group by the first designation method are identifiable based on the notification.
    Type: Application
    Filed: November 13, 2018
    Publication date: May 16, 2019
    Inventor: Junji Kotani
  • Patent number: 10242936
    Abstract: A disclosed semiconductor device includes a buffer layer formed of a compound semiconductor on a substrate, a first semiconductor layer formed of a compound semiconductor on the buffer layer, a second semiconductor layer formed of a compound semiconductor on the first semiconductor layer, a gate electrode, a source electrode, and a drain electrode formed on the second semiconductor layer, and a heat dissipation part formed below the gate electrode. In the semiconductor device, all or part of the second semiconductor layer and the first semiconductor layer is present between the gate electrode and the heat dissipation part, the heat dissipation part includes a heat dissipation layer and a first intermediate layer formed between the heat dissipation layer and both of the buffer layer and first semiconductor layer, and the heat dissipation layer is formed of a material containing carbon.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: March 26, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Junji Kotani, Norikazu Nakamura
  • Publication number: 20190075277
    Abstract: A projection apparatus that is capable of reducing difference in color tones between diffused light with a high diffusion degree and non-diffused light with a low diffusion degree. An irradiation unit irradiates with light including color components. A modulation unit modulates the light irradiated by the irradiation unit. A diffusion unit diffuses and outputs the light incident from the modulation unit. A color setting unit sets up a target color of the light output from the diffusion unit. A controller controls the irradiation unit and the modulation unit. The controller controls at least one of the irradiation unit and the modulation unit according to variation of characteristics of the diffusion unit so that difference between a color of the light diffused by the diffusion unit and the target color will become small.
    Type: Application
    Filed: September 4, 2018
    Publication date: March 7, 2019
    Inventor: Junji Kotani
  • Publication number: 20190043976
    Abstract: A compound semiconductor device includes a substrate, a compound semiconductor layer formed over the substrate, a channel layer formed over the compound semiconductor layer, an electron supply layer formed over the channel layer, and a source electrode, a drain electrode, and a gate electrode that are formed apart from each other over the electron supply layer. A quantum well structure is formed by the compound semiconductor layer, the channel layer, and the electron supply layer.
    Type: Application
    Filed: July 26, 2018
    Publication date: February 7, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Junji Kotani, Norikazu Nakamura, Hisao Shigematsu
  • Publication number: 20190020318
    Abstract: A compound semiconductor device includes a first compound semiconductor layer containing a p-type impurity, a second compound semiconductor layer disposed over the first compound semiconductor layer and containing InGaN, an electron transit layer disposed over the second compound semiconductor layer, and an electron supply layer disposed over the electron transit layer.
    Type: Application
    Filed: July 11, 2018
    Publication date: January 17, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Tetsuro Ishiguro, Atsushi Yamada, Junji Kotani, Norikazu Nakamura, Kozo Makiyama
  • Publication number: 20190006503
    Abstract: Disclosed is a compound semiconductor device that includes an electron transit layer; an electron supply layer disposed above the electron transit layer, and including a first region and a second region, the second region having a composition higher in Al than the first region and covering the first region from at least a bottom part of the second region; a first electrode disposed above the first region; and a second electrode disposed above the second region.
    Type: Application
    Filed: June 21, 2018
    Publication date: January 3, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Tetsuro Ishiguro, JUNJI KOTANI, NORIKAZU NAKAMURA
  • Publication number: 20180352205
    Abstract: One or more projection apparatuses, control methods for one or more projection apparatuses, and storage mediums for use therewith are provided herein. At least one projection apparatus includes: a projection unit including an optical unit, the projection unit being configured to project a projection image including a predetermined display item onto a projection surface; a sensor configured to sense a predetermined area corresponding to the predetermined display item on the projection surface; and a control unit configured to: (i) perform predetermined processing relating to the projection image in response to the sensor detecting a predetermined instruction in the predetermined area, and (ii) stop sensing performed by the sensor in a case where a state of the optical system of the projection unit changes while the projection image including the predetermined display item is being projected.
    Type: Application
    Filed: May 25, 2018
    Publication date: December 6, 2018
    Inventors: Junji Kotani, Hidetoshi Wada
  • Publication number: 20180337271
    Abstract: A compound semiconductor device includes an electron transit layer, a spacer layer disposed on the electron transit layer, and an electron supply layer disposed on the spacer layer and containing a donor impurity. The electron supply layer has a concentration distribution of the donor impurity where the donor impurity is at a first concentration at an interface between the electron supply layer and the spacer layer and at a second concentration lower than the first concentration at an upper surface of the electron supply layer, and a concentration of the donor impurity at one of arbitrarily-selected two positions closer to the upper surface in a thickness direction of the electron supply layer is less than the concentration of the donor impurity at another one of the two positions closer to the interface in the thickness direction.
    Type: Application
    Filed: May 10, 2018
    Publication date: November 22, 2018
    Applicant: FUJITSU LIMITED
    Inventors: JUNJI KOTANI, NORIKAZU NAKAMURA
  • Publication number: 20180309966
    Abstract: A projection apparatus that projects a projection image of invisible light onto a projection plane, the projection apparatus includes: a light source configured to emit light including invisible light; a projecting unit configured to project the projection image by modulating light emitted from the light source based on input image data; a first acquiring unit configured to acquire first characteristic information indicating a wavelength conversion characteristic of goggles that convert a wavelength of the projection image and output an image of visible light to a user; and an adjusting unit configured to adjust brightness of the projection image on the projection plane based on the first characteristic information.
    Type: Application
    Filed: April 18, 2018
    Publication date: October 25, 2018
    Inventor: Junji Kotani
  • Patent number: 10032899
    Abstract: A semiconductor crystal substrate includes a substrate, a first semiconductor layer including a nitride semiconductor and formed over the substrate, a second semiconductor layer including a nitride semiconductor and formed over the first semiconductor layer, a first cap layer formed on the second semiconductor layer, and a second cap layer formed on the first cap layer. Each of the first semiconductor layer and the second semiconductor layer has a single-crystal structure, the first cap layer has one of a single-crystal structure and a polycrystalline structure, and the second cap layer has an amorphous structure.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: July 24, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Junji Kotani, Norikazu Nakamura
  • Patent number: 9997612
    Abstract: A compound semiconductor device includes: a semiconductor substrate; a channel layer over the semiconductor substrate; a carrier supply layer over the channel layer; and a gate electrode, a source electrode and a drain electrode above the carrier supply layer. The semiconductor substrate includes an impurity-containing region containing an impurity, the impurity forms a level lower than a lower edge of a conduction band of silicon by 0.25 eV or more, the impurity forms the level higher than an upper edge of a valence band of silicon.
    Type: Grant
    Filed: April 14, 2017
    Date of Patent: June 12, 2018
    Assignee: FUJITSU LIMITED
    Inventor: Junji Kotani
  • Publication number: 20180068923
    Abstract: A disclosed semiconductor device includes a buffer layer formed of a compound semiconductor on a substrate, a first semiconductor layer formed of a compound semiconductor on the buffer layer, a second semiconductor layer formed of a compound semiconductor on the first semiconductor layer, a gate electrode, a source electrode, and a drain electrode formed on the second semiconductor layer, and a heat dissipation part formed below the gate electrode. In the semiconductor device, all or part of the second semiconductor layer and the first semiconductor layer is present between the gate electrode and the heat dissipation part, the heat dissipation part includes a heat dissipation layer and a first intermediate layer formed between the heat dissipation layer and both of the buffer layer and first semiconductor layer, and the heat dissipation layer is formed of a material containing carbon.
    Type: Application
    Filed: August 18, 2017
    Publication date: March 8, 2018
    Applicant: FUJITSU LIMITED
    Inventors: JUNJI KOTANI, NORIKAZU NAKAMURA
  • Publication number: 20180069086
    Abstract: A semiconductor crystal substrate includes a first buffer layer formed of a nitride semiconductor over a substrate, a second buffer layer formed of a nitride semiconductor on the first buffer layer, a first semiconductor layer formed of a nitride semiconductor on or over the second buffer layer, and a second semiconductor layer formed of a nitride semiconductor on the first semiconductor layer. The Fe concentration of the first buffer layer is higher than the C concentration of the first buffer layer. The C concentration of the second buffer layer is higher than the Fe concentration of the second buffer layer.
    Type: Application
    Filed: August 28, 2017
    Publication date: March 8, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Tetsuro Ishiguro, Atsushi Yamada, JUNJI KOTANI, NORIKAZU NAKAMURA
  • Publication number: 20180047840
    Abstract: A semiconductor device includes a first semiconductor layer formed of a nitride semiconductor above a substrate, a second semiconductor layer formed of a material including InAlN or InAlGaN above the first semiconductor layer, a third semiconductor layer formed of a material including AlN above the second semiconductor layer, a fourth semiconductor layer formed of a material including GaN above the third semiconductor layer, a gate electrode formed above the fourth semiconductor layer, and a source electrode and a drain electrode formed on any one of the second semiconductor layer, the third semiconductor layer, and the fourth semiconductor layer.
    Type: Application
    Filed: October 24, 2017
    Publication date: February 15, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Norikazu NAKAMURA, Junji KOTANI