Abstract: As a semiconductor storage device that can efficiently perform a refresh operation, provided is a semiconductor storage device comprising a non-volatile semiconductor memory storing data in blocks, the block being a unit of data erasing, and a controlling unit monitoring an error count of data stored in a monitored block selected from the blocks and refreshing data in the monitored block in which the error count is equal to or larger than a threshold value.

Abstract: A memory system includes a DRAM 20 that performs writing and readout in a unit equal to or smaller than a cluster, a NAND memory 10 that performs writing and readout in a page unit, and a management table group in which management information including storage locations of data stored in the DRAM 20 and the NAND memory 10 is stored. When a readout request is received from the outside, a data managing unit 120 notifies, when an unwritten logical address area is present in a storage area of the NAND memory to which a logical address area requested to be read out is mapped, fixed data stored in the DRAM 20 to the outside in association with the logical address area.

Abstract: A memory system includes a WC 21 from which data is read out and to which data is written in sector units by a host apparatus, an FS 12 from which data is read out and to which data is written in page units, an MS 11 from which data is read out and to which data written in track units, an FSIB 12a functioning as an input buffer for the FS 12, and an MSIB 11a functioning as an input buffer to the MS 11. An FSBB 12ac that has a capacity equal to or larger than a storage capacity of the WC 21 and stores data written in the WC 21 is provided in the FSIB12a. A data managing unit 120 that manages the respective storing units suspends, when it is judged that one kind of processing performed among the storing units exceeds predetermined time, the processing judged as exceeding the predetermined time and controls the data written in the WC 21 to be saved in the FSBB 12ac.

Abstract: A controller executes first processing for writing a plurality of data in a sector unit in the first storing area; second processing for flushing the data stored in the first storing area to the first input buffer in a first management unit twice or larger natural number times as large as the sector unit; third processing for flushing the data stored in the first storing area to the second input buffer in a second management unit twice or larger natural number times as large as the first management unit; fourth processing for relocating a logical block in which all pages are written in the first input buffer to the second storing area; fifth processing for relocating a logical block in which all pages are written in the second input buffer to the third storing area; and sixth processing for flushing a plurality of data stored in the second storing area to the second input buffer in the second management unit.

Abstract: A memory system includes a nonvolatile memory including a plurality of blocks as data erase units, a measuring unit which measures an erase time at which data of each block is erased, and a block controller which writes data supplied from at least an exterior into a first block which is set in a free state and whose erase time is oldest.

Abstract: To provide a memory system that can surely restore management information even when a program error occurs during data writing. After “log writing (1)” for a pre-log, when a program error occurs when data writing is being performed (a data writing error), the memory system performs the data writing again without acquiring a pre-log corresponding to data rewriting processing. After finishing the data writing, the memory system acquires, without generating a post-log, a snapshot instead of the post-log and finishes the processing.

Abstract: A memory system includes a nonvolatile memory including blocks as data erase units, a measuring unit which measures an erase time at which data in each block is erased, a block controller having a block table which associates a state value indicating one of a free state and a used state with the erase time for each block, a detector which detects blocks in which rewrite has collectively occurred within a short period, a first selector which selects a free block having an old erase time as a first block, a second selector which selects a block in use having an old erase time as a second block, and a leveling unit which moves data in the second block to the first block if the first block is included in the blocks detected by the detector.

Abstract: A memory system includes a volatile first storing unit, a nonvolatile second storing unit, and a controller. The controller stores management information of data stored in the second storing unit during a startup operation into the first storing unit and performs data management while updating the management information. The management information in a latest state stored into the first storing unit is also stored in the second storing unit. The management information includes a pre-log before and after change generated before a change occurs in the management information and a post-log, which is generated after the change occurs in the management information, concerning the change in the management information. The pre-log and the post-log are stored in the same areas of different blocks.

Abstract: According to one embodiment, a disk array control device manages a plurality of drives as a single logical drive. The disk array control device includes a first register configured to store a to-he-accessed drive number which is designated by a host, and a control module. The control module is configured to receive a command from the host, determine whether the received command is a predetermined command which is used for maintenance of each of the drives, and execute, in a case where the received command is the predetermined command, a pass-through process of sending the received command to the drive which is designated by the to-be-accessed drive number in the first register.

Abstract: A memory system includes a nonvolatile memory including blocks as data erase units, a measuring unit which measures an erase time at which data in each block is erased, a block controller having a block table which associates a state value indicating one of a free state and a used state with the erase time for each block, a detector which detects blocks in which rewrite has collectively occurred within a short period, a first selector which selects a free block having an old erase time as a first block, a second selector which selects a block in use having an old erase time as a second block, and a leveling unit which moves data in the second block to the first block if the first block is included in the blocks detected by the detector.

Abstract: A memory system includes a nonvolatile memory including a plurality of blocks as data erase units, a measuring unit which measures an erase time at which data of each block is erased, and a block controller which writes data supplied from at least an exterior into a first block which is set in a free state and whose erase time is oldest.

Abstract: Provides a terminal for performing multiple access transmission suitable to a transmission path having varied characteristics. The terminal (100) includes a transmission/reception section (201), a control unit (204), a transfer management section (206), and an external interface section (203). The terminal (100) refers to an IGMP (MLD) message received by the transmission/reception section (201) to classify a transmitter host and a relay device of this message based on the characteristic of the transmission path, and performs a multiple access transmission of a multicast packet in a form suitable to the characteristic of the respective transmission path.

Abstract: A memory system includes a nonvolatile semiconductor memory having blocks, the block being data erasing unit; and a controller configured to execute; an update processing for; writing superseding data in a block, the superseding data being treated as valid data; and invalidating superseded data having the same logical address as the superseding data, the superseded data being treated as invalid data; and a compaction processing for; retrieving blocks having invalid data using a management tablet the management table managing blocks in a linked list format for each number of valid data included in the block; selecting a compaction source block having at least one valid data from the retrieved blocks; copying a plurality of valid data included in the compaction source blocks into a compaction target block; invalidating the plurality of valid data in the compaction source blocks; and releasing the compaction source blocks in which all data are invalidated.

Abstract: A system includes: a first input buffer that functions as an input buffer for a third storing area; and a second input buffer that functions as an input buffer for the third storing area and that separately stores data with a high update frequency for the third storing area. In the system, a plurality of data written in a first storing area or a second storing area are flushed to the first input buffer in units of logical blocks. Also, a plurality of data written in the first input buffer are relocated to the third storing area in units of logical blocks.

Abstract: A memory system includes a controller that manages data stored in the first and second storing areas. The controller determines, when a readout error occurs when the stored data in the second storing area is read out, success or failure of error correction to the read-out data based on the result of the error correction stored in a storage buffer, writes, when the error correction is successful, correction data corresponding to the read-out data stored in the storage buffer, and writes, when the error correction fails, the read-out data itself not subjected to error correction processing.

Abstract: A memory system includes a first storing area included in a volatile semiconductor memory, a second and a third storing area included in a nonvolatile semiconductor memory, a controller that allocates the storage area of the nonvolatile semiconductor memory to the second storing area and the third storing area in a logical block unit associated with one or more blocks. The second storing area is configured to be managed with a first management unit. The third storing area is configured to be managed with a second management unit, a size of the second management unit being larger than a size of the first management unit.

Abstract: A memory system includes a management table group in which management information including storage positions of data stored in a first storing area and a second storing area is stored. The management table group is stored in the second storing area. A controller performs data transfer between a host apparatus and the second storing area via the first storing area and performs management of the data in the first and second storing areas based on the management table group while updating the management table group expanded in the first storing area. The second storing area can store data associated with a first logical address area accessible from the host apparatus and data associated with a second logical address area accessible from the host apparatus, and the controller receives an erasing command from the host apparatus, collects the data associated with the second logical address area in a predetermined area in the second storing area, and then initializes the management table group.

Abstract: A controller determines whether data stored in a first storing area should be flushed to a second storing area or a third storing area. When flushing of data in a track unit from at least one of the first storing area and the second storing area unit to the third storing area unit is determined, the controller collects data included in the flushed data in the track unit from at least one of the first storing area and the second storing area including the storing area from which the flushing of the data is determined, merges the flushed data and the collected data, and writes the merged data in the third storing area.

Abstract: A memory system includes a volatile first storing unit, a nonvolatile second storing unit in which data is managed in a predetermined unit, and a controller that writes data requested by a host apparatus in the second storing unit via the first storing unit and reads out data requested by the host apparatus from the second storing unit to the first storing unit and transfers the data to the host apparatus. The controller includes a management table for managing the number of failure areas in a predetermined unit that occur in the second storing unit and switches, according to the number of failure areas, an operation mode in writing data in the second storing unit from the host apparatus.

Abstract: A controller includes an identification information management table that manages identification information indicating, for each of addresses in second-management unit, whether one or more data in first management unit belonging to the addresses is stored in the second or the third storing area. When the controller executes a process of flushing data from the first storing area to the second storing area or the third storing area, the controller updates the identification information in the identification information management table. The controller executes a process of reading data from the second storing area or the third storing area by referring to the identification information. As a result, the speed of searches conducted in the management table is increased.