Patents by Inventor K. Subramanian

K. Subramanian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140029494
    Abstract: A method and apparatus for power saving for a mobile device in a wireless communication network includes a transceiver operable within an allocated spectrum of the wireless communication network. A detector is operable to detect a signal outside of the allocated spectrum of the wireless communication network transmitted from a network device. A processor is operable to configure the mobile device to be in a sleep mode wherein the transceiver is not operable and the detector is operable, and awaken the transceiver from sleep mode upon detecting the signal in order for the transceiver to communicate between an access point of the wireless communication network and the mobile device within the allocated spectrum of the wireless communication network.
    Type: Application
    Filed: July 27, 2012
    Publication date: January 30, 2014
    Applicant: MOTOROLA SOLUTIONS, INC.
    Inventors: Sundaresan Sundaram, K. Subramanian, Karthik Narayana, Suresh Raj
  • Publication number: 20130301346
    Abstract: Circuitry and a method provide self-referenced sensing of a resistive memory cell by using its characteristic of resistance variation with applied voltage in one state versus a relatively constant resistance regardless of the applied voltage in its opposite state. Based on an initial bias state with equalized resistances, a current comparison at a second bias state between a mock bit line and a bit line is used to determine the state of the memory cell, since a significant difference in current implies that the memory cell state has a significant voltage coefficient of resistance. An offset current applied to the mock bit line optionally may be used to provide symmetry and greater sensing margin.
    Type: Application
    Filed: April 29, 2013
    Publication date: November 14, 2013
    Applicant: EVERSPIN TECHNOLOGIES, INC.
    Inventors: Chitra K. Subramanian, Syed M. Alam
  • Publication number: 20130127886
    Abstract: Drive signals for a display device may be generated using Separable Nonnegative Matrix Series Representation (SNMSR) of source image data and applying a non-negative matrix factorization (NNMF) process to source image data to generate approximation image data (Ii), partial sum image data (Pi) and residue image data (Ji). Iteratively, NNMF may be applied to Ji such that subsequent Ii and Ji may be generated, where each Ii can be associated with a corresponding sub-frame image. At each iteration, the Ii may be sent to the display buffer for selective activation of multiple row and column drivers during a single sub-frame interval. At each iteration, a determination may be made if a predetermined criterion is satisfied. The iterations may be terminated and the series truncated when the predetermined criterion is satisfied. Integration of the sub-frame images displayed over a complete frame interval by human eye effectively corresponds to the source image.
    Type: Application
    Filed: February 9, 2011
    Publication date: May 23, 2013
    Applicant: Indian Institute of Technology Kanpur
    Inventors: Venkatesh K. Subramanian, Preeti Dubey
  • Publication number: 20120203552
    Abstract: A device may receive over a network a digitized speech signal from a remote control that accepts speech. In addition, the device may convert the digitized speech signal into text, use the text to obtain command information applicable to a set-top box, and send the command information to the set-top box to control presentation of multimedia content on a television in accordance with the command information.
    Type: Application
    Filed: April 16, 2012
    Publication date: August 9, 2012
    Applicant: VERIZON DATA SERVICES INDIA PVT. LTD.
    Inventors: Ashutosh K. Sureka, Sathish K. Subramanian, Sidhartha Basu, Indivar Verma
  • Patent number: 8184476
    Abstract: A random access memory architecture includes a first series connected pair of memory elements (202, 206, 302, 306, 402, 404) having a first resistance and a second series connected pair of memory elements (204, 208, 304, 308, 406, 408) having a second resistance coupled in parallel with the first series connected pair of memory elements, wherein a current flows in the first direction through both of the first and second series connected pair of memory elements. A sense amplifier (14) is coupled to an array (16) of MRAM cells (77), each including a memory element, and includes a voltage bias portion (12), the voltage bias portion including the first and second series connected pair of memory elements. The memory elements may be, for example, magnetic tunnel junctions.
    Type: Grant
    Filed: December 26, 2008
    Date of Patent: May 22, 2012
    Assignee: Everspin Technologies, Inc.
    Inventors: Joseph J Nahas, Thomas W Andre, Chitra K Subramanian
  • Patent number: 8175885
    Abstract: A device may receive over a network a digitized speech signal from a remote control that accepts speech. In addition, the device may convert the digitized speech signal into text, use the text to obtain command information applicable to a set-top box, and send the command information to the set-top box to control presentation of multimedia content on a television in accordance with the command information.
    Type: Grant
    Filed: July 23, 2007
    Date of Patent: May 8, 2012
    Assignee: Verizon Patent and Licensing Inc.
    Inventors: Ashutosh K. Sureka, Sathish K. Subramanian, Sidhartha Basu, Indivar Verma
  • Patent number: 8145189
    Abstract: A system that communicates information is described. During operation, this system receives an encryption key through a first wireless communication technique, wherein the first wireless communication technique includes near field communication. Then, the system communicates a document through a second wireless communication technique, where the document is associated with a financial transaction being conducted with a commercial establishment. Next, the system receives encrypted information through the second wireless communication technique, where the encrypted information is, at least in part, encrypted using the encryption key, and where the second wireless communication technique includes a technique other than near field communication.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: March 27, 2012
    Assignee: Intuit Inc.
    Inventors: Michael J. Power, Dante Cassanego, See Yew Mo, Harish K. K. Subramanian
  • Patent number: 8095428
    Abstract: An internal auction system may allow a seller to enter a scheduled auction. The scheduled auction may be a simple scheduled auction and a conditional scheduled auction. The internal auction system may receive parameters for the scheduled auction, determine a scheduled auction as a function of the received parameters, create the scheduled auction, and publish the scheduled auction at a specified start time on a seller e-commerce site visible to a buyer. A simple scheduled auction may be associated with a start time and a duration. A conditional scheduled auction may be associated with a condition and an action to be executed when the condition evaluates to a specified value.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: January 10, 2012
    Assignee: SAP AG
    Inventors: Narendra Penagulur, Narinder Singh, Yan Cui, Lenin K Subramanian
  • Patent number: 8095449
    Abstract: A seller may use an existing product catalog in a seller business information management system to generate an auction and populate auction parameters to expedite and facilitate the auction creation process. The information in the product catalog may be used to provide auction parameters (populate auction fields) in addition to adding a product and/or service to the auction. An auction profile may also be defined for a seller and may contain data or rules for generating an auction that may be used to provide additional default values for the auction. One or more auction profiles may be associated with a seller. The seller selects a product from the catalog and chooses a create auction option resulting in an auction being generated from the product information and the profile, if one exists. The seller may then modify the auction parameters and add or drop products before saving the auction.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: January 10, 2012
    Assignee: SAP AG
    Inventors: Yan Cui, Rowell Sotto, Lenin K Subramanian, Anisha Dadhia, Yue Fang, Zhong Zhang
  • Patent number: 8068171
    Abstract: Disclosed are various embodiments for displaying pictures at high speed. In one embodiment, a system includes a buffer for storing parameters associated with a predetermined number of the pictures during a video display period. The system further includes a video decoder for decoding particular ones of the predetermined number of the pictures. The predetermined ones are either reference pictures or pictures that are to be displayed at high speed. The pictures that are displayed in high speed at each display interval have a constant time-lapse between the pictures that are displayed in high speed at the next display interval.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: November 29, 2011
    Assignee: Broadcom Corporation
    Inventors: Gaurav Aggarwal, M K Subramanian, Sandeep Bhatia, Santosh Savekar, K Shivapirakasan
  • Patent number: 7895115
    Abstract: An internal auction application may allow a seller to create a multiple auction for a plurality of products and allow a buyer to see and bid on the multiple auction as appropriate. The internal auction application may receive parameters for the multiple auction from the seller and an associated plurality of auctions may be determined for the multiple auction as a function of the parameters. The internal auction application may create and publish the multiple auction and the associated plurality of auctions on a seller's e-commerce site visible to the buyer. The multiple auction may be a serial multiple auction, a recurring multiple auction or a varied sublot multiple auction.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: February 22, 2011
    Assignee: SAP AG
    Inventors: Pavan Bayyapu, Yan Cui, Yue Fang, Narendra Penagulur, Lenin K Subramanian, Zhong Zhang
  • Patent number: 7835977
    Abstract: A seller may define a template using an internal auction application in an integrated internal auction system that may then be used to generate an auction. The template information may be used to provide auction parameter values and/or product information. The template may be created by copying an existing auction or template which may then be modified or the template may be created by a seller providing specific values for the template information. Template information may consist of specific data and rules that may be used to generate a value for an auction parameter when an auction is, for example, created or published. One or more auction templates may be associated with a seller. The seller may select a template to use when creating an auction in order to expedite the auction creation process. The seller may then modify the auction parameters and/or product information before saving the auction.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: November 16, 2010
    Assignee: SAP AG
    Inventors: Narinder Singh, Lenin K Subramanian, Narendra Penagulur
  • Publication number: 20100177823
    Abstract: Presented herein are systems and methods for slow motion and high speed for digital video. In one embodiment, there is presented a method for displaying pictures. The method comprises displaying a top field from a particular picture, for a predetermined number of consecutive vertical synchronization pulses; and displaying a bottom field from the particular picture for the predetermined number of consecutive vertical synchronization pulses.
    Type: Application
    Filed: March 24, 2010
    Publication date: July 15, 2010
    Inventors: Gaurav Aggarwal, M.K. Subramanian, Sandeep Bhatia, Santosh Savekar, K. Shivapirakasan
  • Publication number: 20100165710
    Abstract: A random access memory architecture includes a first series connected pair of memory elements (202, 206, 302, 306, 402, 404) having a first resistance and a second series connected pair of memory elements (204, 208, 304, 308, 406, 408) having a second resistance coupled in parallel with the first series connected pair of memory elements, wherein a current flows in the first direction through both of the first and second series connected pair of memory elements. A sense amplifier (14) is coupled to an array (16) of MRAM cells (77), each including a memory element, and includes a voltage bias portion (12), the voltage bias portion including the first and second series connected pair of memory elements. The memory elements may be, for example, magnetic tunnel junctions.
    Type: Application
    Filed: December 26, 2008
    Publication date: July 1, 2010
    Applicant: EVERSPIN TECHNOLOGIES, INC.
    Inventors: Joseph J. NAHAS, Thomas W. ANDRE, Chitra K. SUBRAMANIAN
  • Patent number: 7543211
    Abstract: A controller for a toggle memory that performs burst writes by reading a group of bits in the toggle memory and comparing each received data word of the burst with a portion of the group to determine which cells to toggle to enter the data of the burst write in the toggle memory. In one example the toggle memory includes magnetoresistive random access memory (MRAM) with cells using multiple free magnetic layers that toggle between states when subjected to a sequence of magnetic pulses along two directions. Because one read is performed for a group of data of the burst, the time needed to perform the burst write is reduced.
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: June 2, 2009
    Assignee: Everspin Technologies, Inc.
    Inventors: Joseph J. Nahas, Thomas W. Andre, Chitra K. Subramanian
  • Patent number: 7532533
    Abstract: An antifuse circuit provides on a per bit basis a signal that indicates whether an MTJ (magnetic tunnel junction) antifuse has been previously programmed to a low resistance state in response to a program voltage. A sense amplifier provides the resistance state signal. A plurality of reference magnetic tunnel junctions are coupled in parallel and to the sense amplifier, each having a resistance within a range to provide a collective resistance that can be determined by the sense amplifier to differ from each resistance state of the MTJ antifuse. A write circuit selectively provides a current sufficient to create the program voltage when the write circuit is enabled to program the antifuse magnetic tunnel junction. Upon detecting a change in resistance in the MTJ antifuse, the write circuit reduces current supplied to the antifuse. Multiple antifuses may be programmed concurrently. Gate oxide thicknesses of transistors are adjusted for optimal performance.
    Type: Grant
    Filed: April 19, 2007
    Date of Patent: May 12, 2009
    Assignee: Everspin Technologies, Inc.
    Inventors: Thomas W. Andre, Chitra K. Subramanian
  • Publication number: 20090030681
    Abstract: A device may receive over a network a digitized speech signal from a remote control that accepts speech. In addition, the device may convert the digitized speech signal into text, use the text to obtain command information applicable to a set-top box, and send the command information to the set-top box to control presentation of multimedia content on a television in accordance with the command information.
    Type: Application
    Filed: July 23, 2007
    Publication date: January 29, 2009
    Inventors: Ashutosh K. Sureka, Sathish K. Subramanian, Sidhartha Basu, Indivar Verma
  • Publication number: 20090006263
    Abstract: A system that communicates information is described. During operation, this system receives an encryption key through a first wireless communication technique, wherein the first wireless communication technique includes near field communication. Then, the system communicates a document through a second wireless communication technique, where the document is associated with a financial transaction being conducted with a commercial establishment. Next, the system receives encrypted information through the second wireless communication technique, where the encrypted information is, at least in part, encrypted using the encryption key, and where the second wireless communication technique includes a technique other than near field communication.
    Type: Application
    Filed: June 27, 2007
    Publication date: January 1, 2009
    Inventors: Michael J. Power, Dante Cassanego, See Yew Mo, Harish K.K. Subramanian
  • Patent number: 7275149
    Abstract: A system, circuit, and method are presented for evaluating conditional execution instructions. The system, circuit, and method are adapted to receive an identification instruction comprising the size and the condition of execution of a block of conditional execution instructions. The system, circuit, and method may also be coupled to determine a position and for a conditional execution instruction within a block of conditional execution instructions. The system, circuit, and method can determine whether a conditional field, in which the conditional field comprises a type of conditional execution instruction, meets a condition of execution. By determining the size of the block of conditional execution by an identification instruction and determining the type of conditional execution instruction, the system, circuit and method advantageously decreases the code density of a set of instruction, and advantageously increases the overall performance of a processor.
    Type: Grant
    Filed: March 25, 2003
    Date of Patent: September 25, 2007
    Assignee: VeriSilicon Holdings (Cayman Islands) Co. Ltd.
    Inventors: Senthil K. Subramanian, Hung T. Nguyen
  • Patent number: 7224630
    Abstract: An antifuse circuit provides on a per bit basis a signal that indicates whether an MTJ (magnetic tunnel junction) antifuse has been previously programmed to a low resistance state in response to a program voltage. A sense amplifier provides the resistance state signal. A plurality of reference magnetic tunnel junctions are coupled in parallel and to the sense amplifier, each having a resistance within a range to provide a collective resistance that can be determined by the sense amplifier to differ from each resistance state of the MTJ antifuse. A write circuit selectively provides a current sufficient to create the program voltage when the write circuit is enabled to program the antifuse magnetic tunnel junction. Upon detecting a change in resistance in the MTJ antifuse, the write circuit reduces current supplied to the antifuse. Multiple antifuses may be programmed concurrently. Gate oxide thicknesses of transistors are adjusted for optimal performance.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: May 29, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Thomas W. Andre, Chitra K. Subramanian