Patents by Inventor Ka-Un Chan

Ka-Un Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220130590
    Abstract: An inductor device includes a first inductor, a first connection member, a second inductor, and a second connection member. The first inductor includes a first and a second trace. The first trace is disposed in a first area, and the second trace is disposed in a second area. The first and the second area are connected at a junction. The first connection member is disposed at a block at which the first and the second trace are not disposed, and coupled to the first and the second trace. The second inductor includes a third and a fourth trace. The third trace is disposed in the first area, and the fourth trace is disposed in the second area. The second connection member is disposed at a block at which the third and the fourth trace are not disposed, and coupled to the third and the fourth trace.
    Type: Application
    Filed: June 9, 2021
    Publication date: April 28, 2022
    Inventors: Hsiao-Tsung YEN, Ting-Yao Huang, Ka-Un Chan
  • Publication number: 20220130591
    Abstract: An inductor device includes a first and a second inductor and a first and a second connection member. A first and a second trace of the first inductor is located on a first and a second layer respectively. The second trace is coupled to the first trace located at a first and a second area. The first connection member is coupled to the second trace. A third and a fourth trace of the second inductor is located on the first and the second layer respectively. The first trace and the third trace are disposed in turn at the first area and the second area. The fourth trace is coupled to the third trace located at the first and the second area. The second and the fourth trace are disposed in turn at the first and the second area. The second connection member is coupled to the fourth trace.
    Type: Application
    Filed: July 9, 2021
    Publication date: April 28, 2022
    Inventors: Hsiao-Tsung YEN, Ting-Yao HUANG, Ka-Un CHAN
  • Patent number: 11309869
    Abstract: A filtering circuit includes a filter, a frequency divider, and a control circuit. The filter is configured to generate a first oscillating signal according to a control signal in a first mode, and perform a filtering process according to the control signal in a second mode. A frequency of the first oscillating signal is determined according to the control signal. The frequency divider is coupled to the filter and configured to divide the frequency of the first oscillating signal to generate a frequency-divided signal. The control circuit is coupled to the filter and the frequency divider, and configured to compare a frequency of the frequency-divided signal and a frequency of a second oscillating signal so as to adjust the control signal in the first mode. A center frequency of a passband of the filter in the second mode is determined according to the adjusted control signal.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: April 19, 2022
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Ping-Yuan Deng, Ka-Un Chan
  • Patent number: 11303286
    Abstract: The present invention provides a sub-sampling PLL including a first phase detector, a first charge pump, an oscillator and a first buffer is disclosed. In the operations of the sub-sampling PLL, the first phase detector uses a reference clock signal to sample a feedback signal to generate a first phase detection result, the first charge pump generates a first signal according to the first phase detection result and a pulse signal, the oscillator generates an output clock signal according to the first signal, and the first buffer receives the output clock signal to generate the feedback signal, and buffer further using a slew rate control signal to control a slew rate of the feedback signal.
    Type: Grant
    Filed: October 20, 2020
    Date of Patent: April 12, 2022
    Assignee: Realtek Semiconductor Corp.
    Inventors: Yu-Che Yang, Ka-Un Chan, Yong-Ru Lu, Shen-Iuan Liu
  • Patent number: 11283412
    Abstract: A low noise amplifier circuit includes an input stage circuit, a first output stage circuit, and a second output stage circuit. The input stage circuit is configured to receive an input signal and to generate a bias signal. The first output stage circuit corresponding to a first wireless communication and is configured to be biased according to the bias signal and a first control signal, in order to generate a first output signal, in which the first control signal is for setting a first gain of the first output stage circuit. The second output stage circuit corresponding to a second wireless communication and is configured to be biased according to the bias signal and a second control signal, in order to generate a second output signal, in which the second control signal is for setting a second gain of the second output stage circuit.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: March 22, 2022
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chia-Jun Chang, Chia-Yi Lee, Ping-Hsuan Tsai, Ka-Un Chan
  • Publication number: 20220084738
    Abstract: An inductor device includes a first trace, a second trace, and at least one connection member. The first trace is disposed on a first area. The second trace is disposed on a second area. The first area and the second area are coupled to each other at a junction. The at least connection member is disposed at a block at which the first trace and the second trace are not disposed and which is adjacent to the junction, and the at least connection member is coupled to the first trace and the second trace.
    Type: Application
    Filed: March 18, 2021
    Publication date: March 17, 2022
    Inventors: Hsiao-Tsung YEN, Ting-Yao HUANG, Ka-Un CHAN
  • Publication number: 20220076872
    Abstract: An inductor device includes a first trace, a second trace, and a capacitor. The first trace includes at least two sub-traces. One terminal of each of the at least two sub-traces are coupled to each other at a first node. The second trace includes at least two sub-traces. One terminal of each of the at least two sub-traces are coupled to each other at a second node. The capacitor is coupled to the firs node and the second node.
    Type: Application
    Filed: November 14, 2021
    Publication date: March 10, 2022
    Inventors: Hsiao-Tsung Yen, Jian-You Chen, Ka-Un Chan
  • Publication number: 20220068552
    Abstract: An inductor structure includes a first connecting component, a second connecting component, and a center-tap terminal. In the inductor structure, a first port of the first connecting component is coupled to a first wire, and a second port of the first connecting component is coupled to a second wire. The second connecting component disposed above or beneath the first connecting component in an interlaced manner. The center-tap terminal is coupled to one of the first connecting component and the second connecting component. The center-tap terminal is disposed on a layer that is different from the layer where the first connecting component is disposed or the layer where the second connecting component is disposed.
    Type: Application
    Filed: January 27, 2021
    Publication date: March 3, 2022
    Inventors: Hsiao-Tsung YEN, Ka-Un CHAN
  • Publication number: 20220068539
    Abstract: An inductor device includes an 8-shaped inductor structure, a first spiral wire, a first connector, a second connector, and a first interlaced component. The 8-shaped inductor structure includes two first-wires and two second-wires. The first spiral wire is disposed on an inner side of the two first-wires. The first connector is coupled to one of the two first-wires and one of the two second-wires. The second connector is coupled to another one of the two first-wires. The first interlaced component is coupled to the first spiral wire and another one of the two second-wires, and the first interlaced component is coupled to the first connector and the second connector in an interlaced manner respectively.
    Type: Application
    Filed: October 19, 2020
    Publication date: March 3, 2022
    Inventors: Hsiao-Tsung YEN, Ka-Un CHAN
  • Publication number: 20220059277
    Abstract: An inductor device includes a first trace, a second trace, and a capacitor. The first trace includes a first and a second sub-trace. The first sub-trace includes first wires, and the second sub-trace includes second wires. The second sub-trace is coupled to the first sub-trace at a first node. The first and the second wires are disposed to each other in an interlaced manner, and located at an outer side of the inductor device. The second trace includes a third and a fourth sub-trace. The third sub-trace includes third wires, and the fourth sub-trace includes fourth wires. The fourth sub-trace is coupled to the third sub-trace at a second node. The third and the fourth wires are disposed to each other in an interlaced manner, and located at an outer side of the inductor device. The capacitor is coupled between the first and the second node.
    Type: Application
    Filed: August 23, 2021
    Publication date: February 24, 2022
    Inventors: Hsiao-Tsung YEN, Hung-Han Chen, Ka-Un Chan
  • Publication number: 20220020529
    Abstract: The present invention discloses an inductive device having electromagnetic radiation shielding mechanism used to establish electromagnetic radiation shielding mechanism against an electronic device that includes an inductive unit and a first shielding structure. The first shielding structure forms a closed shape and is disposed next to a side of the inductive unit, wherein the first shielding structure is located between the inductive unit and the electronic device.
    Type: Application
    Filed: March 12, 2021
    Publication date: January 20, 2022
    Inventors: HSIAO-TSUNG YEN, KA-UN CHAN
  • Publication number: 20220020684
    Abstract: A semiconductor device is disposed below an inductor. The semiconductor device includes a metal-oxide-semiconductor capacitor structure and a patterned shielding structure. The metal-oxide-semiconductor capacitor structure includes a polysilicon layer, an oxide definition layer, and a first metal layer. The first metal layer is connected to the polysilicon layer and the oxide definition layer. The patterned shielding structure is disposed over the metal-oxide-semiconductor capacitor structure and includes a second metal layer.
    Type: Application
    Filed: September 28, 2020
    Publication date: January 20, 2022
    Inventors: Hsiao-Tsung Yen, Ka-Un Chan
  • Patent number: 11223328
    Abstract: A dual-mode signal amplifying circuit includes: a first and a second input terminals for receiving differential input signals; two output terminals for providing differential output signals; a first through a third current sources; a first switch positioned between the first current source and a first node, and controlled by the first input terminal; a second switch positioned between the first current source and a second node, and controlled by the second input terminal; a third switch positioned between the first node and a fixed-voltage terminal, and controlled by a third node; a fourth switch positioned between the second node and a fixed-voltage terminal and controlled by the third node; a fifth switch positioned between the second current source and a fixed-voltage terminal, and controlled by the first node; and a sixth switch positioned between the third current source and a fixed-voltage terminal, and controlled by the second node.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: January 11, 2022
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Chao-Huang Wu, Yi-Shao Chang, Han-Chang Kang, Ka-Un Chan
  • Publication number: 20210398727
    Abstract: An inductor device includes a first coil, a second coil and a toroidal coil. The first coil is partially overlapped with the second coil in a vertical direction. The toroidal coil is disposed outside the first coil and the second coil. The first coil is interlaced with the second coil at a first side and a second side of the inductor device.
    Type: Application
    Filed: April 21, 2021
    Publication date: December 23, 2021
    Inventors: Hsiao-Tsung Yen, Ka-Un Chan
  • Publication number: 20210398739
    Abstract: A transformer device includes a first coil and a second coil. The first coil includes a number of first circles. The second coil includes a number of second circles. A first side of a first one of the first coil is adjacent to one of the first coil, and a second side of the first one of the first coil is adjacent to one of the second coil. A first side and a second side of a second one of the first coil are adjacent to one of the second coil, respectively.
    Type: Application
    Filed: September 29, 2020
    Publication date: December 23, 2021
    Inventors: Hsiao-Tsung Yen, Ka-Un Chan
  • Publication number: 20210375520
    Abstract: An integrated circuit includes a first coil and a second coil. The first coil is disposed on the first side of the integrated circuit. The second coil is disposed on the second side of the integrated circuit, and is partially overlapped with the first coil at a junction. The first coil is not interlaced with the second coil at the junction.
    Type: Application
    Filed: April 21, 2021
    Publication date: December 2, 2021
    Inventors: Hsiao-Tsung YEN, Ka-Un CHAN
  • Publication number: 20210367571
    Abstract: An operational amplifier includes a differential amplifier circuit and a common mode feedback circuit. The differential amplifier circuit includes a bias circuit, an amplifier circuit, and a load circuit. The bias circuit generates a first operation voltage. The amplifier circuit receives a pair of input signals, and generates a pair of output signals according to the input signals and the first operation voltage. The load circuit is coupled to the amplifier circuit. The common mode feedback circuit generates at least one common mode feedback voltage based on a common mode voltage and a reference voltage. The common mode voltage is associated with the output signals. The at least one common mode feedback voltage is for controlling the bias circuit and the load circuit, to control a direct current (DC) voltage level of the differential amplifier circuit.
    Type: Application
    Filed: December 9, 2020
    Publication date: November 25, 2021
    Inventors: Yi-Shao Chang, Ka-Un Chan
  • Publication number: 20210358681
    Abstract: A transformer device includes a first coil, a second coil, and a third coil. The first coil includes a first ring structure, a second ring structure, a first connecting portion, and a first terminal, in which the first terminal is arranged on the first connecting portion and is located at a central location between the first ring structure and the second ring structure, the first terminal is connected to the first ring structure through the first connecting portion in a first direction, and connected to the second ring structure through the first connecting portion in a second direction, and the first direction is the opposite of the second direction. The second coil is configured to couple the first ring structure. The third coil is configured to couple the second ring structure, in which the second coil and the third coil have the same structure.
    Type: Application
    Filed: May 6, 2021
    Publication date: November 18, 2021
    Inventors: HSIAO-TSUNG YEN, JIAN-YOU CHEN, KA-UN CHAN
  • Publication number: 20210351764
    Abstract: The present invention discloses a signal output circuit having anti-interference mechanism. An amplifier is electrically coupled to a power supply and a ground terminal through a first and a second amplifier bond wires, and generates an amplified output signal. A transformer circuit includes a transformer performing impedance transformation on the amplified output signal to generate a transformed output signal and a voltage-stabilizing capacitor suppressing second-order harmonics of the amplifier. A power-terminal side anti-interference circuit includes a power-terminal side bond wire and a power-terminal side anti-interference capacitor. The power-terminal side bond wire is electrically coupled to the ground terminal.
    Type: Application
    Filed: April 29, 2021
    Publication date: November 11, 2021
    Inventors: KUAN-HAO TSENG, KA-UN CHAN, PO-CHIH WANG
  • Publication number: 20210350972
    Abstract: A stacked inductor device including an 8-shaped inductor structure a stacked coil. The 8-shaped inductor structure includes a first coil and a second coil. The first coil is disposed in a first area. The first coil includes a first sub-coil and a second sub-coil, and the first sub-coil and the second sub-coil are disposed with an interval circularly with each other. The second coil is disposed in a second area, and the second coil is coupled with the first coil on a boundary between the first area and the second area. The second coil includes a third sub-coil and a fourth sub-coil, and the third sub-coil and the fourth sub-coil are disposed with an interval circularly with each other. The stacked coil is coupled to the first coil and the second coil and is stacked partially on or under the first coil and the second coil.
    Type: Application
    Filed: September 29, 2020
    Publication date: November 11, 2021
    Inventors: Hsiao-Tsung YEN, Ka-Un CHAN