Patents by Inventor Kai Cheng

Kai Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240154063
    Abstract: The present disclosure provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a silicon substrate having several through-silicon-vias therein; a first semiconductor layer located in each through-silicon-via and on the silicon substrate, an active layer located on the first semiconductor layer, and a second semiconductor layer located on the active layer, where a conductivity type of the second semiconductor layer is opposite to that of the first semiconductor layer, a material of the first semiconductor layer a group III nitride, a material of the active layer a group III nitride, and a material of the second semiconductor layer include a group III nitride.
    Type: Application
    Filed: April 15, 2021
    Publication date: May 9, 2024
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventors: Kai CHENG, Liyang ZHANG
  • Publication number: 20240155185
    Abstract: A channel hiatus correction method for an HDMI device is provided. A recovery code from scrambled data of the stream is obtained. A liner feedback shift register (LFSR) value of channels of the HDMI port is obtained based on the recovery code and the scrambled data of the stream. The stream is de-scrambled according to the LFSR value of the channels of the HDMI port. Video data is displayed according to the de-scrambled stream.
    Type: Application
    Filed: November 9, 2022
    Publication date: May 9, 2024
    Inventors: Chia-Hao CHANG, You-Tsai JENG, Kai-Wen YEH, Yi-Cheng CHEN, Te-Chuan WANG, Kai-Wen CHENG, Chin-Lung LIN, Tai-Lai TUNG, Ko-Yin LAI
  • Publication number: 20240154030
    Abstract: The present disclosure provides a semiconductor structure, including: a substrate structure; an epitaxial structure on the substrate structure, where the epitaxial structure includes at least one heterojunction structure sequentially stacked in a direction away from the substrate structure; each of the at least one heterojunction structure includes a channel layer and a barrier layer, the epitaxial structure includes a gate region, and in each of the at least one heterojunction structure, a part of the barrier layer corresponding to the gate region is removed to form a hole; a gate electrode on the gate region, where the gate electrode fills the hole, and surrounds the channel layer; and a source electrode and a drain electrode respectively at two sides of the gate electrode.
    Type: Application
    Filed: October 26, 2023
    Publication date: May 9, 2024
    Applicant: Enkris Semiconductor, Inc.
    Inventor: KAI CHENG
  • Publication number: 20240153924
    Abstract: A manufacturing method of an electronic device is disclosed by the present disclosure. The manufacturing method includes providing a substrate, wherein the substrate includes a plurality of working areas, and each of the plurality of working areas includes a plurality of first recesses and a plurality of second recesses; disposing a plurality of first electronic units in the plurality of first recesses of the plurality of working areas through fluid transfer; identifying a defective working area from the plurality of working areas, wherein at least one of the plurality of first recesses of the defective working area has no electronic unit or a defective first electronic unit disposed therein; and disposing at least one repairing electronic unit in at least one of the plurality of second recesses of the defective working area through laser transfer.
    Type: Application
    Filed: October 3, 2023
    Publication date: May 9, 2024
    Applicant: InnoLux Corporation
    Inventors: Fang-Ying Lin, Kai Cheng, Ming-Chang Lin, Tsau-Hua Hsieh
  • Publication number: 20240154100
    Abstract: The present disclosure provides a carbon-encapsulated lithium manganese iron phosphate material having a composition of: LiFe1-x-yMnxMyPO4@C, where M includes at least one of Mg, V, Zr, Nb, In, Al, Co and Ni, 0.5?x?0.8, 0<y?0.02, and C is encapsulated carbon. The material has a secondary gradation structure with tightly bound material gradation, high compaction density, and excellent electrochemical performance. The present disclosure further provides a method for preparing a carbon-encapsulated lithium manganese iron phosphate material, which has a simple process flow and is suitable for application in large-scale industrial production. The present disclosure further provides a lithium ion battery in which the carbon-encapsulated lithium manganese iron phosphate material is applied.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 9, 2024
    Inventors: Jie Sun, Yaping Xia, Guangchun Cheng, Manling Zhu, Kai Wang, Zhonglin He, Jianhao He
  • Patent number: 11977609
    Abstract: A USB protocol-based IP infringement identification method for USB devices, including the following steps: S1, connecting an infringement identification device at a peer side of the USB host to be tested; S2, the USB host to be tested entering compliance mode; S3, the infringement identification device sending an X.LFPS file to the USB host to be tested; S4, upon the USB host to be tested receiving the X.LFPS file, the USB host to be tested sending IP copyright information to the infringement identification device; S5, determining whether the USB host to be tested infringes the IP. The infringement identification of the USB device to be tested is performed by using the compliance mode specified in the USB protocol, which is more stable, reliable and can also save costs.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: May 7, 2024
    Assignee: CORIGINE (SHANGHAI), INC.
    Inventors: Kai Cheng, Sheng Lu, YirngAn Chen, Xin Jiang, Xiao Xiao
  • Patent number: 11978826
    Abstract: This application provides a semiconductor structure and substrate thereof, a method of manufacturing the semiconductor structure and substrate thereof. The substrate includes a plurality of unit areas, each of the unit areas includes at least two subunit areas, each of the subunit areas is provided with a groove, the groove is opened from a back side of the substrate; and in one of the unit areas, preset opening ratios of the subunit areas are different. A light-emitting layer is grown on a front side of the substrate; and in one of the unit areas, light-emitting wavelengths of the light-emitting layer in the subunit areas are different.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: May 7, 2024
    Assignee: ENKRIS SEMICONDUCTOR, INC.
    Inventor: Kai Cheng
  • Patent number: 11978791
    Abstract: A semiconductor structure, comprising: a semiconductor substrate, a heterojunction, an in-situ insulating layer and a transition layer, which are arranged in sequence from bottom to top; a groove, passing through the in-situ insulating layer and the transition layer; and a P-type semiconductor layer, disposed in the groove and in a gate region on the transition layer, wherein the P-type semiconductor layer does not fully fill the groove. A method of manufacturing semiconductor structure is further disclosed.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: May 7, 2024
    Assignee: ENKRIS SEMICONDUCTOR, INC.
    Inventor: Kai Cheng
  • Publication number: 20240146091
    Abstract: A vehicle power management system and a power management method thereof are provided. The power management method includes: determining, by a microcontroller, whether or not a voltage of an ignition-off signal is less than a voltage threshold when the microcontroller receives the ignition-off signal; stopping a vehicle power supply from charging a backup battery, and using the vehicle power supply to charge a back-end load; activating a counter of the microcontroller; stopping the vehicle power supply from charging the back-end load, and using the backup battery to charge the back-end load when a counting time of the counter reaches a first time threshold; sending, by the microcontroller, the ignition-off signal to the back-end load when the counting time of the counter reaches a second time threshold; and stopping the backup battery from charging the back-end load when the counting time of the counter reaches a third time threshold.
    Type: Application
    Filed: April 17, 2023
    Publication date: May 2, 2024
    Inventors: MING-ZONG WU, CHUN-KAI CHANG, LI-WEI CHENG
  • Publication number: 20240138665
    Abstract: An imaging system, optionally an intra-oral camera, includes a blue light source and a barrier filter over a camera sensor. Optionally, the imaging system can also take white light images. Optionally, the system includes positively charged nanoparticles with fluorescein. The fluorescent nanoparticles can be identified on an image of a tooth by machine vision or machine learning algorithms on a pixel level basis. Either white light or fluorescent images can be used, with machine learning or artificial intelligence algorithms, to score the lesions. However, the white light image is not useful for determining whether lesions, particularly ICDAS 0-2 lesions, are active or inactive. A fluorescent image, with the fluorescent nanoparticles, can be used to detect and score active lesions. Optionally using a white light image and a fluorescent image together allows for all lesions, active and inactive, to be located and scored, and for their activity to be determined.
    Type: Application
    Filed: March 4, 2022
    Publication date: May 2, 2024
    Inventors: Kai Alexander JONES, Nathan A. JONES, Steven BLOEMBERGEN, Scott Raymond PUNDSACK, Yu Cheng LIN, Helmut NEHER, JR.
  • Publication number: 20240145626
    Abstract: The present application discloses a semiconductor structure including: a base, the base being made of an amorphous material and including at least one trench; a monocrystalline layer, at least part of the monocrystalline layer being provided in the trench; and an epitaxial structure layer, located on the side of the monocrystalline layer away from the base. The semiconductor structure disclosed in the present application includes the monocrystalline layer formed in the at least one trench of the base, and an amorphous material with a thermal expansion coefficient similar to that of the monocrystalline layer is selected as the base, which can relieve the tensile stress generated by the monocrystalline layer during the epitaxial process. At the same time, the epitaxial structure layer is grown on an independent monocrystalline layer, and the size is small, which alleviates the problem of semiconductor film cracking on the large-size substrate.
    Type: Application
    Filed: May 17, 2023
    Publication date: May 2, 2024
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventors: Liyang Zhang, Kai Cheng
  • Publication number: 20240145628
    Abstract: Disclosed are a manufacturing method for an epitaxial substrate, an epitaxial substrate, and a semiconductor structure. The manufacturing method includes: patterning a substrate to form a trench; manufacturing a transition layer in the trench, and performing crystal plane transformation processing on the transition layer based on a shape of the trench, so as to transform the transition layer into a single crystal layer, where a surface, away from the substrate, of the single crystal layer is a (111) crystal plane. Based on different shapes of the trench on the substrate, the transition layer is controlled to obtain a single crystal layer of a specific crystal plane after the crystal plane transformation processing, and a surface, away from the substrate, of the single crystal layer, is a (111) crystal plane. The (111) crystal plane of the single crystal layer facilitates subsequent epitaxial manufacturing of a semiconductor structure.
    Type: Application
    Filed: October 18, 2023
    Publication date: May 2, 2024
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventors: Liyang ZHANG, Kai CHENG
  • Publication number: 20240137709
    Abstract: An electro-acoustical transducer device is disclosed, which includes: a hollow disk body that generally defines an axis of propagation, the hollow disk body comprising: a pair of plate members extending substantially perpendicular to the axis of propagation, each provided with a central transmitting port arranged about the axis of propagation, and a peripheral enclosure jointing the pair of plate members at the respective outer edge portions thereof, thereby defining a chamber of resonance between the pair of plate members; wherein a ring-opening about the axis of propagation that enables access to the chamber of resonance is formed between the central transmitting ports of the plate members.
    Type: Application
    Filed: April 27, 2023
    Publication date: April 25, 2024
    Inventors: YU-CHEN CHEN, CHUN-KAI CHAN, HSU-HSIANG CHENG, MING-CHING CHENG
  • Publication number: 20240135846
    Abstract: An electronic device and a manufacturing method thereof are provided. The manufacturing method of the electronic device includes the following. A substrate is provided. A plurality of electronic units are transferred to the substrate. The electronic units are inspected to obtain M first defect maps. The M first defect maps are integrated into N second defect maps, where N<M. M repairing groups are provided according to the N second defect maps. Each of the repairing groups includes at least one repairing electronic unit. The M repairing groups are transferred to the substrate. At least two of the repairing groups have the same location distribution of repairing electronic units, and the location distribution is consistent with a defect distribution of one of the second defect maps.
    Type: Application
    Filed: September 17, 2023
    Publication date: April 25, 2024
    Applicant: Innolux Corporation
    Inventors: Kai Cheng, Fang-Ying Lin, Ming-Chang Lin, Tsau-Hua Hsieh
  • Patent number: 11965759
    Abstract: Ultrasonic measurements of fluid properties are performed with the aid of an optical fiber or a package of optical fibers by exciting ultrasound waves at a first location along the optical fiber in the fluid by means of light from the optical fiber and detecting an effect of the ultrasound waves on light reflection or propagation in the optical fiber and/or a further optical fiber in the package at a second location along the optical fiber or at the end of the optical fiber.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: April 23, 2024
    Assignee: Nederlandse Organisatie voor toegepast-natuurwetenschappelijk onderzoek TNO
    Inventors: Gert-Jan Adriaan Van Groenestijn, Paul Louis Maria Joseph Van Neer, Fokko Pieter Wieringa, Arno Willem Frederik Volker, Lun Kai Cheng
  • Patent number: 11966245
    Abstract: The present disclosure provides a voltage reference source circuit for generating a reference voltage, the voltage reference source circuit comprises a starting circuit, a current generating circuit, and an output voltage reference circuit electrically connected in sequence. The starting circuit provides a starting voltage for the voltage reference source circuit to prevent the voltage reference source circuit from operating in zero state area. The current generating circuit generates a working current for the output voltage reference circuit; and the output voltage reference circuit is used to realize the reference voltage output with zero temperature coefficient according to the working current output by the current generating circuit. A low power consumption power supply system is also disclosed.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: April 23, 2024
    Assignee: FocalTech Electronics (Shenzhen) Co., Ltd.
    Inventors: Zhen-Juan Cheng, Jing-Kai Zhang, Jin-Cheng Tian, Xin-Xi Jiang
  • Patent number: 11964881
    Abstract: A method for making iridium oxide nanoparticles includes dissolving an iridium salt to obtain a salt-containing solution, mixing a complexing agent with the salt-containing solution to obtain a blend solution, and adding an oxidating agent to the blend solution to obtain a product mixture. A molar ratio of a complexing compound of the complexing agent to the iridium salt is controlled in a predetermined range so as to permit the product mixture to include iridium oxide nanoparticles.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: April 23, 2024
    Assignee: NATIONAL YANG MING CHIAO TUNG UNIVERSITY
    Inventors: Pu-Wei Wu, Yi-Chieh Hsieh, Han-Yi Wang, Kuang-Chih Tso, Tzu-Ying Chan, Chung-Kai Chang, Chi-Shih Chen, Yu-Ting Cheng
  • Publication number: 20240124844
    Abstract: The present disclosure provides a method for preparing a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors, the composition prepared by the method, and use of the composition for treating arthritis. The composition of the present disclosure achieves the effect of treating arthritis through various efficacy experiments.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 18, 2024
    Inventors: Chia-Hsin Lee, Po-Cheng Lin, Yong-Cheng Kao, Ming-Hsi Chuang, Chun-Hung Chen, Chao-Liang Chang, Kai-Ling Zhang
  • Publication number: 20240127429
    Abstract: A meniscus tear assisted determination system includes an image capturing device and a processor. The image capturing device is for capturing a target protocol of a subject, and the target protocol includes a plurality of target knee joint image sequences. The processor is signally connected to the image capturing device and includes a data preprocessing module and a meniscus tear assisted determination program. The data preprocessing module is for grouping the plurality of target knee joint image sequences and extracting a plurality of target coronal plane image sequences and a plurality of target sagittal plane image sequences. The meniscus tear assisted determination program includes a meniscus location detector and a meniscus tear predictor.
    Type: Application
    Filed: February 23, 2023
    Publication date: April 18, 2024
    Applicant: China Medical University
    Inventors: Kuang-Sheng Lee, Kai-Cheng Hsu, Ya-Lun Wu, Ching-Ting Lin
  • Patent number: 11962847
    Abstract: A channel hiatus correction method for an HDMI device is provided. A recovery code from scrambled data of the stream is obtained. A liner feedback shift register (LFSR) value of channels of the HDMI port is obtained based on the recovery code and the scrambled data of the stream. The stream is de-scrambled according to the LFSR value of the channels of the HDMI port. Video data is displayed according to the de-scrambled stream.
    Type: Grant
    Filed: November 9, 2022
    Date of Patent: April 16, 2024
    Assignee: MEDIATEK INC.
    Inventors: Chia-Hao Chang, You-Tsai Jeng, Kai-Wen Yeh, Yi-Cheng Chen, Te-Chuan Wang, Kai-Wen Cheng, Chin-Lung Lin, Tai-Lai Tung, Ko-Yin Lai