Patents by Inventor Kai Cheng

Kai Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240096916
    Abstract: Disclosed is an image sensor. The image sensor includes at least one photosensitive unit including at least two photosensitive layers stacked and not completely overlapped, a region where each photosensitive layer is not overlapped with other photosensitive layers being configured to arrange an electrode wire, and photosensitive component contents of the at least two photosensitive layers being different. According to the present disclosure, a wavelength range of sensible light of each photosensitive unit may be enlarged, so that more image details may be recorded, images with a high dynamic range may be generated, and people may experience a visual effect close to a real environment. In addition, as there is no need to reduce a photosensitive area of the photosensitive layer for arranging the electrode wires, the photosensitive area of the photosensitive layer is increased and thereby a dynamic range of the image sensor is improved.
    Type: Application
    Filed: January 19, 2023
    Publication date: March 21, 2024
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventors: Yuchao CHEN, Kai CHENG
  • Publication number: 20240096857
    Abstract: An electronic device includes a substrate, a spacer, a first element and a second element. The spacer is disposed on the substrate and has a first portion, a second portion, a first opening, a second opening and a third opening arranged in a first direction. In a cross-section view, the second opening is located between the first opening and the third opening, the first portion is located between the first opening and the second opening, and the second portion is located between the second opening and the third opening. A width of the first portion is less than a width of the second portion in the first direction, and an area of the second opening is different from an area of the first opening. The first element is overlapped with the first opening. The second element is overlapped with the third opening.
    Type: Application
    Filed: December 4, 2023
    Publication date: March 21, 2024
    Applicant: Innolux Corporation
    Inventors: Jian-Jung Shih, Tsau-Hua Hsieh, Fang-Ying Lin, Kai Cheng
  • Publication number: 20240096647
    Abstract: A method includes forming a first package component, which formation process includes forming a first plurality of openings in a first dielectric layer, depositing a first metallic material into the first plurality of openings, performing a planarization process on the first metallic material and the first dielectric layer to form a plurality of metal pads in the first dielectric layer, and selectively depositing a second metallic material on the plurality of metal pads to form a plurality of bond pads. The first plurality of bond pads comprise the plurality of metal pads and corresponding parts of the second metallic material. The first package component is bonded to a second package component.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Mirng-Ji Lii, Chen-Shien Chen, Lung-Kai Mao, Ming-Da Cheng, Wen-Hsiung Lu
  • Patent number: 11930995
    Abstract: A method for obtaining and processing image data by using a medical visual aid system including a monitor and an endoscope configured to be inserted into a body cavity and including an image capturing device and a light emitting device, the method including illuminating a field of view of the image capturing device with the light emitting device, capturing the image data using the image capturing device, providing a non-linear scaling model adapted to the body cavity, adjusting the image data by applying the non-linear scaling model such that adjusted image data is formed, and presenting the adjusted image data on the monitor.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: March 19, 2024
    Assignee: AMBU A/S
    Inventors: Finn Sonnenborg, Brian Nielsen, Curt Allan Johansson, Sebastian Ortega Zafra, Qian Yang, Kai-Cheng Chan, Wang Chang-Yu
  • Publication number: 20240084135
    Abstract: A resin composition and uses thereof are provided. The resin composition includes: (A) an epoxy resin; (B) a bismaleimide resin; and (C) a first flame retardant having a structure of formula (I): Wherein Ar is a C3 to C18 heteroaryl or a C6 to C18 aryl; R1 is H or a C1 to C18 alkyl; and R2 and R3 are independently H, a C1 to C18 alkyl, a C3 to C18 heteroaryl, or a C6 to C18 aryl.
    Type: Application
    Filed: December 7, 2022
    Publication date: March 14, 2024
    Inventors: Tsung-Hsien LIN, Shur-Fen LIU, Pin CHIEN, Kai-Cheng YANG
  • FAN
    Publication number: 20240084813
    Abstract: A fan includes a fan hub and multiple blades. At least one blade includes a blade body and two extended blade portions. The two extended blade portions are connected to a first edge and a second edge on the blade body. The first edge and the second edge are opposite to sides of the blade body. In a top view, at least one of the two extended blade portions has a first width that is adjacent to the fan hub, and a second width that is away from the fan hub. The second width is larger than the first width. The second width and the first width are connected by a continuous surface. The width of the continuous surface increases away from the first width.
    Type: Application
    Filed: December 19, 2022
    Publication date: March 14, 2024
    Inventors: Yi-Lun CHENG, Chih Kai YANG
  • Publication number: 20240088155
    Abstract: A semiconductor device includes source/drain regions, a gate structure, a first gate spacer, and a dielectric material. The source/drain regions are over a substrate. The gate structure is laterally between the source/drain regions. The first gate spacer is on a first sidewall of the gate structure, and spaced apart from a first one of the source/drain regions at least in part by a void region. The dielectric material is between the first one of the source/drain regions and the void region. The dielectric material has a gradient ratio of a first chemical element to a second chemical element.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Bo-Yu LAI, Kai-Hsuan LEE, Wei-Yang LEE, Feng-Cheng YANG, Yen-Ming CHEN
  • Patent number: 11926697
    Abstract: The present invention provides a fluorine-containing liquid crystal polymer of Formula (1). The present invention also discloses a fluorine-containing liquid crystal elastomer, which comprises a copolymer of a fluorine-containing liquid crystal polymer of Formula (1) with a near-infrared dye of Formula (2). The fluorine-containing liquid crystal elastomer of the present invention shrinks due to the photothermal conversion effect of the material under the irradiation of near-infrared light, and thus is widely applicable to the field of actuators. The fluorine-containing liquid crystal polymer of the present invention introduces fluorine-containing segments into the cross-linked network of the liquid crystal polymer, to improve the mechanical performance of the material, and greatly extend the service time of light-controlled actuators.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: March 12, 2024
    Assignee: SOOCHOW UNIVERSITY
    Inventors: Zhenping Cheng, Kai Tu, Enjie He, Jiannan Cheng, Lifen Zhang, Xiulin Zhu
  • Publication number: 20240079449
    Abstract: A semiconductor structure includes: a first semiconductor layer, including a first surfaces and a second surfaces opposite to the first surface; a second semiconductor layer, disposed on the first semiconductor layer, where a conductive type of the second semiconductor layer is the same as that of the first semiconductor layer, and a doping concentration of the second semiconductor layer is less than that of the first semiconductor layer; grooves, formed in the second semiconductor layer; and a third semiconductor layer, where a conductive type of the third semiconductor layer is different from that of the second semiconductor layer, a material of the third semiconductor layer is different from that of the second semiconductor layer, and at least a portion of the third semiconductor layer is disposed in the grooves.
    Type: Application
    Filed: August 23, 2023
    Publication date: March 7, 2024
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventor: Kai Cheng
  • Publication number: 20240081055
    Abstract: A semiconductor structure includes a substrate. The substrate is divided into a first element region, a second element region and a boundary region. The boundary region is disposed between the first element region and a second element region. A first mask structure covers the first element region. A second mask structure is disposed in the second element region. A logic gate structure is disposed within the second element region.
    Type: Application
    Filed: September 27, 2022
    Publication date: March 7, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hsuan-Kai Wang, Chao-Sheng Cheng, Chi-Cheng Huang
  • Publication number: 20240079520
    Abstract: A light emitting device includes: a first substrate; a light emitting structure layer located on the first substrate; and an insertion layer located on the light emitting structure layer, a surface, away from the light emitting structure layer, of the insertion layer is a roughened surface, and the insertion layer has a protective effect on the light emitting structure layer. In the light emitting device provided by the present disclosure, the surface, away from the light emitting structure layer, of the insertion layer is the roughened surface, and the insertion layer has the protective effect on the light emitting structure layer during a peeling off process, which solves problems of reduced yield and reduced light extraction efficiency of a light emitting device.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 7, 2024
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventors: Liyang ZHANG, Kai CHENG
  • Publication number: 20240075071
    Abstract: Disclosed in the present invention is an optimized cell transplant. The optimized cell transplant is formed by performing gene induction and modification on a mesenchymal stem cell in the form of a small molecule and protein composition. The expression levels of CD200 gene, Galectin-9 gene and VISTA gene can be increased synchronously after cell culture. Vector virus infection and plasmid transfection are not required in the cell preparation process, so that high biological safety and great clinical application value of cells are achieved.
    Type: Application
    Filed: November 23, 2022
    Publication date: March 7, 2024
    Inventors: Ruei-Yue Liang, Kai-Ling Zhang, Ming-Hsi Chuang, Po-Cheng Lin, Peggy Leh Jiunn Wong, Chia-Hsin Lee
  • Publication number: 20240079232
    Abstract: Disclosed are a semiconductor structure and a method for manufacturing a semiconductor structure, the method includes: forming a first transition layer, a protection layer and an active structure layer sequentially epitaxially on a side of a growth substrate, where a surface, away from the growth substrate, of the first transition layer is a two-dimensional flat surface; on a first plane, an orthographic projection of the active structure layer is at least partially covered by an orthographic projection of the protection layer, and the first plane is perpendicular to an arrangement direction of the protection layer and the active structure layer; detaching the growth substrate by a laser lift-off process, to make the epitaxial layer transferred to a transfer substrate; etching the first transition layer up to the protection layer, to make a surface, away from the active structure layer, of the protection layer to be a planarization surface.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 7, 2024
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventors: Liyang ZHANG, Kai CHENG
  • Publication number: 20240080270
    Abstract: A method for automatically regulating an explicit congestion notification (ECN) of a data center network based on multi-agent reinforcement learning is provided. The method specifically includes steps 1 to 3. In step 1, an ECN threshold regulation of a data center network is modelled as a multi-agent reinforcement learning problem. In step 2, an independent proximal policy optimization (IPPO) algorithm in multi-agent reinforcement learning is used for training according to features of the data center network. In step 3, offline pre-training is combined with online incremental learning such that a model deployed on each switch is capable of rapidly adapting to a dynamic data center network environment.
    Type: Application
    Filed: August 23, 2023
    Publication date: March 7, 2024
    Inventors: Ting WANG, Puyu CAI, Kai CHENG
  • Publication number: 20240079263
    Abstract: A wafer container includes a frame, a door and at least a pair of shelves. The frame has opposite sidewalls. The pair of the shelves are respectively disposed and aligned on the opposite sidewalls of the frame. Various methods and devices are provided for holding at least one wafer to the shelves during transport.
    Type: Application
    Filed: February 22, 2023
    Publication date: March 7, 2024
    Inventors: Kai-Hung HSIAO, Chi-Chung JEN, Yu-Chun SHEN, Yuan-Cheng KUO, Chih-Hsiung HUANG, Wen-Chih CHIANG
  • Patent number: 11923310
    Abstract: A package structure and method for forming the same are provided. The package structure includes a first through via structure formed in a substrate and a semiconductor die formed below the first through via structure. The package structure further includes a conductive structure formed in a passivation layer over the substrate. The conductive structure includes a first via portion and a second via portion, the first via portion is directly over the first through via structure, and there is no conductive material directly below and in direct contact with the second via portion.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Kai Cheng, Tsung-Shu Lin, Tsung-Yu Chen, Hsien-Pin Hu, Wen-Hsin Wei
  • Patent number: 11919790
    Abstract: An anaerobic-AO-SACR combined advanced nitrogen removal system for high ammonia-nitrogen wastewater, in which high ammonia-nitrogen wastewater first enters an anaerobic reactor to remove most of organic matters from the wastewater, effluent water enters an AO reactor for nitrogen removal by pre-denitrification in an anoxic zone and for removal of the remaining organic matters and nitrification of ammonia nitrogen in an aerobic zone, and then the effluent water enters an intermediate pool. Meanwhile, under the control of a water quality testing device and a PLC controller, a part of raw water is introduced into the intermediate pool to adjust the carbon nitrogen ratio of the wastewater.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: March 5, 2024
    Assignee: SHANDONG JIANZHU UNIVERSITY
    Inventors: Kai Wang, Daoji Wu, Fengxun Tan, Congwei Luo, Xiaoxiang Cheng, Hongye Li, Yu Tian
  • Publication number: 20240072211
    Abstract: A light emitting device includes: a substrate; a DBR mask layer on a side of the substrate, the DBR mask layer being provided with a window exposing the substrate, the window including an opening end away from the substrate and a bottom wall end close to the substrate, and on a plane where the substrate is located, an orthographic projection of the opening end falling within an orthographic projection of the bottom wall end; and a light emitting unit. The light emitting unit includes an active layer located on a side, away from the substrate, of the DBR mask layer. Providing the window on the DBR mask layer may reduce dislocation density during epitaxial growth of the light emitting unit, and arrangement of the DBR mask layer may improve light extraction efficiency of the light emitting device.
    Type: Application
    Filed: July 25, 2023
    Publication date: February 29, 2024
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventor: Kai CHENG
  • Publication number: 20240072123
    Abstract: Disclosed is a semiconductor structure, including a substrate; a V-shaped groove layer, a V-shaped groove enlargement layer and a semiconductor epitaxial layer stacked from bottom to top; a first V-shaped groove arranged on a surface of the V-shaped groove layer close to the V-shaped groove enlargement layer; a second V-shaped groove arranged on a surface of the V-shaped groove enlargement layer close to the semiconductor epitaxial layer, where a size of the second V-shaped groove is greater than a size of the first V-shaped groove In the present disclosure, a lateral epitaxy effect of the V-shaped groove enlargement layer and the semiconductor epitaxial layer is realized for two times, which makes dislocation fully bend, effectively improving crystal quality. Meanwhile, the first V-shaped groove and the second V-shaped groove are self-formed during an epitaxial growth process, which greatly reduces preparation cost and improves preparation efficiency.
    Type: Application
    Filed: July 13, 2023
    Publication date: February 29, 2024
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventors: Liyang ZHANG, Kai CHENG
  • Publication number: 20240071761
    Abstract: In the present disclosure, a semiconductor structure and a manufacturing method of the semiconductor structure are provided. The semiconductor structure includes a base, a first mask layer, a first epitaxial layer, and a second epitaxial layer. The first mask layer is located on the base, and the first mask layer has a first window that exposes the base. The first window includes an opening end far from the base and a bottom wall end close to the base. On the plane where the base is located, the orthographic projection of the opening end falls within the bottom wall end.
    Type: Application
    Filed: July 20, 2023
    Publication date: February 29, 2024
    Applicant: ENKRIS SEMICONDUCTOR, INC.
    Inventor: Kai Cheng