Patents by Inventor Kai-Chieh Yang
Kai-Chieh Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240105850Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a semiconductor fin disposed over a substrate, wherein the semiconductor fin includes a channel region and a source/drain region; a gate structure disposed over the channel region of the semiconductor fin, wherein the gate structure includes a gate spacer and a gate stack; a source/drain structure disposed over the source/drain region of the semiconductor fin; and a fin top hard mask vertically interposed between the gate spacer and the semiconductor fin, wherein the fin top hard mask includes a dielectric layer, and wherein a sidewall of the fin top hard mask directly contacts the gate stack, and another sidewall of the fin top hard mask directly contacts the source/drain structure.Type: ApplicationFiled: November 28, 2023Publication date: March 28, 2024Inventors: Che-Yu Yang, Kai-Chieh Yang, Ching-Wei Tsai, Kuan-Lun Cheng
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Patent number: 11931606Abstract: An anti-torque safety hook includes a main body, a gate member, and a detent member. The main body has a hook opening passing through the front and back sides thereof, a passage communicating to the right side of the hook opening, a female buckle arranged on the passage, a connection unit arranged below the hook opening, and an energy absorption area arranged on the left side of the hook opening. The gate member has a first end mounted on the main body and a second end comprising a male buckle, adapted for detachably coupled with the female buckle, so as to allow the gate member to open and close the passage. The detent member is coupled on the main body and maintained at a first position, so as for ensuring that the gate member closes the passage, while when the detent member is operated and switched to a second position, the safety is disarmed. The present invention mainly utilizes the detent member to ensure the gate member to close the passage.Type: GrantFiled: April 15, 2021Date of Patent: March 19, 2024Assignee: BEXUS INDUSTRIES CO., LTD.Inventors: Kai Chieh Yang, Yi-Ching Lin
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Patent number: 11923251Abstract: A method includes forming a gate stack, which includes a gate dielectric and a metal gate electrode over the gate dielectric. An inter-layer dielectric is formed on opposite sides of the gate stack. The gate stack and the inter-layer dielectric are planarized. The method further includes forming an inhibitor film on the gate stack, with at least a portion of the inter-layer dielectric exposed, selectively depositing a dielectric hard mask on the inter-layer dielectric, with the inhibitor film preventing the dielectric hard mask from being formed thereon, and etching to remove a portion of the gate stack, with the dielectric hard mask acting as a portion of a corresponding etching mask.Type: GrantFiled: May 7, 2021Date of Patent: March 5, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsu-Hsiu Perng, Kai-Chieh Yang, Zhi-Chang Lin, Teng-Chun Tsai, Wei-Hao Wu
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Patent number: 11923457Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a semiconductor fin disposed over a substrate, wherein the semiconductor fin includes a channel region and a source/drain region; a gate structure disposed over the channel region of the semiconductor fin, wherein the gate structure includes a gate spacer and a gate stack; a source/drain structure disposed over the source/drain region of the semiconductor fin; and a fin top hard mask vertically interposed between the gate spacer and the semiconductor fin, wherein the fin top hard mask includes a dielectric layer, and wherein a sidewall of the fin top hard mask directly contacts the gate stack, and another sidewall of the fin top hard mask directly contacts the source/drain structure.Type: GrantFiled: June 27, 2022Date of Patent: March 5, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Che-Yu Yang, Kai-Chieh Yang, Ching-Wei Tsai, Kuan-Lun Cheng
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Patent number: 11901365Abstract: A finFET device that includes a substrate and at least one semiconductor fin extending from the substrate. The fin may include a plurality of wide portions comprising a first semiconductor material and one or more narrow portions. The one or more narrow portions have a second width less than the first width of the wide portions. Each of the one or more narrow portions separates two of the plurality of wide portions from one another such that the plurality of wide portions and the one or more narrow portions are arranged alternatingly in a substantially vertical direction that is substantially perpendicular with a surface of the substrate. The fin may also include a channel layer covering sidewalls of the plurality of wide portions and a sidewall of the one or more narrow portions.Type: GrantFiled: May 4, 2021Date of Patent: February 13, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wang-Chun Huang, Kai-Chieh Yang, Ching-Wei Tsai, Kuan-Lun Cheng, Chih-Hao Wang
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Patent number: 11892046Abstract: An internal drum brake anti-falling device includes a carrier having an accommodating chamber and main shaft crossingly arranged in the accommodating chamber for supporting a rotating drum to autorotate, wherein the rotating drum has a life belt coiled thereon, a brake unit arranged at an end thereof, and a drum brake module, which comprises a base, mounted in the accommodating chamber, and a passive ring, mounted on the base. An outer diameter of the base defines a first ring surface configured in a concentric circle manner to the main shaft.Type: GrantFiled: August 10, 2021Date of Patent: February 6, 2024Assignee: BEXUS INDUSTRIES CO., LTD.Inventors: Kai Chieh Yang, Chia Cheng Huang
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Publication number: 20230402795Abstract: An electrical connector includes: an insulating body; plural conductive terminals disposed in the insulating body, the conductive terminals including two signal terminals and one ground terminal arranged between the two signal terminals; a cable connected with the conductive terminals; and a metal shell disposed outside the insulating body, the metal shell including a top wall, an opening being set on the top wall, the shape of the opening being rectangular, the top wall being provided with elastic pieces protruding inward from the opening to electrically connect with the ground terminal, wherein the opening is sized and configured to achieve better electrical performance of the conductive terminals.Type: ApplicationFiled: June 8, 2023Publication date: December 14, 2023Inventors: LI-CHUN SHIUE, JIAN-REN WANG, KAI-CHIEH YANG
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Publication number: 20230386914Abstract: Methods of forming a semiconductor device structure are described. In some embodiments, the method includes forming a contact opening in an interlayer dielectric (ILD) layer disposed over an epitaxy source/drain region and forming a metal layer in the contact opening. The metal layer includes top portions, side portions, and a bottom portion, and a space is defined between the top portions of the metal layer. The method further includes performing a gradient metal removal process on the metal layer to enlarge the space, forming a sacrificial layer in the contact opening, recessing the sacrificial layer in the contact opening to expose a portion of the sidewall portions, removing the top portions and the exposed portion of the sidewall portions, removing the sacrificial layer, and forming a bulk metal layer on the bottom portion of the metal layer.Type: ApplicationFiled: May 26, 2022Publication date: November 30, 2023Inventors: Yu-Chen KO, Kai-Chieh YANG, Yu-Ting WEN, Ya-Yi CHENG, Min-Hsiu HUNG, Wei-Jung LIN, Chih-Wei CHANG, Ming-Hsing TSAI
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Publication number: 20230360969Abstract: A method of fabricating a contact structure includes the following steps. An opening is formed in a dielectric layer. A conductive material layer is formed within the opening and on the dielectric layer, wherein the conductive material layer includes a bottom section having a first thickness and a top section having a second thickness, the second thickness is greater than the first thickness. A first treatment is performed on the conductive material layer to form a first oxide layer on the bottom section and on the top section of the conductive material layer. A second treatment is performed to remove at least portions of the first oxide layer and at least portions of the conductive material layer, wherein after performing the second treatment, the bottom section and the top section of the conductive material layer have substantially equal thickness.Type: ApplicationFiled: May 6, 2022Publication date: November 9, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chang-Ting Chung, Shih-Wei Yeh, Kai-Chieh Yang, Yu-Ting Wen, Yu-Chen Ko, Ya-Yi Cheng, Min-Hsiu Hung, Chun-Hsien Huang, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai
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Patent number: 11799231Abstract: An electrical connector includes: an insulative base; a fixed terminal secured to the insulative base; and a movable terminal including a securing portion fixed to the insulative base, a connecting portion, a contacting portion in touch with the fixed terminal, a first and a second beams at two opposite sides of the connecting portion, and a tail, wherein at least one of the first and second beams has a first portion substantially perpendicular to the connecting portion and a second portion substantially parallel to the connecting portion.Type: GrantFiled: October 26, 2021Date of Patent: October 24, 2023Assignees: FOXCONN (KUNSHAN) COMPUTER CONNECTOR CO., LTD., FOXCONN INTERCONNECT TECHNOLOGY LIMITEDInventors: Kai-Chieh Yang, Wei-Ta Tseng, Ming-Ching Chen
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Publication number: 20230299200Abstract: A semiconductor device and a method of forming the same are provided. A semiconductor device according to an embodiment includes a P-type field effect transistor (PFET) and an N-type field effect transistor (NFET). The PFET includes a first gate structure formed over a substrate, a first spacer disposed on a sidewall of the first gate structure, and an unstrained spacer disposed on a sidewall of the first spacer. The NET includes a second gate structure formed over the substrate, the first spacer disposed on a sidewall of the second gate structure, and a strained spacer disposed on a sidewall of the first spacer.Type: ApplicationFiled: May 26, 2023Publication date: September 21, 2023Inventors: Kai-Chieh Yang, Wei Ju Lee, Li-Yang Chuang, Pei-Yu Wang, Ching-Wei Tsai, Kuan-Lun Cheng
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Publication number: 20230223302Abstract: A method includes forming a dielectric layer over an epitaxial source/drain region. An opening is formed in the dielectric layer. The opening exposes a portion of the epitaxial source/drain region. A barrier layer is formed on a sidewall and a bottom of the opening. An oxidation process is performing on the sidewall and the bottom of the opening. The oxidation process transforms a portion of the barrier layer into an oxidized barrier layer and transforms a portion of the dielectric layer adjacent to the oxidized barrier layer into a liner layer. The oxidized barrier layer is removed. The opening is filled with a conductive material in a bottom-up manner. The conductive material is in physical contact with the liner layer.Type: ApplicationFiled: May 13, 2022Publication date: July 13, 2023Inventors: Pin-Wen Chen, Chang-Ting Chung, Yi-Hsiang Chao, Yu-Ting Wen, Kai-Chieh Yang, Yu-Chen Ko, Peng-Hao Hsu, Ya-Yi Cheng, Min-Hsiu Hung, Chun-Hsien Huang, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai
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Patent number: 11664451Abstract: A semiconductor device and a method of forming the same are provided. A semiconductor device according to an embodiment includes a P-type field effect transistor (PFET) and an N-type field effect transistor (NFET). The PFET includes a first gate structure formed over a substrate, a first spacer disposed on a sidewall of the first gate structure, and an unstrained spacer disposed on a sidewall of the first spacer. The NET includes a second gate structure formed over the substrate, the first spacer disposed on a sidewall of the second gate structure, and a strained spacer disposed on a sidewall of the first spacer.Type: GrantFiled: March 29, 2021Date of Patent: May 30, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Kai-Chieh Yang, Li-Yang Chuang, Pei-Yu Wang, Wei Ju Lee, Ching-Wei Tsai, Kuan-Lun Cheng
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Patent number: 11545400Abstract: A method includes forming a gate stack, which includes a gate dielectric and a metal gate electrode over the gate dielectric. An inter-layer dielectric is formed on opposite sides of the gate stack. The gate stack and the inter-layer dielectric are planarized. The method further includes forming an inhibitor film on the gate stack, with at least a portion of the inter-layer dielectric exposed, selectively depositing a dielectric hard mask on the inter-layer dielectric, with the inhibitor film preventing the dielectric hard mask from being formed thereon, and etching to remove a portion of the gate stack, with the dielectric hard mask acting as a portion of a corresponding etching mask.Type: GrantFiled: December 7, 2020Date of Patent: January 3, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsu-Hsiu Perng, Kai-Chieh Yang, Zhi-Chang Lin, Teng-Chun Tsai, Wei-Hao Wu
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Patent number: 11532519Abstract: In an embodiment, a method includes: forming a first recess and a second recess in a substrate; growing a first epitaxial material stack in the first recess, the first epitaxial material stack including alternating layers of a first semiconductor material and a second semiconductor material, the layers of the first epitaxial material stack being undoped; growing a second epitaxial material stack in the second recess, the second epitaxial material stack including alternating layers of the first semiconductor material and the second semiconductor material, a first subset of the second epitaxial material stack being undoped, a second subset of the second epitaxial material stack being doped; patterning the first epitaxial material stack and the second epitaxial material stack to respectively form first nanowires and second nanowires; and forming a first gate structure around the first nanowires and a second gate structure around the second nanowires.Type: GrantFiled: June 7, 2021Date of Patent: December 20, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yi-Bo Liao, Kai-Chieh Yang, Ching-Wei Tsai, Kuan-Lun Cheng
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Patent number: 11517776Abstract: A backpack body has an openable accommodation chamber having a top opening. The accommodation chamber utilizes a restricting structure to position an energy absorption band. The energy absorption band includes a first layer and a second layer that are coincidingly bound. The top ends of the first and second layers extend first and second connecting portions respectively. The first and second connecting portions divergently protrude from the backpack body via the opening. The first connecting portion is configured for coupling with a safety harness, while the second connecting portion is for coupling with an anti-falling device. When the user falls, the falling makes the restricting structure release the first and second layers, so that the first and second layers leave the accommodation chamber via the opening for anti-falling suspension. Accordingly, the present invention has real improvements, including fine appearance, economic efficiency, and etc.Type: GrantFiled: January 31, 2019Date of Patent: December 6, 2022Assignee: AKILA TECH CO., LTD.Inventors: Kai Chieh Yang, Chia Cheng J Huang
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Publication number: 20220370841Abstract: An external drum brake anti-falling device includes a carrier having an accommodating chamber and a main shaft crossingly arranged in the accommodating chamber for supporting a rotating drum to autorotate, wherein the rotating drum has a life belt coiled thereon, a brake unit arranged at an end thereof, and a drum brake module, which includes a base, mounted in the accommodating chamber, and a passive ring, mounted on the base. The base has a through hole, axially penetratingly provided thereon, so as to define a first ring surface disposed in a concentric circle manner with the main shaft.Type: ApplicationFiled: August 10, 2021Publication date: November 24, 2022Inventors: Kai Chieh Yang, Chia Cheng Huang
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Publication number: 20220373049Abstract: An internal drum brake anti-falling device includes a carrier having an accommodating chamber and main shaft crossingly arranged in the accommodating chamber for supporting a rotating drum to autorotate, wherein the rotating drum has a life belt coiled thereon, a brake unit arranged at an end thereof, and a drum brake module, which comprises a base, mounted in the accommodating chamber, and a passive ring, mounted on the base. An outer diameter of the base defines a first ring surface configured in a concentric circle manner to the main shaft.Type: ApplicationFiled: August 10, 2021Publication date: November 24, 2022Inventors: Kai Chieh Yang, Chia Cheng Huang
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Publication number: 20220328691Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a semiconductor fin disposed over a substrate, wherein the semiconductor fin includes a channel region and a source/drain region; a gate structure disposed over the channel region of the semiconductor fin, wherein the gate structure includes a gate spacer and a gate stack; a source/drain structure disposed over the source/drain region of the semiconductor fin; and a fin top hard mask vertically interposed between the gate spacer and the semiconductor fin, wherein the fin top hard mask includes a dielectric layer, and wherein a sidewall of the fin top hard mask directly contacts the gate stack, and another sidewall of the fin top hard mask directly contacts the source/drain structure.Type: ApplicationFiled: June 27, 2022Publication date: October 13, 2022Inventors: Che-Yu Yang, Kai-Chieh Yang, Ching-Wei Tsai, Kuan-Lun Cheng
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Publication number: 20220266074Abstract: An anti-torque safety hook includes a main body, a gate member, and a detent member. The main body has a hook opening passing through the front and back sides thereof, a passage communicating to the right side of the hook opening, a female buckle arranged on the passage, a connection unit arranged below the hook opening, and an energy absorption area arranged on the left side of the hook opening. The gate member has a first end mounted on the main body and a second end comprising a male buckle, adapted for detachably coupled with the female buckle, so as to allow the gate member to open and close the passage. The detent member is coupled on the main body and maintained at a first position, so as for ensuring that the gate member closes the passage, while when the detent member is operated and switched to a second position, the safety is disarmed. The present invention mainly utilizes the detent member to ensure the gate member to close the passage.Type: ApplicationFiled: April 15, 2021Publication date: August 25, 2022Inventors: Kai Chieh Yang, Yi-Ching Lin