Patents by Inventor Kai Yang

Kai Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11884406
    Abstract: The present application provides a system for unmanned aerial vehicle (UAV) parachute landing. An exemplary system includes a detector configured to detect at least one of a flight speed, a wind speed, a wind direction, a position, a height, and a voltage of a UAV. The system also includes a memory storing instructions and a processor configured to execute the instructions to cause the system to: determine whether to open a parachute of the UAV in accordance with a criterion, responsive to the determination to open the parachute of the UAV, stop a motor of the UAV that spins a propeller of the UAV, and open the parachute of the UAV after stopping the motor of the UAV for a first period.
    Type: Grant
    Filed: January 8, 2019
    Date of Patent: January 30, 2024
    Assignee: GEOSAT Aerospace & Technology
    Inventors: Lung-Shun Shih, Fu-Kai Yang, Yi-Feng Cheng, Di-Yang Wang, Chien-Hsun Liao
  • Publication number: 20240027428
    Abstract: The present invention discloses a method for building a co-culture model for Caco-2/RAW-264.7 cells induced by lipopolysaccharides and an application of the co-culture model. The method includes: 1) culturing Caco-2 cells and RAW-264.7 cells; 2) inoculating the 5 Caco-2 cells onto an AP side of an upper chamber of a Transwell plate, and incubating; 3) inoculating the RAW-264.7 cells onto a 24-well plate, and incubating; 4) transferring the upper chamber of the Transwell plate into the 24-well plate; 5) dissolving lipopolysaccharides in PBS to prepare a stock solution, filtering, and diluting for later use; and 6) adding an LPS-10% DMEM medium on a BL side, incubating, and forming an intestinal inflammation model.
    Type: Application
    Filed: March 13, 2023
    Publication date: January 25, 2024
    Applicant: ZHEJIANG UNIVERSITY OF TECHNOLOGY
    Inventors: Rongfa Guan, Mengyu Yang, Hao Zhong, Xiaofeng Liu, Donghong Liu, Guozhou Cao, Yong Cheng, Haitao Shen, Jun Huang, Kai Yang, Yanbin Wang, Haizhi Huang
  • Patent number: 11878685
    Abstract: A vehicle control method, a vehicle control apparatus, an electronic device and a self-driving vehicle all relates to the field of self-driving and intelligent transportation technologies. The method includes: when a vehicle is moving, in a case that an occluding object is detected, determining a hard brake speed limit point and a potential collision point according to a planned path of the vehicle and position information of the occluding object; calculating a speed limit value of the hard brake speed limit point based on a distance between the hard brake speed limit point and the potential collision point; in a case that a planned speed of the vehicle at the hard brake speed limit point is less than or equal to the speed limit value, controlling the vehicle to move at the planned speed.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: January 23, 2024
    Assignee: Beijing Baidu Netcom Science Technology Co., Ltd.
    Inventors: Lei Zhang, Kai Yang, Qijuan Yin, Wuzhao Zhang, Xiaoyan Wang
  • Publication number: 20240017525
    Abstract: A resin composition and a metal clad substrate are provided. The resin composition includes: 20 phr to 40 phr of an epoxy resin, 40 phr to 60 phr of a modified benzoxazine resin, 2 phr to 10 phr of a maleimide resin, and 25 phr to 50 phr of fillers. The modified benzoxazine resin contains a DOPO group. Based on a total weight of the modified benzoxazine resin being 100 wt %, an amount of the DOPO group ranges from 10 wt % to 20 wt %.
    Type: Application
    Filed: December 25, 2022
    Publication date: January 18, 2024
    Inventors: SHENG-YEN WU, KAI-YANG CHEN, MENG-HAN YEH, LI-CHUNG LU
  • Patent number: 11876135
    Abstract: Epitaxial source/drain structures for enhancing performance of multigate devices, such as fin-like field-effect transistors (FETs) or gate-all-around (GAA) FETs, and methods of fabricating the epitaxial source/drain structures, are disclosed herein. An exemplary device includes a dielectric substrate. The device further includes a channel layer, a gate disposed over the channel layer, and an epitaxial source/drain structure disposed adjacent to the channel layer. The channel layer, the gate, and the epitaxial source/drain structure are disposed over the dielectric substrate. The epitaxial source/drain structure includes an inner portion having a first dopant concentration and an outer portion having a second dopant concentration that is less than the first dopant concentration. The inner portion physically contacts the dielectric substrate, and the outer portion is disposed between the inner portion and the channel layer. In some embodiments, the outer portion physically contacts the dielectric substrate.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: January 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Ming Lee, I-Wen Wu, Po-Yu Huang, Fu-Kai Yang, Mei-Yun Wang
  • Patent number: 11877381
    Abstract: A heat dissipating system for electronic devices includes a first heat dissipation device, a second heat dissipation device, and a thermal conduction component. The thermal conduction component is disposed around the first heat dissipation device and configured to thermally contact a heat source. The second heat dissipation device is disposed adjacent to the thermal conduction component. The first heat dissipation device is configured to generate a first working fluid toward the thermal conduction component, such that the heat transferred from the heat source to the thermal conduction component is dispersed in a plurality of directions directing away from the first heat dissipation device. The second heat dissipation device is configured to generate a second working fluid, such that the heat distributed adjacent to the second heat dissipation device is dissipated in at least one direction directing away from the second heat dissipation device.
    Type: Grant
    Filed: July 15, 2022
    Date of Patent: January 16, 2024
    Assignees: Inventec (Pudong) Technology Corporation, INVENTEC CORPORATION
    Inventors: Yi-Lun Cheng, Chih Kai Yang
  • Publication number: 20240011124
    Abstract: The present invention relates to a method and device for preparing an ultrathin metal lithium foil. With regard to the problems of lithium preparation processes in the prior art having a high lithium preparation reaction temperature, a low lithium recovery rate, low purity in collected lithium foils, a complicated process operation, etc., the present invention provides a method for preparing an ultrathin metal lithium foil, wherein firstly, a complex lithium salt is prepared, the complex lithium salt and a reducing agent are then subjected to a vacuum thermal reduction reaction so as to generate a metal vapor, the metal vapor is then subjected to vacuum distillation, and finally, vacuum evaporation is used to prepare the ultrathin metal lithium foil of the present invention.
    Type: Application
    Filed: November 1, 2021
    Publication date: January 11, 2024
    Applicant: SHENZHEN YANYI NEW MATERIALS CO., LTD.
    Inventors: Kai YANG, Shi-Qi ZHANG, Wei-Jing FENG, Xiao-Fei ZHANG, Chao QIAN, Min YUE, Bo LIU
  • Patent number: 11864494
    Abstract: Systems and methods are disclosed herein for detecting impurities of harvested plants in a receptacle of a harvester. In an embodiment, a harvester controller receives, from a camera facing the contents of the receptacle, an image of the contents. The harvester controller applies the image as input to a machine learning model. The harvester controller receives, as output from the machine learning model, an identification of an impurity of the harvested plants. The harvester controller transmits a control signal based on the impurity.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: January 9, 2024
    Assignee: Landing AI
    Inventors: Dongyan Wang, Andrew Yan-Tak Ng, Yiwen Rong, Greg Frederick Diamos, Bo Tan, Beom Sik Kim, Timothy Viatcheslavovich Rosenflanz, Kai Yang, Tian Wu
  • Patent number: 11855161
    Abstract: Methods and devices including an air gap adjacent a contact element extending to a source/drain feature of a device are described. Some embodiments of the method include depositing a dummy layer, which is subsequently removed to form the air gap. The dummy layer and subsequent air gap may be formed after a SAC dielectric layer such as silicon nitride is formed over an adjacent metal gate structure.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: I-Wen Wu, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang
  • Patent number: 11855169
    Abstract: A device includes a gate stack; a gate spacer on a sidewall of the gate stack; a source/drain region adjacent the gate stack; a silicide; and a source/drain contact electrically connected to the source/drain region through the silicide. The silicide includes a conformal first portion in the source/drain region, the conformal first portion comprising a metal and silicon; and a conformal second portion over the conformal first portion, the conformal second portion further disposed on a sidewall of the gate spacer, the conformal second portion comprising the metal, silicon, and nitrogen.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kai-Di Tzeng, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang
  • Patent number: 11854853
    Abstract: A method of correcting a misalignment of a wafer on a wafer holder and an apparatus for performing the same are disclosed. In an embodiment, a semiconductor alignment apparatus includes a wafer stage; a wafer holder over the wafer stage; a first position detector configured to detect an alignment of a wafer over the wafer holder in a first direction; a second position detector configured to detect an alignment of the wafer over the wafer holder in a second direction; and a rotational detector configured to detect a rotational alignment of the wafer over the wafer holder.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Cheng Chen, Chih-Kai Yang, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo
  • Patent number: 11856737
    Abstract: A rack temperature controlling method includes performing the following operations through a controller: obtaining a rack temperature data, calculating a temperature variant according to the rack temperature data, calculating a temperature deviation according to the temperature variant and a reference temperature, calculating a target speed according to the temperature deviation, and adjusting a speed of a fan to the target speed. A rack temperature controlling system including a thermometer and a controller is further provided. The thermometer measures and outputs a rack temperature data. The controller receives the rack temperature data, and calculates a temperature variant according to the rack temperature data. The controller further calculates a temperature deviation according to the temperature variant and a reference temperature, calculates a target speed according to the temperature deviation, and adjusts a speed of a fan to the target speed.
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: December 26, 2023
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Chien-Ming Lee, Kai-Yang Tung
  • Publication number: 20230411156
    Abstract: A method for forming a semiconductor device is provided. In some embodiments, the method includes forming a target layer over a semiconductor substrate, forming a carbon-rich hard masking layer over the target layer, patterning features in the carbon-rich hard masking layer using an etching process, performing a directional ion beam trimming process on the features patterned in the carbon-rich hard masking layer, and patterning the target layer using the carbon-rich hard masking layer as a mask.
    Type: Application
    Filed: July 31, 2023
    Publication date: December 21, 2023
    Inventors: Chia-Cheng Chen, Chun-Hung Wu, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo, Chun-Yen Chang, Chih-Kai Yang, Yu-Tien Shen, Ya Hui Chang
  • Publication number: 20230402531
    Abstract: The present disclosure provides semiconductor devices and methods of forming the same. A semiconductor device according to one embodiment of the present disclosure includes a first fin-shaped structure extending lengthwise along a first direction over a substrate, a first epitaxial feature over a source/drain region of the first fin-shaped structure, a gate structure disposed over a channel region of the first fin-shaped structure and extending along a second direction perpendicular to the first direction, and a source/drain contact over the first epitaxial feature. The bottom surface of the gate structure is closer to the substrate than a bottom surface of the source/drain contact.
    Type: Application
    Filed: July 24, 2023
    Publication date: December 14, 2023
    Inventors: Jia-Heng Wang, Chun-Han Chen, I-Wen Wu, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang
  • Publication number: 20230397656
    Abstract: A cigar cutter having a locking mechanism includes a rotatable ring, an elastic element, a locking assembly and an arresting portion. When a cutting blade unit of the cigar cutter is pressed, the rotatable ring is driven to rotate to compress the elastic element, and the arresting portion will engage with a plate of the locking assembly so that the cigar cutter enters a closed state. When an operation key of the locking assembly is pushed, the plate no longer blocks the arresting portion, and a force of the elastic element will drive the rotatable ring to rotate reversely so that the arresting portion is moved to its original position, thereby keeping the cigar cutter in an open state.
    Type: Application
    Filed: September 19, 2022
    Publication date: December 14, 2023
    Inventor: CHUN-KAI YANG
  • Publication number: 20230403816
    Abstract: A fan control method for controlling a set of fans of a system includes collecting M first sets of characteristic variables of a first period; inputting the M first sets of characteristic variables to a neural network to generate N third sets of characteristic variables of a second period corresponding to a second set of characteristic variables; adjusting the second set of characteristic variables to generate P adjusted second sets of characteristic variables to accordingly generate Q adjusted third sets of characteristic variables; generating an optimized second set of characteristic variables according to the N third sets of characteristic variables and the Q adjusted third sets of characteristic variables; generating a set of weights according to the optimized second set of characteristic variables; and controlling the set of fans according to the set of weights. The first period precedes the second period. M, N, P, Q are positive integers.
    Type: Application
    Filed: December 9, 2022
    Publication date: December 14, 2023
    Applicants: Inventec (Pudong) Technology Corp., Inventec Corporation
    Inventors: Chien-Ming Lee, Kai-Yang Tung, Hsin-Cheng Chu
  • Publication number: 20230399316
    Abstract: Provide crystal forms of 5-fluoro-1-(4-fluoro-3-(4-(pyrimidin-2-yl) piperazine-1-carbonyl) benzyl) quinazoline-2, 4 (1H,3H)-dione and preparation method thereof.
    Type: Application
    Filed: November 9, 2021
    Publication date: December 14, 2023
    Inventors: Sui Xiong CAI, Ning MA, Yisheng YANG, Kai YANG
  • Patent number: 11843028
    Abstract: Semiconductor devices and methods of fabricating semiconductor devices are provided. The present disclosure provides a semiconductor device that includes a first fin structure and a second fin structure each extending from a substrate; a first gate segment over the first fin structure and a second gate segment over the second fin structure; a first isolation feature separating the first and second gate segments; a first source/drain (S/D) feature over the first fin structure and adjacent to the first gate segment; a second S/D feature over the second fin structure and adjacent to the second gate segment; and a second isolation feature also disposed in the trench. The first and second S/D features are separated by the second isolation feature, and a composition of the second isolation feature is different from a composition of the first isolation feature.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: December 12, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: I-Wen Wu, Fu-Kai Yang, Chen-Ming B. Lee, Mei-Yun Wang, Jr-Hung Li, Bo-Cyuan Lu
  • Publication number: 20230397363
    Abstract: A heat dissipating system for electronic devices includes a first heat dissipation device, a second heat dissipation device, and a thermal conduction component. The thermal conduction component is disposed around the first heat dissipation device and configured to thermally contact a heat source. The second heat dissipation device is disposed adjacent to the thermal conduction component. The first heat dissipation device is configured to generate a first working fluid toward the thermal conduction component, such that the heat transferred from the heat source to the thermal conduction component is dispersed in a plurality of directions directing away from the first heat dissipation device. The second heat dissipation device is configured to generate a second working fluid, such that the heat distributed adjacent to the second heat dissipation device is dissipated in at least one direction directing away from the second heat dissipation device.
    Type: Application
    Filed: July 15, 2022
    Publication date: December 7, 2023
    Inventors: Yi-Lun CHENG, Chih Kai YANG
  • Publication number: 20230395669
    Abstract: Semiconductor devices and methods are provided. An exemplary method according to the present disclosure includes providing a workpiece having a channel region, a gate structure over the channel region, gate spacers extending along sidewalls of the gate structure, and an etch stop layer extending along sidewalls of the gate spacers. The method also includes performing an etching process to recess the gate spacers and the gate structure, thereby forming a funnel-shaped trench, depositing a dielectric layer over the workpiece to partially fill the funnel-shaped trench, etching back the dielectric layer to form dielectric spacers on the recessed gate spacers, forming a metal cap on the gate structure without forming the metal cap on the recessed gate spacers, and forming a dielectric cap on the metal cap.
    Type: Application
    Filed: June 4, 2022
    Publication date: December 7, 2023
    Inventors: Yu-Hsuan Lin, Chun Po Chang, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang, Jian-Hao Chen