Patents by Inventor Kai Yi

Kai Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150270054
    Abstract: An integrated stacked transformer includes a primary winding, a secondary winding and a plurality of bridges, wherein the primary winding is formed by a first metal layer and includes a plurality of segments that are not electrically connected to each other; the secondary winding is form by a second metal layer and includes a plurality of segments that are not electrically connected to each other; the plurality of bridges are formed by a third metal layer. A portion of the bridges is connected to the segments of the primary winding respectively to make the segments of the primary winding form a primary inductor; and another portion of the bridges is connected to the segments of the secondary winding respectively to make the segments of the secondary winding form a secondary inductor.
    Type: Application
    Filed: March 16, 2015
    Publication date: September 24, 2015
    Inventors: Kai-Yi Huang, Hsiao-Tsung Yen, Yuh-Sheng Jean, Ta-Hsun Yeh
  • Patent number: 9112303
    Abstract: Embodiments of magnetic connectors are disclosed. Embodiments show the use of magnetic connectors for power and/or signal bus coupling to electronic devices from support bases, stands, or cables. In some embodiments, spherical contacts, such as ball bearings, are pressed into firm contact with an electronic device by the use of conductive springs, which in turn electrically couple the spherical contacts to the bus lines. Contact arrangements are shown which allow rotation of the electronic device against an embodiment of magnetic connector. Arrangements of multiple magnets having differing polarities are shown when alignment of an electronic device in a particular orientation is required.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: August 18, 2015
    Assignee: ADONIT CO., LTD.
    Inventors: Zachary Joseph Zeliff, Yueh Hua Li, Kristopher Perpich, Yu Tzu Huang, Kai Yi Lu
  • Publication number: 20150192610
    Abstract: A test apparatus includes a DUT block, at least one probe and at least one variable-length pusher. The DUT block is used for allowing the DUT to be disposed thereon. The probe is located on the DUT block. The variable-length pusher is located above the probe. The actuator is used for moving the variable-length pusher to push against the DUT to force the DUT to be in electrical contact with the probe.
    Type: Application
    Filed: January 9, 2014
    Publication date: July 9, 2015
    Applicant: Taiwan Semiconductor Manufacturing CO., LTD.
    Inventor: Kai-Yi Tang
  • Publication number: 20150159387
    Abstract: A forming tube for forming and reinforcing a concrete column includes a tubular lining and a fiber-reinforced composite shell. The tubular lining is made from a first material, and has inner and outer tubular surfaces. The inner tubular surface has a plurality of ridge units displaced from one another in a direction of an axis. Each ridge unit has a plurality of ridges displaced from one another in a circumferential direction. The fiber-reinforced composite shell is made from a second material different from the first material, and is configured to enclose the outer tubular surface. The fiber-reinforced composite shell is formed by winding a prepreg filament on the outer tubular surface, followed by curing the prepreg filament.
    Type: Application
    Filed: May 7, 2014
    Publication date: June 11, 2015
    Applicant: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: Chung-Che Chou, Chung-Sheng Lee, Hao-Hsiang Tan, Kai-Yi Wu
  • Publication number: 20150155433
    Abstract: A light-emitting device includes: a Distributed Bragg reflector comprising alternate first semiconductor layers and second semiconductor layers, wherein each first semiconductor layer comprises a low-refractive-index part having a depth; and a light-emitting semiconductor stack associated with the Distributed Bragg reflector; wherein the depths of the low-refractive-index parts of the first semiconductor layers are gradually changed in a direction toward the light-emitting semiconductor stack.
    Type: Application
    Filed: November 29, 2013
    Publication date: June 4, 2015
    Applicant: EPISTAR CORPORATION
    Inventors: Wu-Tsung Lo, Yu-Chih Yang, Chien-Ming Wu, Kai-Yi Hong
  • Publication number: 20150130700
    Abstract: An assembled electronic apparatus and a control method thereof are provided. The assembled electronic apparatus includes a first body and a second body. A second processor shares a partial content of a sensing record generated by a sensing module through a second information sharing module. The first body and the second body are connected with each other through the first connector and the second connector. After being connected with each other, a message is transmitted by one of the first processor and the second processor to another one of the first processor and the second processor, so that a function is executed by the another one of the first processor and the second processor through the corresponding first processor or the corresponding second processor according to the message. The first processor shares a content of the sensing record generated by the sensing module through a first information sharing module.
    Type: Application
    Filed: July 18, 2014
    Publication date: May 14, 2015
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Kai-Yi Chen, Hsiu-Hang Lin, Ching-Wen Sun, Pin-Yu Chou, Yu-Tzu Hsu, Chia-Ni Chen, Wei-Cheng Chuang, Ming-Feng Liu
  • Patent number: 9030125
    Abstract: The present invention discloses a power circuit having multiple stages of charge pumps. The power circuit comprises a first charge pump, a second charge pump, a voltage stabilizing capacitor, and an output capacitor. The first charge pump adjusts an input voltage and produces a first output voltage. The second charge pump adjusts the first output voltage, produces a second output voltage, and outputs the second output voltage for driving a loading. The voltage stabilizing capacitor is coupled between the first and second charge pumps and connected externally to the output of the first charge pump. The output capacitor is coupled to the second charge pump for providing the second output voltage. According to the present invention, the effect of supplying large transient currents to the loading can be achieved by connecting externally the voltage stabilizing capacitor to the output of the first charge pump.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: May 12, 2015
    Assignee: Sitronix Technology Corp.
    Inventors: Kuan-Chao Liao, Kai-Yi Wu
  • Publication number: 20150049008
    Abstract: The present invention relates to a power circuit of displaying device, which comprises a timing controller, a control circuit, and a charge pump (single or multiple stages). The timing controller outputs a timing control signal to the control circuit. The control circuit outputs a clock signal or a capacitance adjusting signal according to the timing control signal. The charge pump receives the input voltage and outputs an output voltage according to the clock signal or the capacitance adjusting signal. The output voltage is provided to the scan driver for generating a plurality of scan driving signals. Accordingly, by increasing the rise rate of the output voltage of the charge pump in the voltage conversion time and reducing the rise rate of the output voltage close to the voltage holding time, the present invention can achieve the effect of reducing the power consumption.
    Type: Application
    Filed: October 4, 2013
    Publication date: February 19, 2015
    Applicant: SITRONIX TECHNOLOGY CORP.
    Inventors: KAI-YI WU, KUAN-CHAO LIAO, HUNG-YU LU
  • Publication number: 20150048743
    Abstract: The present invention discloses a power circuit having multiple stages of charge pumps. The power circuit comprises a first charge pump, a second charge pump, a voltage stabilizing capacitor, and an output capacitor. The first charge pump adjusts an input voltage and produces a first output voltage. The second charge pump adjusts the first output voltage, produces a second output voltage, and outputs the second output voltage for driving a loading. The voltage stabilizing capacitor is coupled between the first and second charge pumps and connected externally to the output of the first charge pump. The output capacitor is coupled to the second charge pump for providing the second output voltage. According to the present invention, the effect of supplying large transient currents to the loading can be achieved by connecting externally the voltage stabilizing capacitor to the output of the first charge pump.
    Type: Application
    Filed: October 7, 2013
    Publication date: February 19, 2015
    Applicant: SITRONIX TECHNOLOGY CORP.
    Inventors: KUAN-CHAO LIAO, KAI-YI WU
  • Publication number: 20140367856
    Abstract: A semiconductor manufacturing process includes the following steps of providing a silicon substrate having at least one connection pad and a protection layer, forming a first seed layer having at least one first section and at least one second section, forming a first photoresist layer, forming a first buffer layer having a coupling portion and a cladding portion, removing the first photoresist layer, removing the second section of the first seed layer to form a first under bump metallurgy layer, forming a support layer on the protection layer and the first buffer layer, the first under bump metallurgy layer has a first ring wall, the first buffer layer has a second ring wall, wherein the first ring wall, the second ring wall and the cladding portion are cladded by the support layer, and forming a connection portion and covering the coupling portion with the connection portion.
    Type: Application
    Filed: September 2, 2014
    Publication date: December 18, 2014
    Inventors: Cheng-Hung Shih, Yung-Wei Hsieh, Kai-Yi Wang
  • Publication number: 20140350844
    Abstract: A method for searching data and a method for planning itinerary are provided. At least one contact is selected from a contact list so as to set a point of interest (POI) list associated with the at least one contact as a specific data source. A POI category is decided. A preset search range is obtained based on a reference location so as to search the specific data source for obtaining a search result conformed to the POI category and the preset search range, and the search result is displayed.
    Type: Application
    Filed: May 22, 2014
    Publication date: November 27, 2014
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Kai-Yi Chen, Pin-Yu Chou, Hsiu-Hang Lin, Ching-Wen Sun, Yu-Tzu Hsu
  • Publication number: 20140351373
    Abstract: A method for uploading data to a social networking website and an electronic apparatus using the method are provided. The electronic apparatus automatically detects a detectable device located within a sensing range and finds a target to be tagged to set a preset tag. And the electronic apparatus uploads a geographic location, the preset tag and data to the social networking website.
    Type: Application
    Filed: May 21, 2014
    Publication date: November 27, 2014
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Chieh-Yu Chan, Ming-Che Weng, Kai-Yi Chen, Cheng-Yuan Wei, Jen-Shih Tsai, Yen-Lin Lin, Chia-Ni Chen
  • Patent number: 8877629
    Abstract: A semiconductor manufacturing process includes the following steps of providing a silicon substrate having at least one connection pad and a protection layer, forming a first seed layer having at least one first section and at least one second section, forming a first photoresist layer, forming a first buffer layer having a coupling portion and a cladding portion, removing the first photoresist layer, removing the second section of the first seed layer to form a first under bump metallurgy layer, forming a support layer on the protection layer and the first buffer layer, the first under bump metallurgy layer has a first ring wall, the first buffer layer has a second ring wall, wherein the first ring wall, the second ring wall and the cladding portion are cladded by the support layer, and forming a connection portion and covering the coupling portion with the connection portion.
    Type: Grant
    Filed: January 17, 2013
    Date of Patent: November 4, 2014
    Assignee: Chipbond Technology Corporation
    Inventors: Cheng-Hung Shih, Yung-Wei Hsieh, Kai-Yi Wang
  • Patent number: 8836659
    Abstract: An electronic apparatus with a touch input system is provided. When a complete touch signal is detected, a sliding angle and a sliding track of the complete touch signal are calculated. A menu operation interface with arc-shaped arrangement is displayed in a touch display screen when the sliding angle of the complete touch signal exceeds a predetermined angle. And when an incomplete touch signal is detected, a sliding angle and a sliding track of the incomplete touching signal are calculated for displaying a part of the menu operation interface with arc-shaped arrangement in the touch display screen.
    Type: Grant
    Filed: May 29, 2012
    Date of Patent: September 16, 2014
    Assignee: Compal Electronics, Inc.
    Inventors: Kai-Yi Chen, Yi-Chen Sung, Yu-Jen Huang, Chia-Chen Wang, Yen-Lin Lin, Hsiu-Hang Lin, Hui Lin, Chih-Yen Lan, Pei-Ching Hu, Yung-Yu Huang
  • Patent number: 8755665
    Abstract: An electromagnetic wave gathering device includes a pillared electromagnetic waveguide body and a reflective structure. The reflective structure is located at about an axis of the pillared electromagnetic waveguide body. The reflective structure comprises a plurality of bicone reflective units. Each of the reflective units has a first reflective surface. The electromagnetic wave gathering device may have a smaller volume and is handy for use.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: June 17, 2014
    Assignee: Epistar Corporation
    Inventors: Kai-Yi Hong, Wu-Tsung Lo, Shih-Chang Lee
  • Publication number: 20140159234
    Abstract: A semiconductor manufacturing process includes the following steps of providing a silicon substrate having at least one connection pad and a protection layer, forming a first seed layer having at least one first section and at least one second section, forming a first photoresist layer, forming a first buffer layer having a coupling portion and a cladding portion, removing the first photoresist layer, removing the second section of the first seed layer to form a first under bump metallurgy layer, forming a support layer on the protection layer and the first buffer layer, the first under bump metallurgy layer has a first ring wall, the first buffer layer has a second ring wall, wherein the first ring wall, the second ring wall and the cladding portion are cladded by the support layer, and forming a connection portion and covering the coupling portion with the connection portion.
    Type: Application
    Filed: January 17, 2013
    Publication date: June 12, 2014
    Applicant: CHIPBOND TECHNOLOGY CORPORATION
    Inventors: Cheng-Hung Shih, Yung-Wei Hsieh, Kai-Yi Wang
  • Publication number: 20130323941
    Abstract: Embodiments of magnetic connectors are disclosed. Embodiments show the use of magnetic connectors for power and/or signal bus coupling to electronic devices from support bases, stands, or cables. In some embodiments, spherical contacts, such as ball bearings, are pressed into firm contact with an electronic device by the use of conductive springs, which in turn electrically couple the spherical contacts to the bus lines. Contact arrangements are shown which allow rotation of the electronic device against an embodiment of magnetic connector. Arrangements of multiple magnets having differing polarities are shown when alignment of an electronic device in a particular orientation is required.
    Type: Application
    Filed: May 29, 2013
    Publication date: December 5, 2013
    Inventors: Zachary Joseph Zeliff, Yueh Hua Li, Kristopher Perpich, Yu Tzu Huang, Kai Yi Lu
  • Publication number: 20130321359
    Abstract: A pressure-sensitive stylus includes a tip operationally coupled to a pressure sensor, where the tip is constrained to depress longitudinally, and the tip is mechanically coupled to a first spring. The tip engages a second spring when depressed longitudinally by a force of a first magnitude.
    Type: Application
    Filed: June 4, 2013
    Publication date: December 5, 2013
    Inventors: Zachary Joseph Zeliff, Yueh-Hua Li, Kris Perpich, Yu-Tzu Huang, Kai-Yi Lu
  • Publication number: 20130265132
    Abstract: An on-chip transformer formed on an integrated-circuit substrate is disclosed. The on-chip transformer includes: a multi-winding structure comprising first, second and third windings which are spatially separated from each other; and a guard ring surrounding the multi-winding structure; wherein the first and second windings function as a first transformer, and the second and third windings function as a second transformer.
    Type: Application
    Filed: April 5, 2013
    Publication date: October 10, 2013
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Kai-Yi Huang, Yu-Hsin Chen
  • Publication number: 20130267185
    Abstract: A transceiver formed on an integrated-circuit substrate is disclosed. The transceiver includes: a co-transformer comprising first, second and third windings which wrap each other but are separated from each other; a power amplifier coupled to the co-transformer; and a low-noise amplifier coupled to the co-transformer; wherein the co-transformer is configured for converting a first signal from the power amplifier into a second signal to be transmitted by an antenna when the transceiver is in its transmitter mode, and for converting a third signal from the antenna into a fourth signal to be outputted to the low-noise amplifier when the transceiver is in its receiver mode.
    Type: Application
    Filed: April 5, 2013
    Publication date: October 10, 2013
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Yu-Hsin Chen, Kai-Yi Huang