Patents by Inventor Kai Yi

Kai Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180166476
    Abstract: A semiconductor device and a method for fabricating the same are provided. In the method for fabricating the semiconductor device, at first, a semiconductor substrate is provided. Then, a trench is formed in the semiconductor substrate. Thereafter, a dielectric layer is formed to cover the semiconductor substrate, in which the dielectric layer has a trench portion located in the trench of the semiconductor substrate. Then, a reflective material layer is formed on the trench portion of the dielectric layer. Thereafter, the reflective material layer is etched to form an isolation structure, in which the isolation structure includes a top portion located on the semiconductor substrate and a bottom portion located in a trench formed by the trench portion of the dielectric layer.
    Type: Application
    Filed: March 8, 2017
    Publication date: June 14, 2018
    Inventors: Kai-Yi Chen, Chih-Fei Lee, Fu-Cheng Chang, Ching-Hung Kao, Chia-Pin Cheng
  • Patent number: 9883590
    Abstract: Disclosed is a shielding structure for an integrated inductor/transformer, configured under the integrated inductor or the transformer and upon a substrate. The shielding structure includes conductive units, first connecting portions, via holes, a second connecting portion and a grounding portion. Each conductive unit includes a first conductive portion and second conductive portions extending from the first conductive portion. The number of the second conductive portions is odd. The length of each second conductive portion progressively diminishes from a center of the first conductive portion to both of two ends of the first conductive portion. The first connecting portion connects the first conductive portions of the conductive units through via holes. The grounding portion is connected to one of the first conductive portions. The second connecting portion connects all longest second conductive portions together.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: January 30, 2018
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Kai-Yi Huang, Hsiao-Tsung Yen, Tai-Sheng Chen
  • Patent number: 9853169
    Abstract: A stacked capacitor structure includes a MOS varactor and a stacked capacitor. The stacked capacitor is electrically connected to the MOS varactor. The MOS varactor includes a substrate, a gate, a first source/drain and a second source/drain. The substrate has a well, and the gate is positioned over the well. The first source/drain and the second source/drain are formed in the well and positioned at opposing sides of the gate. The stacked capacitor includes a plurality of metal layers. The metal layers are spaced from each other, stacked above the gate, and positioned below an inductive element.
    Type: Grant
    Filed: October 18, 2016
    Date of Patent: December 26, 2017
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Kai-Yi Huang, Sheng-Hung Lin, Yuh-Sheng Jean, Ta-Hsun Yeh
  • Patent number: 9824812
    Abstract: An integrated stacked transformer includes a primary winding, a secondary winding and a plurality of bridges, wherein the primary winding is formed by a first metal layer and includes a plurality of segments that are not electrically connected to each other; the secondary winding is form by a second metal layer and includes a plurality of segments that are not electrically connected to each other; the plurality of bridges are formed by a third metal layer. A portion of the bridges is connected to the segments of the primary winding respectively to make the segments of the primary winding form a primary inductor; and another portion of the bridges is connected to the segments of the secondary winding respectively to make the segments of the secondary winding form a secondary inductor.
    Type: Grant
    Filed: March 16, 2015
    Date of Patent: November 21, 2017
    Assignee: Realtek Semiconductor Corp.
    Inventors: Kai-Yi Huang, Hsiao-Tsung Yen, Yuh-Sheng Jean, Ta-Hsun Yeh
  • Patent number: 9729121
    Abstract: The present invention discloses an LC tank capable of reducing electromagnetic radiation by itself and the manufacturing method of the same. An embodiment of said LC tank comprises: a first tank area whose boundary is defined by a first part of an inductance; a second tank area whose boundary is defined by a second part of the inductance in which the second part includes a gap; a cross-interconnection structure operable to electrically connect the first and second parts of the inductance and distinguish the first tank area from the second tank area; and at least one capacitance formed inside at least one of the first and second tank areas, wherein the area ratio of the first tank area to the second tank area is between 20% and 80%.
    Type: Grant
    Filed: March 9, 2015
    Date of Patent: August 8, 2017
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chih-Yu Tsai, Kai-Yi Huang, Hsiao-Tsung Yen
  • Publication number: 20170221445
    Abstract: A driving method for a display device with a plurality of pixels, wherein each pixel includes a plurality of transistors connected in series, includes adjusting a first gate driving signal of a first transistor among the plurality of transistors to make the first transistor cut-off and generating compensation waveform on at least one second gate driving signal of at least one second transistor among the plurality of transistors within a compensation interval of a plurality of intervals between every two contiguous data updating periods among a plurality data updating periods; wherein the plurality of transistors of each pixel are conducted in a specific period within the plurality of data updating periods, to update a data voltage of each pixel.
    Type: Application
    Filed: January 23, 2017
    Publication date: August 3, 2017
    Inventors: Kai-Yi Wu, Chih-Hung Huang
  • Patent number: 9723053
    Abstract: A system is disclosed that generates page profiles for network pages based on aggregated usage data. The page profile for a given page may, for example, include information regarding specific page generation tasks (e.g., resource requests) that are frequently executed by browsers when the page is loaded. The page profiles may be used by browsers or an intermediary system to preemptively perform selected page generation tasks, thereby reducing perceived page load times.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: August 1, 2017
    Assignee: Amazon Technologies, Inc.
    Inventors: Sajeeva Lakmal Bandara Pallemulle, Amit Santosh Jain, Dhruva Lakshmana Rao Batni, Kai Yi Li
  • Patent number: 9685805
    Abstract: An assembled electronic apparatus and a control method thereof are provided. The assembled electronic apparatus includes a first body and a second body. A second processor shares a partial content of a sensing record generated by a sensing module through a second information sharing module. The first body and the second body are connected with each other through the first connector and the second connector. After being connected with each other, a message is transmitted by one of the first processor and the second processor to another one of the first processor and the second processor, so that a function is executed by the another one of the first processor and the second processor through the corresponding first processor or the corresponding second processor according to the message. The first processor shares a content of the sensing record generated by the sensing module through a first information sharing module.
    Type: Grant
    Filed: July 18, 2014
    Date of Patent: June 20, 2017
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Kai-Yi Chen, Hsiu-Hang LIn, Ching-Wen Sun, Pin-Yu Chou, Yu-Tzu Hsu, Chia-Ni Chen, Wei-Cheng Chuang, Ming-Feng Liu
  • Publication number: 20170169939
    Abstract: An inductor structure includes a first curve metal component, a second curve metal component, and a connection component. The first curve metal component is disposed on a layer. The layer is located at a first plane, the first curve metal component is located at a second plane, and the first plane is perpendicular to the second plane. The second curve metal component is disposed on the layer. The second curve metal component is located at the second plane. The connection component is coupled to the first curve metal component and the second curve metal component.
    Type: Application
    Filed: June 30, 2016
    Publication date: June 15, 2017
    Inventors: Hsiao-Tsung YEN, Chih-Yu TSAI, Kai-Yi HUANG
  • Publication number: 20170084230
    Abstract: A power supply module for a driving device of a display system includes a source power unit, for outputting a source high voltage only in a first period and outputting a source low voltage only in a second period according to a power control signal, wherein the source high voltage and the source low voltage are utilized for generating a plurality of data signals of a plurality of pixels in the display system; and a bias power unit, for generating a common voltage, wherein the common voltage is between the source high voltage and the source low voltage; wherein the first period does not overlap the second period.
    Type: Application
    Filed: July 10, 2016
    Publication date: March 23, 2017
    Inventors: Cheng-Chieh Lien, Kai-Yi Wu
  • Publication number: 20170076857
    Abstract: Disclosed is a shielding structure for an integrated inductor/transformer, configured under the integrated inductor or the transformer and upon a substrate. The shielding structure comprises conductive units, first connecting portions, via holes, a second connecting portion and a grounding portion. Each conductive unit comprises a first conductive portion and second conductive portions extending from the first conductive portion. The number of the second conductive portions is odd. The length of each second conductive portion progressively diminishes from a center of the first conductive portion to both of two ends of the first conductive portion. The first connecting portion connects the first conductive portions of the conductive units through via holes. The grounding portion is connected to one of the first conductive portions. The second connecting portion connects all longest second conductive portions together.
    Type: Application
    Filed: September 1, 2016
    Publication date: March 16, 2017
    Inventors: KAI-YI HUANG, HSIAO-TSUNG YEN, TAI-SHENG CHEN
  • Patent number: 9566748
    Abstract: A forming tube for forming and reinforcing a concrete column includes a tubular lining and a fiber-reinforced composite shell. The tubular lining is made from a first material, and has inner and outer tubular surfaces. The inner tubular surface has a plurality of ridge units displaced from one another in a direction of an axis. Each ridge unit has a plurality of ridges displaced from one another in a circumferential direction. The fiber-reinforced composite shell is made from a second material different from the first material, and is configured to enclose the outer tubular surface. The fiber-reinforced composite shell is formed by winding a prepreg filament on the outer tubular surface, followed by curing the prepreg filament.
    Type: Grant
    Filed: May 7, 2014
    Date of Patent: February 14, 2017
    Assignee: National Applied Research Laboratories
    Inventors: Chung-Che Chou, Chung-Sheng Lee, Hao-Hsiang Tan, Kai-Yi Wu
  • Publication number: 20160351166
    Abstract: The present invention provides a display parameter adjusting method and an electronic device employing the method. The electronic device includes a display, a light source and a light receiver. The display parameter adjusting method includes: emitting a light beam to the light receiver by the light source; calculating a turbidity of a location of the display according to a first light intensity of the light beam received by the light receiver, wherein a propagation direction of the light beam emitted by the light source is parallel to a displaying surface of the display, and the location is beneath a water surface; and adjusting the display parameter according to the turbidity.
    Type: Application
    Filed: June 1, 2016
    Publication date: December 1, 2016
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Kai-Yi Chen, Yu-Hao Wu, Chun-Yu Yang, Chia-Shin Weng
  • Patent number: 9473344
    Abstract: An integrated circuit is disclosed, including at least one configuration pin, an interface circuit, a detecting circuit, a determining circuit and a storage unit. A physical layer circuit of the invention not only increases the flexibility of setting PHY addresses, but also reduces the number of configuration pins.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: October 18, 2016
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Ming-Yuh Yeh, Chi-Shun Weng, Ming-Je Li, Kai-Yi Fang, Meng-Han Hsieh
  • Patent number: 9285394
    Abstract: A test apparatus includes a DUT block, at least one probe and at least one variable-length pusher. The DUT block is used for allowing the DUT to be disposed thereon. The probe is located on the DUT block. The variable-length pusher is located above the probe. The actuator is used for moving the variable-length pusher to push against the DUT to force the DUT to be in electrical contact with the probe.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: March 15, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Kai-Yi Tang
  • Patent number: 9269862
    Abstract: A light-emitting device includes: a Distributed Bragg reflector comprising alternate first semiconductor layers and second semiconductor layers, wherein each first semiconductor layer comprises a low-refractive-index part having a depth; and a light-emitting semiconductor stack associated with the Distributed Bragg reflector; wherein the depths of the low-refractive-index parts of the first semiconductor layers are gradually changed in a direction toward the light-emitting semiconductor stack.
    Type: Grant
    Filed: November 29, 2013
    Date of Patent: February 23, 2016
    Assignee: EPISTAR CORPORATION
    Inventors: Wu-Tsung Lo, Yu-Chih Yang, Chien-Ming Wu, Kai-Yi Hong
  • Publication number: 20160035671
    Abstract: This invention discloses an integrated inductor structure, including a first metal trace, a second metal trace, and a connecting metal trace. Tow terminals of the connecting metal trace are respectively connected to the first metal trace and the second metal trace through at least a connecting structure. The connected first metal trace, the connecting metal trace and the second metal trace together form an inductor structure. The connecting structure is connected to a connecting area of the first metal trace. The connecting area of the first metal trace has a first width. A smallest width of the first metal trace is a second width. The second width is smaller than the first width.
    Type: Application
    Filed: June 1, 2015
    Publication date: February 4, 2016
    Inventors: KAI-YI HUANG, HSIAO-TSUNG YEN
  • Publication number: 20160020166
    Abstract: A trace structure of fine-pitch pattern includes a connection portion, a first conductive wire portion and a second conductive wire portion, the first conductive wire portion comprises a first section and a second section connected to the first section, the first section connects to the connection portion, the second conductive wire portion comprises a third section and a fourth section connected to the third section, the third section connects to the connection portion, wherein an etching space closed on three sides is formed by the connection portion, the third section and the first section, a first spacing is defined between the third section and the first section, a second spacing is defined between the fourth section and the second section, wherein the first spacing is larger than the second spacing so as to make an metal layer within the etching space completely removed to avoid metal layer residues.
    Type: Application
    Filed: October 16, 2014
    Publication date: January 21, 2016
    Inventors: Yung-Wei Hsieh, Cheng-Hung Shih, Kai-Yi Wang, Heh-Chang Huang, Po-Hao Chen
  • Publication number: 20150381135
    Abstract: The present invention discloses an LC tank capable of reducing electromagnetic radiation by itself and the manufacturing method of the same. An embodiment of said LC tank comprises: a first tank area whose boundary is defined by a first part of an inductance; a second tank area whose boundary is defined by a second part of the inductance in which the second part includes a gap; a cross-interconnection structure operable to electrically connect the first and second parts of the inductance and distinguish the first tank area from the second tank area; and at least one capacitance formed inside at least one of the first and second tank areas, wherein the area ratio of the first tank area to the second tank area is between 20% and 80%.
    Type: Application
    Filed: March 9, 2015
    Publication date: December 31, 2015
    Inventors: CHIH-YU TSAI, KAI-YI HUANG, HSIAO-TSUNG YEN
  • Publication number: 20150364243
    Abstract: An electronic device includes a first planar inductor and a second planar inductor. The first planar inductor includes at least a first ring structure and a second ring structure interconnected electrically for generating a first magnetic field having a first direction and a second magnetic field having a second direction respectively, wherein the first direction is different from the second direction. The second planar inductor includes at least a third ring structure and a fourth ring structure interconnected electrically for generating a third magnetic field having a third direction and a fourth magnetic field having a fourth direction respectively, wherein the third direction is different from the fourth direction. The first ring structure at least partially overlaps the third ring structure to form a first overlap region, and the second ring structure at least partially overlaps the fourth ring structure to form a second overlap region.
    Type: Application
    Filed: May 27, 2015
    Publication date: December 17, 2015
    Inventors: Hsiao-Tsung Yen, Kai-Yi Huang, Yuh-Sheng Jean, Ta-Hsun Yeh