Abstract: This invention provides an integrated inductor structure including a substrate, a metal coil layer on the substrate and a dielectric layer between the substrate and the metal coil layer. A well shielding structure for reducing eddy current is disposed in the substrate under the metal coil layer. The well shielding structure is chequered with a plurality of N wells and a plurality of P wells. The N wells and P wells are arranged in a chessboard-like manner. A P+ pickup ring is provided in the substrate to encompass the well shielding structure. A guard ring is formed directly on the P+ pickup ring.

Abstract: An electronic apparatus with a touch input system is provided. When a complete touch signal is detected, a sliding angle and a sliding track of the complete touch signal are calculated. A menu operation interface with arc-shaped arrangement is displayed in a touch display screen when the sliding angle of the complete touch signal exceeds a predetermined angle. And when an incomplete touch signal is detected, a sliding angle and a sliding track of the incomplete touching signal are calculated for displaying a part of the menu operation interface with arc-shaped arrangement in the touch display screen.

Abstract: A control IC (integrated circuit) for color sequential liquid crystal displays (LCD) is revealed. The control IC includes an interface for receiving a command and at least one display data and a timing generator to generate a scan timing signal, a data timing signal, and a driving timing signal. According to the scan timing signal, a scan driving circuit generates a scan signal that is sent to the color sequential LCD. In accordance with the data timing signal, a data driving circuit receives the display data for generating a data signal sent to the color sequential LCD. According to the driving timing signal, a light-source driving circuit generates a plurality of driving signals sent to the color sequential LCD so as to generate a plurality of color backlights. In accordance with the scan signal, the data signal and the plurality of backlights, the color sequential LCD displays a frame.

Abstract: A variable inductor includes an inductor element and a first inductance adjusting circuit. The first inductance adjusting circuit includes a first open-loop structure and a first switch element. The first switch element is coupled to the first open-loop structure. When the first switch element is in a conducting state, the first open-loop structure and the first switch element forms a first closed-loop to induce a first magnetic flux which alters a magnetic flux from the inductor element in operation.

Abstract: A communication system includes encoding and decoding devices. The encoding device includes an encrypting module adapted for encrypting an original signal into an encrypted signal, and an error correction encoding module coupled to the encrypting module for receiving the encrypted signal therefrom, and generating an output signal by performing error correction encoding on the encrypted signal. The decoding device includes an error correction decoding module for receiving an input signal via a transmission channel, and a decrypting module. The input signal is a result of the output signal combined with noise. The error correction decoding module generates a recovery signal from the input signal by performing error correction decoding on the input signal. The decrypting module is coupled to the error correction decoding module for receiving the recovery signal therefrom, and generates a decrypted signal that corresponds to the original signal by decrypting a portion of the recovery signal.

Abstract: A method for generating a spread spectrum clock includes the steps of providing a reference clock having a reference period; generating a plurality of output clocks respectively having different phases according to the reference clock; generating a first/second control signal according to the reference clock and a spread spectrum clock and starting a first/second duration accordingly; during the first/second duration, outputting a first/second selecting signal representing a first/second predetermined sequence according to the first/second control signal, wherein the second predetermined sequence is a substantial reversed sequence of the first predetermined sequence; and during the first/second duration, sequentially outputting some or all of the output clocks as the spread spectrum clock according to the first/second predetermined sequence.

Abstract: An electromagnetic wave gathering device includes a pillared electromagnetic waveguide body and a reflective structure. The reflective structure is located at about an axis of the pillared electromagnetic waveguide body. The reflective structure comprises a plurality of bicone reflective units. Each of the reflective units has a first reflective surface. The electromagnetic wave gathering device may have a smaller volume and is handy for use.

Abstract: The structure of the MOS transistor provided in this invention has LDD (lightly doped drain) and halo doped regions removed from the source, the drain or both regions in the substrate for improved linearity range when operated as a voltage-controlled resistor. The removal of the LDD and halo doped regions is performed by simply modifying the standard mask of the MOS process using a logic operation layer with no extra mask required.

Abstract: A stacked structure of a spiral inductor includes a first metal layer, a second metal layer, a first set of vias, and a second set of vias. The first metal layer includes a first segment, a second segment, and a third segment, wherein the layout direction of the third segment is different from the layout direction of the first and second segments. The second metal layer includes a fourth segment, a fifth segment, and a sixth segment connected to the fifth segment, wherein the layout direction of the sixth segment is different from the layout direction of the fourth and fifth segments. The first set of vias connects the first and fourth segments, and they construct a first shunt winding. The second set of vias connects the second and fifth segments, and they construct a second shunt winding. The third and sixth segments construct a crossover region.

Abstract: A stacked structure of a spiral inductor includes a first metal layer, a second metal layer, a first set of vias, and a second set of vias. The first metal layer includes a first segment, a second segment, and a third segment, wherein the layout direction of the third segment is different from the layout direction of the first and second segments. The second metal layer includes a fourth segment, a fifth segment, and a sixth segment connected to the fifth segment, wherein the layout direction of the sixth segment is different from the layout direction of the fourth and fifth segments. The first set of vias connects the first and fourth segments, and they construct a first shunt winding. The second set of vias connects the second and fifth segments, and they construct a second shunt winding. The third and sixth segments construct a crossover region.

Abstract: A communication system includes encoding and decoding devices. The encoding device includes an encrypting module adapted for encrypting an original signal into an encrypted signal, and an error correction encoding module coupled to the encrypting module for receiving the encrypted signal therefrom, and generating an output signal by performing error correction encoding on the encrypted signal. The decoding device includes an error correction decoding module for receiving an input signal via a transmission channel, and a decrypting module. The input signal is a result of the output signal combined with noise. The error correction decoding module generates a recovery signal from the input signal by performing error correction decoding on the input signal. The decrypting module is coupled to the error correction decoding module for receiving the recovery signal therefrom, and generates a decrypted signal that corresponds to the original signal by decrypting a portion of the recovery signal.

Abstract: A control IC (integrated circuit) for color sequential liquid crystal displays (LCD) is revealed. The control IC includes an interface for receiving a command and at least one display data and a timing generator to generate a scan timing signal, a data timing signal, and a driving timing signal. According to the scan timing signal, a scan driving circuit generates a scan signal that is sent to the color sequential LCD. In accordance with the data timing signal, a data driving circuit receives the display data for generating a data signal sent to the color sequential LCD. According to the driving timing signal, a light-source driving circuit generates a plurality of driving signals sent to the color sequential LCD so as to generate a plurality of color backlights. In accordance with the scan signal, the data signal and the plurality of backlights, the color sequential LCD displays a frame.

Abstract: An adjustment circuit for color sequential liquid crystal displays and an adjustment method thereof applied to a color sequential liquid crystal display are disclosed. The color sequential liquid crystal display receives a plurality of driving signals from a light-source driving circuit to generate a plurality of primary color backlights and at least one adjusted-color backlight and also receives one display driving signal. The adjusted-color backlight is generated behind one of three primary color backlights. By means of the adjusted-color backlight, the color and brightness of the frame are adjusted.

Abstract: A temperature indicating device includes a temperature sensing element, for sensing the temperature of an object and transforming the temperature into a signal; an illuminating unit, for emitting light of predetermined colors; a control unit, for receiving the signal from the temperature sensing element, and driving the illuminating unit to emit light of a predetermined color corresponding to the sensed temperature according to the signal; a power supply, for supplying power to the temperature sensing element, the control unit, and the illuminating unit; and a body, wherein the temperature sensing element, the illuminating unit, the control unit, and the power supply are located inside the body.

Abstract: A method for generating a spread spectrum clock includes the steps of providing a reference clock having a reference period; generating a plurality of output clocks respectively having different phases according to the reference clock; generating a first/second control signal according to the reference clock and a spread spectrum clock and starting a first/second duration accordingly; during the first/second duration, outputting a first/second selecting signal representing a first/second predetermined sequence according to the first/second control signal, wherein the second predetermined sequence is a substantial reversed sequence of the first predetermined sequence; and during the first/second duration, sequentially outputting some or all of the output clocks as the spread spectrum clock according to the first/second predetermined sequence.

Abstract: An integrated circuit is disclosed, including at least one configuration pin, an interface circuit, a detecting circuit, a determining circuit and a storage unit. A physical layer circuit of the invention not only increases the flexibility of setting PHY addresses, but also reduces the number of configuration pins.

Abstract: This invention provides an integrated inductor structure including a substrate, a metal coil layer on the substrate and a dielectric layer between the substrate and the metal coil layer. A well shielding structure for reducing eddy current is disposed in the substrate under the metal coil layer. The well shielding structure is chequered with a plurality of N wells and a plurality of P wells. The N wells and P wells are arranged in a chessboard-like manner. A P+ pickup ring is provided in the substrate to encompass the well shielding structure. A guard ring is formed directly on the P+ pickup ring.

Abstract: An interdigitized capacitor comprising first and second electrodes. The first electrode comprises two combs symmetrical to a first mirror plane. The fingers of the combs extend toward the first mirror plane. The second electrode comprises two combs and a linear plate. The combs are symmetrical to a second mirror plane and the fingers thereof extend toward the second mirror plane. The linear plate is located at the second mirror plane and connected to one finger of the combs of the second electrode. The first and second mirror planes are orthogonal. The fingers of the combs of the first and second electrodes are interdigitized.

Abstract: The structure of the MOS transistor provided in this invention has LDD (lightly doped drain) and halo doped regions removed from the source, the drain or both regions in the substrate for improved linearity range when operated as a voltage-controlled resistor. The removal of the LDD and halo doped regions is performed by simply modifying the standard mask of the MOS process using a logic operation layer with no extra mask required.

Abstract: The invention, firstly, SnCl4 and SbCl3 are collected as raw materials and all dissolved into water and hydrochloric acid with precipitation. Secondly, NaOH or NH40H can be used for adjusting the pH value. Then, aging, water-washing, filtering and drying process are all carried out. The additive also can be put into and sintering process is applied. Furthermore, washing and drying process are used for obtaining the crystalline nano-level acicular ATO composition powder.