Patents by Inventor Kang Yong Kim

Kang Yong Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatuses and methods including memory commands for semiconductor memories
    Patent number: 11262941
    Abstract: Apparatuses and methods including memory commands for semiconductor memories are described. An example method includes receiving a data clock signal responsive to receiving a timing command, performing an access operation responsive to receiving an access command associated with the timing command, providing an access data clock signal based on the data clock signal, and providing an access data clock signal based on the data clock signal. The access command may be separated in time from the associated timing command by at least one clock cycle of a system clock signal. In some examples, the access command may precede the associated timing command or may follow the associated timing command. In some examples, the access command may immediately follow or precede the associated timing command.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: March 1, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Kang-Yong Kim, Hyun Yoo Lee, John D. Porter
  • Apparatuses and methods for setting a duty cycle adjuster for improving clock duty cycle
    Patent number: 11250893
    Abstract: Apparatuses and methods for setting a duty cycler adjuster for improving clock duty cycle are disclosed. The duty cycle adjuster may be adjusted by different amounts, at least one smaller than another. Determining when to use the smaller adjustment may be based on duty cycle results. A duty cycle monitor may have an offset. A duty cycle code for the duty cycle adjuster may be set to an intermediate value of a duty cycle monitor offset. The duty cycle monitor offset may be determined by identifying duty cycle codes for an upper and for a lower boundary of the duty cycle monitor offset.
    Type: Grant
    Filed: October 15, 2020
    Date of Patent: February 15, 2022
    Assignee: Micron Technology, Inc.
    Inventor: Kang-Yong Kim
  • TRANSACTION MANAGEMENT USING METADATA
    Publication number: 20220035568
    Abstract: Methods, systems, and devices for transaction management using metadata are described. In some examples, a memory device may include a volatile memory, and a non-volatile memory, which may have different access latencies. The memory device may receive from a host device a read command for data located at an address of the non-volatile memory. In response to the read command, the memory device and may determine whether the data is stored in the volatile memory. The memory device may then transmit, to the host device data and according to an expected latency, a set of data and an indication of whether the set of data was previously requested by the host device or unrequested by the host device. In some examples, the memory device may also transmit an identifier associated with the read command and a hash of the address.
    Type: Application
    Filed: July 30, 2021
    Publication date: February 3, 2022
    Inventors: Chinnakrishnan Ballapuram, Kang-Yong Kim, Saira Samar Malik, Taeksang Song
  • APPARATUSES AND METHODS FOR SETTING A DUTY CYCLE ADJUSTER FOR IMPROVING CLOCK DUTY CYCLE
    Publication number: 20220028438
    Abstract: Apparatuses and methods for setting a duty cycler adjuster for improving clock duty cycle are disclosed. The duty cycle adjuster may be adjusted by different amounts, at least one smaller than another. Determining when to use the smaller adjustment may be based on duty cycle results. A duty cycle monitor may have an offset. A duty cycle code for the duty cycle adjuster may be set to an intermediate value of a duty cycle monitor offset. The duty cycle monitor offset may be determined by identifying duty cycle codes for an upper and for a lower boundary of the duty cycle monitor offset.
    Type: Application
    Filed: October 6, 2021
    Publication date: January 27, 2022
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Kang-Yong Kim
  • MEMORY WEAR MANAGEMENT
    Publication number: 20220011944
    Abstract: Methods, systems, and devices for memory wear management are described. A device may include an interface controller and a non-volatile memory. The interface controller may manage wear-leveling procedures for memory banks in the non-volatile memory. For example, the interface controller may select a row in a memory bank for the wear-leveling procedure. The interface controller may store data from the row in a buffer in the interface controller. The interface controller may then transfer the data to the non-volatile memory so that the non-volatile memory can write the data to a second row of the memory bank.
    Type: Application
    Filed: June 16, 2021
    Publication date: January 13, 2022
    Inventors: Saira Samar Malik, Hyunyoo Lee, Chinnakrishnan Ballapuram, Taeksang Song, Kang-Yong Kim
  • DIE VOLTAGE REGULATION
    Publication number: 20210407572
    Abstract: Methods, systems, and devices for die voltage regulation are described. A device may include a first die and second die. A component that generates voltage on the first die may be connected to a capacitor on the second die through a conductive line. The conductive line may allow the capacitor on the second die to regulate voltage generated by the component on the first die.
    Type: Application
    Filed: June 3, 2021
    Publication date: December 30, 2021
    Inventors: Taeksang Song, Saira S. Malik, Hyunyoo Lee, Kang-Yong Kim
  • DIRECT TESTING OF IN-PACKAGE MEMORY
    Publication number: 20210398601
    Abstract: Methods, systems, and devices for direct testing of in-package memory are described. A memory subsystem package may include non-volatile memory, volatile memory that may be configured as a cache, and a controller. The memory subsystem may support direct access to the non-volatile memory for testing the non-volatile memory in the package using a host interface of the memory subsystem rather than using dedicated contacts on the package. To ensure deterministic behavior during testing operations, the memory subsystem may, when operating with a test mode enabled, forward commands received from a host device (such as automated test equipment) to a memory interface of the non-volatile memory and bypass the cache-related circuitry. The memory subsystem may include a separate conductive path that bypasses the cache for forwarding commands and addresses to the memory interface during testing.
    Type: Application
    Filed: June 16, 2021
    Publication date: December 23, 2021
    Inventors: Taeksang Song, Hyunyoo Lee, Saira Samar Malik, Kang-Yong Kim
  • Apparatuses and methods for setting a duty cycle adjuster for improving clock duty cycle
    Patent number: 11200931
    Abstract: Apparatuses and methods for setting a duty cycler adjuster for improving clock duty cycle are disclosed. The duty cycle adjuster may be adjusted by different amounts, at least one smaller than another. Determining when to use the smaller adjustment may be based on duty cycle results. A duty cycle monitor may have an offset. A duty cycle code for the duty cycle adjuster may be set to an intermediate value of a duty cycle monitor offset. The duty cycle monitor offset may be determined by identifying duty cycle codes for an upper and for a lower boundary of the duty cycle monitor offset.
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: December 14, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Kang-Yong Kim
  • Apparatuses and methods for setting a duty cycle adjuster for improving clock duty cycle
    Patent number: 11145341
    Abstract: Apparatuses and methods for setting a duty cycler adjuster for improving clock duty cycle are disclosed. The duty cycle adjuster may be adjusted by different amounts, at least one smaller than another. Determining when to use the smaller adjustment may be based on duty cycle results. A duty cycle monitor may have an offset. A duty cycle code for the duty cycle adjuster may be set to an intermediate value of a duty cycle monitor offset. The duty cycle monitor offset may be determined by identifying duty cycle codes for an upper and for a lower boundary of the duty cycle monitor offset.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: October 12, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Kang-Yong Kim
  • Apparatuses and methods for setting a duty cycle adjuster for improving clock duty cycle
    Patent number: 11100967
    Abstract: Apparatuses and methods for setting a duty cycler adjuster for improving clock duty cycle are disclosed. The duty cycle adjuster may be adjusted by different amounts, at least one smaller than another. Determining when to use the smaller adjustment may be based on duty cycle results. A duty cycle monitor may have an offset. A duty cycle code for the duty cycle adjuster may be set to an intermediate value of a duty cycle monitor offset. The duty cycle monitor offset may be determined by identifying duty cycle codes for an upper and for a lower boundary of the duty cycle monitor offset.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: August 24, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Kang-Yong Kim
  • APPARATUSES AND METHODS INCLUDING MEMORY COMMANDS FOR SEMICONDUCTOR MEMORIES
    Publication number: 20210232514
    Abstract: Apparatuses and methods including memory commands for semiconductor memories are described. A controller provides a memory system with memory commands to access memory. The commands are decoded to provide internal signals and commands for performing operations, such as operations to access the memory array. The memory commands provided for accessing memory may include timing command and access commands. Examples of access commands include a read command and a write command. Timing commands may be used to control the timing of various operations, for example, for a corresponding access command. The timing commands may include opcodes that set various modes of operation during an associated access operation for an access command.
    Type: Application
    Filed: February 4, 2021
    Publication date: July 29, 2021
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Kang-Yong Kim, Dean Gans
  • APPARATUSES AND METHODS FOR SETTING A DUTY CYCLE ADJUSTER FOR IMPROVING CLOCK DUTY CYCLE
    Publication number: 20210201971
    Abstract: Apparatuses and methods for setting a duty cycler adjuster for improving clock duty cycle are disclosed. The duty cycle adjuster may be adjusted by different amounts, at least one smaller than another. Determining when to use the smaller adjustment may be based on duty cycle results. A duty cycle monitor may have an offset. A duty cycle code for the duty cycle adjuster may be set to an intermediate value of a duty cycle monitor offset. The duty cycle monitor offset may be determined by identifying duty cycle codes for an upper and for a lower boundary of the duty cycle monitor offset.
    Type: Application
    Filed: March 16, 2021
    Publication date: July 1, 2021
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Kang-Yong Kim
  • Apparatuses And Methods For Setting A Duty Cycle Adjuster For Improving Clock Duty Cycle
    Publication number: 20210151088
    Abstract: Apparatuses and methods for setting a duty cycler adjuster for improving clock duty cycle are disclosed. The duty cycle adjuster may be adjusted by different amounts, at least one smaller than another. Determining when to use the smaller adjustment may be based on duty cycle results. A duty cycle monitor may have an offset. A duty cycle code for the duty cycle adjuster may be set to an intermediate value of a duty cycle monitor offset. The duty cycle monitor offset may be determined by identifying duty cycle codes for an upper and for a lower boundary of the duty cycle monitor offset.
    Type: Application
    Filed: January 22, 2021
    Publication date: May 20, 2021
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Kang-Yong Kim
  • Apparatuses and methods for determining a phase relationship between an input clock signal and a multiphase clock signal
    Patent number: 10984844
    Abstract: Apparatuses and methods for determining a phase relationship between an input clock signal and a multiphase clock signal are disclosed. An example apparatus includes a clock path configured to receive a clock signal and provide internal clock signals and a command path configured to receive a command and propagate the command through the command path responsive to the internal clock signals and provide an internal command having a timing that reflects a timing of the clock signal. The example apparatus further includes a data clock path configured to receive a data clock signal and provide multiphase clock signals based on the data clock signal and provide a delayed multiphase clock signal, and further includes a clock synchronization circuit configured to receive the delayed multiphase clock signal and latch a logic level of the delayed multiphase clock signal responsive to the internal command.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: April 20, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Hyun Yoo Lee, Kang-Yong Kim
  • Apparatuses and methods for setting a duty cycle adjuster for improving clock duty cycle
    Patent number: 10957367
    Abstract: Apparatuses and methods for setting a duty cycler adjuster for improving clock duty cycle are disclosed. The duty cycle adjuster may be adjusted by different amounts, at least one smaller than another. Determining when to use the smaller adjustment may be based on duty cycle results. A duty cycle monitor may have an offset. A duty cycle code for the duty cycle adjuster may be set to an intermediate value of a duty cycle monitor offset. The duty cycle monitor offset may be determined by identifying duty cycle codes for an upper and for a lower boundary of the duty cycle monitor offset.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: March 23, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Kang-Yong Kim
  • Apparatuses and methods including memory commands for semiconductor memories
    Patent number: 10915474
    Abstract: Apparatuses and methods including memory commands for semiconductor memories are described. A controller provides a memory system with memory commands to access memory. The commands are decoded to provide internal signals and commands for performing operations, such as operations to access the memory array. The memory commands provided for accessing memory may include timing command and access commands. Examples of access commands include a read command and a write command. Timing commands may be used to control the timing of various operations, for example, for a corresponding access command. The timing commands may include opcodes that set various modes of operation during an associated access operation for an access command.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: February 9, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Kang-Yong Kim, Dean Gans
  • APPARATUSES AND METHODS FOR SETTING A DUTY CYCLE ADJUSTER FOR IMPROVING CLOCK DUTY CYCLE
    Publication number: 20210027819
    Abstract: Apparatuses and methods for setting a duty cycler adjuster for improving clock duty cycle are disclosed. The duty cycle adjuster may be adjusted by different amounts, at least one smaller than another. Determining when to use the smaller adjustment may be based on duty cycle results. A duty cycle monitor may have an offset. A duty cycle code for the duty cycle adjuster may be set to an intermediate value of a duty cycle monitor offset. The duty cycle monitor offset may be determined by identifying duty cycle codes for an upper and for a lower boundary of the duty cycle monitor offset.
    Type: Application
    Filed: October 15, 2020
    Publication date: January 28, 2021
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Kang-Yong Kim
  • Apparatuses and methods for setting a duty cycle adjuster for improving clock duty cycle
    Patent number: 10902897
    Abstract: Apparatuses and methods for setting a duty cycler adjuster for improving clock duty cycle are disclosed. The duty cycle adjuster may be adjusted by different amounts, at least one smaller than another. Determining when to use the smaller adjustment may be based on duty cycle results. A duty cycle monitor may have an offset. A duty cycle code for the duty cycle adjuster may be set to an intermediate value of a duty cycle monitor offset. The duty cycle monitor offset may be determined by identifying duty cycle codes for an upper and for a lower boundary of the duty cycle monitor offset.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: January 26, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Kang-Yong Kim
  • APPARATUSES AND METHODS INCLUDING MEMORY COMMANDS FOR SEMICONDUCTOR MEMORIES
    Publication number: 20210011868
    Abstract: Apparatuses and methods including memory commands for semiconductor memories are described. A controller provides a memory system with memory commands to access memory. The commands are decoded to provide internal signals and commands for performing operations, such as operations to access the memory array. The memory commands provided for accessing memory may include timing command and access commands. Examples of access commands include a read command and a write command. Timing commands may be used to control the timing of various operations, for example, for a corresponding access command. The timing commands may include opcodes that set various modes of operation during an associated access operation for an access command.
    Type: Application
    Filed: September 25, 2020
    Publication date: January 14, 2021
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Kang-Yong Kim, Dean Gans
  • Apparatuses And Methods For Setting A Duty Cycle Adjuster For Improving Clock Duty Cycle
    Publication number: 20200381029
    Abstract: Apparatuses and methods for setting a duty cycler adjuster for improving clock duty cycle are disclosed. The duty cycle adjuster may be adjusted by different amounts, at least one smaller than another. Determining when to use the smaller adjustment may be based on duty cycle results. A duty cycle monitor may have an offset. A duty cycle code for the duty cycle adjuster may be set to an intermediate value of a duty cycle monitor offset. The duty cycle monitor offset may be determined by identifying duty cycle codes for an upper and for a lower boundary of the duty cycle monitor offset.
    Type: Application
    Filed: August 17, 2020
    Publication date: December 3, 2020
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Kang Yong Kim