Patents by Inventor Kang Yong Kim

Kang Yong Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • APPARATUSES AND METHODS FOR SETTING A DUTY CYCLE ADJUSTER FOR IMPROVING CLOCK DUTY CYCLE
    Publication number: 20190371376
    Abstract: Apparatuses and methods for setting a duty cycler adjuster for improving clock duty cycle are disclosed. The duty cycle adjuster may be adjusted by different amounts, at least one smaller than another. Determining when to use the smaller adjustment may be based on duty cycle results. A duty cycle monitor may have an offset. A duty cycle code for the duty cycle adjuster may be set to an intermediate value of a duty cycle monitor offset. The duty cycle monitor offset may be determined by identifying duty cycle codes for an upper and for a lower boundary of the duty cycle monitor offset.
    Type: Application
    Filed: October 22, 2018
    Publication date: December 5, 2019
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Kang-Yong Kim
  • APPARATUSES AND METHODS FOR SETTING A DUTY CYCLE ADJUSTER FOR IMPROVING CLOCK DUTY CYCLE
    Publication number: 20190371378
    Abstract: Apparatuses and methods for setting a duty cycler adjuster for improving clock duty cycle are disclosed. The duty cycle adjuster may be adjusted by different amounts, at least one smaller than another. Determining when to use the smaller adjustment may be based on duty cycle results. A duty cycle monitor may have an offset. A duty cycle code for the duty cycle adjuster may be set to an intermediate value of a duty cycle monitor offset. The duty cycle monitor offset may be determined by identifying duty cycle codes for an upper and for a lower boundary of the duty cycle monitor offset.
    Type: Application
    Filed: October 22, 2018
    Publication date: December 5, 2019
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Kang-Yong Kim
  • APPARATUSES AND METHODS FOR SETTING A DUTY CYCLE ADJUSTER FOR IMPROVING CLOCK DUTY CYCLE
    Publication number: 20190371377
    Abstract: Apparatuses and methods for setting a duty cycler adjuster for improving clock duty cycle are disclosed. The duty cycle adjuster may be adjusted by different amounts, at least one smaller than another. Determining when to use the smaller adjustment may be based on duty cycle results. A duty cycle monitor may have an offset. A duty cycle code for the duty cycle adjuster may be set to an intermediate value of a duty cycle monitor offset. The duty cycle monitor offset may be determined by identifying duty cycle codes for an upper and for a lower boundary of the duty cycle monitor offset.
    Type: Application
    Filed: October 22, 2018
    Publication date: December 5, 2019
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: KANG-YONG KIM
  • Apparatuses and methods including memory commands for semiconductor memories
    Patent number: 10467158
    Abstract: Apparatuses and methods including memory commands for semiconductor memories are described. A controller provides a memory system with memory commands to access memory. The commands are decoded to provide internal signals and commands for performing operations, such as operations to access the memory array. The memory commands provided for accessing memory may include timing command and access commands. Examples of access commands include a read command and a write command. Timing commands may be used to control the timing of various operations, for example, for a corresponding access command. The timing commands may include opcodes that set various modes of operation during an associated access operation for an access command.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: November 5, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Kang-Yong Kim, Dean Gans
  • Apparatuses and methods for configurable command and data input circuits forsemiconductor memories
    Patent number: 10446218
    Abstract: Apparatuses and methods for configurable command and data input circuits for semiconductor memories are described. Example apparatuses include input signal blocks, clock blocking circuits, data input blocks, driver circuits, and data receiver circuits.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: October 15, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Hyun Yoo Lee, Kang-Yong Kim, John D. Porter
  • APPARATUSES AND METHODS FOR DETERMINING A PHASE RELATIONSHIP BETWEEN AN INPUT CLOCK SIGNAL AND A MULTIPHASE CLOCK SIGNAL
    Publication number: 20190311753
    Abstract: Apparatuses and methods for determining a phase relationship between an input clock signal and a multiphase clock signal are disclosed. An example apparatus includes a clock path configured to receive a clock signal and provide internal clock signals and a command path configured to receive a command and propagate the command through the command path responsive to the internal clock signals and provide an internal command having a timing that reflects a timing of the clock signal. The example apparatus further includes a data clock path configured to receive a data clock signal and provide multiphase clock signals based on the data clock signal and provide a delayed multiphase clock signal, and further includes a clock synchronization circuit configured to receive the delayed multiphase clock signal and latch a logic level of the delayed multiphase clock signal responsive to the internal command.
    Type: Application
    Filed: June 25, 2019
    Publication date: October 10, 2019
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Hyun Yoo Lee, Kang-Yong Kim
  • Apparatuses and methods including memory commands for semiconductor memories
    Patent number: 10437514
    Abstract: Apparatuses and methods including memory commands for semiconductor memories are described. An example method includes receiving a data clock signal responsive to receiving a timing command, performing an access operation responsive to receiving an access command associated with the timing command, providing an access data clock signal based on the data clock signal, and providing an access data clock signal based on the data clock signal. The access command may be separated in time from the associated timing command by at least one clock cycle of a system clock signal. In some examples, the access command may precede the associated timing command or may follow the associated timing command. In some examples, the access command may immediately follow or precede the associated timing command.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: October 8, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Kang-Yong Kim, Hyun Yoo Lee, John D. Porter
  • APPARATUSES AND METHODS INCLUDING MEMORY COMMANDS FOR SEMICONDUCTOR MEMORIES
    Publication number: 20190265913
    Abstract: Apparatuses and methods including memory commands for semiconductor memories are described. An example method includes receiving a data clock signal responsive to receiving a timing command, performing, an access operation responsive to receiving an access command associated with the timing command, providing an access data clock signal based on the data clock signal, and providing an access data clock signal based on the data clock signal. The access command may be separated in time from the associated timing command by at least one clock cycle of a system clock signal. In some examples, the access command may precede the associated timing command or may follow the associated timing command. In some examples, the access command may immediately follow or precede the associated timing command.
    Type: Application
    Filed: May 15, 2019
    Publication date: August 29, 2019
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Kang-Yong Kim, Hyun Yoo Lee, John D. Porter
  • APPARATUSES AND METHODS FOR DUTY CYCLE DISTORTION CORRECTION OF CLOCKS
    Publication number: 20190267056
    Abstract: Apparatuses and methods for duty cycle distortion correction of clocks are disclosed. An example apparatus includes a clock circuit configured to receive complementary input clocks and a control signal and to provide multiphase clocks responsive to complementary input clocks. The clock circuit is further configured to be in a first mode or second mode controlled by the control signal and configured to provide the multiphase clocks having greater duty cycle distortion in a first mode than in a second mode.
    Type: Application
    Filed: February 13, 2019
    Publication date: August 29, 2019
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Hyun Yoo Lee, Kang-Yong Kim, John D. Porter
  • Apparatuses and methods for duty cycle error correction of clock signals
    Patent number: 10395704
    Abstract: Apparatuses and methods for duty cycle error correction of clock signals are disclosed. An example method includes detecting a clock period error between a first clock signal and a third clock signal and adjusting a timing of the first or third clock signals based on the clock period error therebetween. The method further includes detecting a clock period error between a second clock signal and a fourth clock signal and adjusting a timing of the second or fourth clock signals based on the clock period error therebetween. Additionally, the example method includes detecting a duty cycle error between the first, second, third, and fourth clock signals, and adjusting a timing of the first and third or second and fourth clock signals based on the duty cycle error therebetween.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: August 27, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Hyun Yoo Lee, Kang-Yong Kim
  • Apparatuses and methods for duty cycle distortion correction of clocks
    Patent number: 10373660
    Abstract: Apparatuses and methods for duty cycle distortion correction of clocks are disclosed. An example apparatus includes a clock circuit configured to receive complementary input clocks and a control signal and to provide multiphase clocks responsive to complementary input clocks. The clock circuit is further configured to be in a first mode or second mode controlled by the control signal and configured to provide the multiphase clocks having greater duty cycle distortion in a first mode than in a second mode.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: August 6, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Hyun Yoo Lee, Kang-Yong Kim, John D. Porter
  • APPARATUSES AND METHODS FOR DUTY CYCLE ERROR CORRECTION OF CLOCK SIGNALS
    Publication number: 20190198075
    Abstract: Apparatuses and methods for duty cycle error correction of clock signals are disclosed. An example method includes detecting a clock period error between a first clock signal and a third clock signal and adjusting a timing of the first or third clock signals based on the clock period error therebetween. The method further includes detecting a clock period error between a second clock signal and a fourth clock signal and adjusting a timing of the second or fourth clock signals based on the clock period error therebetween. Additionally, the example method includes detecting a duty cycle error between the first, second, third, and fourth clock signals, and adjusting a timing of the first and third or second and fourth clock signals based on the duty cycle error therebetween.
    Type: Application
    Filed: December 22, 2017
    Publication date: June 27, 2019
    Applicant: Micron Technology, Inc.
    Inventors: Hyun Yoo Lee, Kang-Yong Kim
  • APPARATUSES AND METHODS FOR CONFIGURABLE COMMAND AND DATA INPUT CIRCUITS FOR SEMICONDUCTOR MEMORIES
    Publication number: 20190172519
    Abstract: Apparatuses and methods for configurable command and data input circuits for semiconductor memories are described. Example apparatuses include input signal blocks, clock blocking circuits, data input blocks, driver circuits, and data receiver circuits.
    Type: Application
    Filed: February 12, 2019
    Publication date: June 6, 2019
    Inventors: Hyun Yoo Lee, Kang-Yong Kim, John D. Porter
  • APPARATUSES AND METHODS INCLUDING MEMORY COMMANDS FOR SEMICONDUCTOR MEMORIES
    Publication number: 20190163652
    Abstract: Apparatuses and methods including memory commands for semiconductor memories are described. A controller provides a memory system with memory commands to access memory. The commands are decoded to provide internal signals and commands for performing operations, such as operations to access the memory array. The memory commands provided for accessing memory may include timing command and access commands. Examples of access commands include a read command and a write command. Timing commands may be used to control the timing of various operations, for example, for a corresponding access command. The timing commands may include opcodes that set various modes of operation during an associated access operation for an access command.
    Type: Application
    Filed: July 13, 2018
    Publication date: May 30, 2019
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Kang-Yong Kim, Dean Gans
  • APPARATUSES AND METHODS INCLUDING MEMORY COMMANDS FOR SEMICONDUCTOR MEMORIES
    Publication number: 20190163653
    Abstract: Apparatuses and methods including memory commands for semiconductor memories are described. A controller provides a memory system with memory commands to access memory. The commands are decoded to provide internal signals and commands for performing operations, such as operations to access the memory array. The memory commands provided for accessing memory may include timing command and access commands. Examples of access commands include a read command and a write command. Timing commands may be used to control the timing of various operations, for example, for a corresponding access command. The timing commands may include opcodes that set various modes of operation during an associated access operation for an access command.
    Type: Application
    Filed: July 13, 2018
    Publication date: May 30, 2019
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Kang-Yong Kim, Dean Gans
  • APPARATUSES AND METHODS INCLUDING MEMORY COMMANDS FOR SEMICONDUCTOR MEMORIES
    Publication number: 20190102109
    Abstract: Apparatuses and methods including memory commands for semiconductor memories are described. An example method includes receiving a data clock signal responsive to receiving a timing command, performing an access operation responsive to receiving an access command associated with the timing command, providing an access data clock signal based on the data clock signal, and providing an access data clock signal based on the data clock signal. The access command may be separated in time from the associated timing command by at least one clock cycle of a system clock signal. In some examples, the access command may precede the associated timing command or may follow the associated timing command. In some examples, the access command may immediately follow or precede the associated timing command.
    Type: Application
    Filed: October 2, 2017
    Publication date: April 4, 2019
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Kang-Yong Kim, Hyun Yoo Lee, John D. Porter
  • Apparatuses and methods for duty cycle distortion correction of clocks
    Patent number: 10249354
    Abstract: Apparatuses and methods for duty cycle distortion correction of clocks are disclosed. An example apparatus includes a clock circuit configured to receive complementary input clocks and a control signal and to provide multiphase clocks responsive to complementary input clocks. The clock circuit is further configured to be in a first mode or second mode controlled by the control signal and configured to provide the multiphase clocks having greater duty cycle distortion in a first mode than in a second mode.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: April 2, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Hyun Yoo Lee, Kang-Yong Kim, John D. Porter
  • Apparatuses and methods for configurable command and data input circuits for semiconductor memories
    Patent number: 10249358
    Abstract: Apparatuses and methods for configurable command and data input circuits for semiconductor memories are described. Example apparatuses include input signal blocks, clock blocking circuits, data input blocks, driver circuits, and data receiver circuits.
    Type: Grant
    Filed: November 14, 2018
    Date of Patent: April 2, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Hyun Yoo Lee, Kang-Yong Kim, John D. Porter
  • APPARATUSES AND METHODS FOR CONFIGURABLE COMMAND AND DATA INPUT CIRCUITS FOR SEMICONDUCTOR MEMORIES
    Publication number: 20190080743
    Abstract: Apparatuses and methods for configurable command and data input circuits for semiconductor memories are described. Example apparatuses include input signal blocks, clock blocking circuits, data input blocks, driver circuits, and data receiver circuits.
    Type: Application
    Filed: November 14, 2018
    Publication date: March 14, 2019
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Hyun Yoo Lee, Kang-Yong Kim, John D. Porter
  • Apparatuses and methods for determining a phase relationship between an input clock signal and a multiphase clock signal
    Patent number: 10210918
    Abstract: Apparatuses and methods for determining a phase relationship between an input clock signal and a multiphase clock signal are disclosed. An example apparatus includes a clock path configured to receive a clock signal and provide internal clock signals and a command path configured to receive a command and propagate the command through the command path responsive to the internal clock signals and provide an internal command having a timing that reflects a timing of the clock signal. The example apparatus further includes a data clock path configured to receive a data clock signal and provide multiphase clock signals based on the data clock signal and provide a delayed multiphase clock signal, and further includes a clock synchronization circuit configured to receive the delayed multiphase clock signal and latch a logic level of the delayed multiphase clock signal responsive to the internal command.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: February 19, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Hyun Yoo Lee, Kang-Yong Kim