Patents by Inventor Karthik Kumar

Karthik Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11502959
    Abstract: A traffic flow based map cache refresh may be provided. A computing device may receive a dropped packet message when a packet associated with a flow having a destination and a source was dropped before it reached the destination. Next, in response to receiving the dropped packet message, a map request message may be sent to a Map Server (MS). In response to sending the map request message, a map response message may be received indicating an updated destination for the flow. A map cache may then be refreshed for the source of the flow based on the updated destination from the received map response message.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: November 15, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Prakash C. Jain, Sanjay Kumar Hooda, Karthik Kumar Thatikonda, Denis Neogi, Rajeev Kumar
  • Publication number: 20220345420
    Abstract: There is disclosed in one example an application-specific integrated circuit (ASIC), including: an artificial intelligence (AI) circuit; and circuitry to: identify a flow, the flow including traffic diverted from a core cloud service of a network to be serviced by an edge node closer to an edge of the network than to the core of the network; receive telemetry related to the flow, the telemetry including fine-grained and flow-level network monitoring data for the flow; operate the AI circuit to predict, from the telemetry, a future service-level demand for the edge node; and cause a service parameter of the edge node to be tuned according to the prediction.
    Type: Application
    Filed: July 11, 2022
    Publication date: October 27, 2022
    Applicant: Intel Corporation
    Inventors: Francesc Guim Bernat, Karthik Kumar, Thomas Willhalm, Mark A. Schmisseur, Timothy Verrall
  • Publication number: 20220334736
    Abstract: An embodiment of an electronic apparatus may comprise one or more substrates and a controller coupled to the one or more substrates, the controller including circuitry to apply a reliability, availability, and serviceability (RAS) policy for access to a memory in accordance with a first RAS scheme, change the applied RAS policy in accordance with a second RAS scheme at runtime, where the second RAS scheme is different from the first RAS scheme, and access the memory in accordance with the applied RAS policy. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: July 1, 2022
    Publication date: October 20, 2022
    Applicant: Intel Corporation
    Inventors: Francesc Guim Bernat, Karthik Kumar, Thomas Willhalm, Hsing-Min Chen, Theodros Yigzaw, Russell Clapp, Saravanan Sethuraman, Patricia Mwove Shaffer
  • Patent number: 11475758
    Abstract: Methods, devices, and systems for monitoring control panels of a fire control system is described herein. In some examples, one or more embodiments include a computing device comprising a memory, a processor configured to execute instructions stored in the memory to receive, via a gateway device, data from a plurality of fire control panels of a fire control system, and detect an event associated with one of the fire control panels based on the received data, and a user interface configured to display information associated with the detected event.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: October 18, 2022
    Assignee: Honeywell International Inc.
    Inventors: Deepika Sahai, Simon Foulkes, Karthik Kumar Davanam, Amit Jain, Rajesh Babu Nalukurthy
  • Publication number: 20220329450
    Abstract: Examples described herein relate to a network interface device that includes circuitry to perform switching and perform a received command in one or more packets while at least one of the at least one compute device is in a reduced power state, wherein the command is associated with operation of the at least one of the at least one compute device that is in a reduced power state. In some examples, the network interface device is able to control power available to at least one compute device.
    Type: Application
    Filed: June 28, 2022
    Publication date: October 13, 2022
    Inventors: Harald SERVAT, Amruta MISRA, Mikko BYCKLING, Francesc GUIM BERNAT, Jaime ARTEAGA MOLINA, Karthik KUMAR
  • Publication number: 20220321438
    Abstract: Technologies for dynamically managing resources in disaggregated accelerators include an accelerator. The accelerator includes acceleration circuitry with multiple logic portions, each capable of executing a different workload. Additionally, the accelerator includes communication circuitry to receive a workload to be executed by a logic portion of the accelerator and a dynamic resource allocation logic unit to identify a resource utilization threshold associated with one or more shared resources of the accelerator to be used by a logic portion in the execution of the workload, limit, as a function of the resource utilization threshold, the utilization of the one or more shared resources by the logic portion as the logic portion executes the workload, and subsequently adjust the resource utilization threshold as the workload is executed. Other embodiments are also described and claimed.
    Type: Application
    Filed: April 29, 2022
    Publication date: October 6, 2022
    Inventors: Francesc GUIM BERNAT, Susanne M. BALLE, Rahul KHANNA, Sujoy SEN, Karthik KUMAR
  • Publication number: 20220321434
    Abstract: Reliability and performance of a data center is increased by processing telemetry data in a network device in the data center. A Telemetry Correlation Engine (TCE) in the network device correlates host level telemetry received from a compute node with low-level network device telemetry collected in the network device to identify performance bottlenecks for microservices based applications. The Telemetry Correlation Engine processes and analyzes the telemetry data from the compute node and network statistics available in the network device.
    Type: Application
    Filed: June 24, 2022
    Publication date: October 6, 2022
    Inventors: Andrzej KURIATA, Francesc GUIM BERNAT, Karthik KUMAR, Susanne M. BALLE, Alexander BACHMUTSKY, Duane E. GALBI, Nagabhushan CHITLUR, Sundar NADATHUR
  • Publication number: 20220318132
    Abstract: Methods and apparatus for software-assisted sparse memory. A processor including a memory controller is configured to implement one or more portions of the memory space for memory accessed via the memory controller as sparse memory regions. The amount of physical memory used for a sparse memory region is a fraction of the address range for the sparse memory region, where only non-zero data are written to the physical memory. Mechanisms are provided to detect memory access requests for memory in a sparse memory region and perform associated operations, while non-sparse memory access operations are performed when accessing memory that is not in a sparse memory region. Interfaces are provided to enable software to request allocation of a new sparse memory region or allocate sparse memory from an existing sparse memory region. Operations associated with access to sparse memory regions include detecting whether data for read and write request are all zeros.
    Type: Application
    Filed: June 22, 2022
    Publication date: October 6, 2022
    Inventors: Thomas WILLHALM, Francesc GUIM BERNAT, Karthik KUMAR
  • Publication number: 20220317749
    Abstract: A method is described. The method includes performing the following within a data center: a) recognizing that excess power derived from one or more ambient sources is available; b) determining allocations of respective portions of the excess power for different units of hardware within the data center; c) determining respective higher performance and higher power operational states for certain functional blocks within the different units of the hardware to utilize the excess power.
    Type: Application
    Filed: June 23, 2022
    Publication date: October 6, 2022
    Inventors: Francesc GUIM BERNAT, Karthik KUMAR, Marcos E. CARRANZA, Cesar Ignacio MARTINEZ SPESSOT, Trevor COOPER
  • Patent number: 11456966
    Abstract: There is disclosed in one example an application-specific integrated circuit (ASIC), including: an artificial intelligence (Al) circuit; and circuitry to: identify a flow, the flow including traffic diverted from a core cloud service of a network to be serviced by an edge node closer to an edge of the network than to the core of the network; receive telemetry related to the flow, the telemetry including fine-grained and flow-level network monitoring data for the flow; operate the Al circuit to predict, from the telemetry, a future service-level demand for the edge node; and cause a service parameter of the edge node to be tuned according to the prediction.
    Type: Grant
    Filed: October 13, 2021
    Date of Patent: September 27, 2022
    Assignee: Intel Corporation
    Inventors: Francesc Guim Bernat, Karthik Kumar, Thomas Willhalm, Mark A. Schmisseur, Timothy Verrall
  • Patent number: 11451435
    Abstract: Technologies for providing multi-tenant support in edge resources using edge channels include a device that includes circuitry to obtain a message associated with a service provided at the edge of a network. Additionally, the circuitry is to identify an edge channel based on metadata associated with the message. The edge channel has a predefined amount of resource capacity allocated to the edge channel to process the message. Further, the circuitry is to determine the predefined amount of resource capacity allocated to the edge channel and process the message using the allocated resource capacity for the identified edge channel.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: September 20, 2022
    Assignee: INTEL CORPORATION
    Inventors: Francesc Guim Bernat, Karthik Kumar, Benjamin Graniello, Timothy Verrall, Andrew J. Herdrich, Rashmin Patel, Monica Kenguva, Brinda Ganesh, Alexander Vul, Ned M. Smith, Suraj Prabhakaran
  • Publication number: 20220263891
    Abstract: Technologies for providing selective offload of execution of an application to the edge include a device that includes circuitry to determine whether a section of an application to be executed by the device is available to be offloaded. Additionally, the circuitry is to determine one or more characteristics of an edge resource available to execute the section. Further, the circuitry is to determine, as a function of the one or more characteristics and a target performance objective associated with the section, whether to offload the section to the edge resource and offload, in response to a determination to offload the section, the section to the edge resource.
    Type: Application
    Filed: March 7, 2022
    Publication date: August 18, 2022
    Inventors: Francesc Guim Bernat, Ned Smith, Thomas Willhalm, Karthik Kumar, Timothy Verrall
  • Patent number: 11416295
    Abstract: Technologies for providing efficient data access in an edge infrastructure include a compute device comprising circuitry configured to identify pools of resources that are usable to access data at an edge location. The circuitry is also configured to receive a request to execute a function at an edge location. The request identifies a data access performance target for the function. The circuitry is also configured to map, based on a data access performance of each pool and the data access performance target of the function, the function to a set of the pools to satisfy the data access performance target.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: August 16, 2022
    Assignee: INTEL CORPORATION
    Inventors: Francesc Guim Bernat, Karthik Kumar, Suraj Prabhakaran, Timothy Verrall, Thomas Willhalm, Mark Schmisseur
  • Patent number: 11412052
    Abstract: An architecture to perform resource management among multiple network nodes and associated resources is disclosed. Example resource management techniques include those relating to: proactive reservation of edge computing resources; deadline-driven resource allocation; speculative edge QoS pre-allocation; and automatic QoS migration across edge computing nodes.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: August 9, 2022
    Assignee: Intel Corporation
    Inventors: Francesc Guim Bernat, Patrick Bohan, Kshitij Arun Doshi, Brinda Ganesh, Andrew J. Herdrich, Monica Kenguva, Karthik Kumar, Patrick G Kutch, Felipe Pastor Beneyto, Rashmin Patel, Suraj Prabhakaran, Ned M. Smith, Petar Torre, Alexander Vul
  • Patent number: 11409440
    Abstract: Memory controller systems, methods and apparatus for memory access and scheduling are herein disclosed. In some aspects, a memory controller includes a clock, a first interface to be coupled with a first memory device via a common memory channel, and a second interface to be coupled with a second memory device via the common memory channel. The memory controller also includes a register to store data to store data to indicate an access scheme to process access requests to the first memory device according to a first timing scheme and issue access requests to the second memory device according to a second timing scheme. The memory controller further includes logic to cause the access scheme to be implemented in order to issue access requests to the first memory device or to issue access requests to the second memory device via the common memory channel.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: August 9, 2022
    Assignee: INTEL CORPORATION
    Inventors: Francesc Guim Bernat, Karthik Kumar, Thomas Willhalm, Mark Schmisseur
  • Publication number: 20220219032
    Abstract: Commissioning a fire system is described herein. One embodiment includes a non-transitory machine-readable medium having instructions stored thereon which, when executed by a processor, cause the processor to receive an indicator of a particular fire control panel of a fire system installed in a building, and provide an interface via a display for configuring a gateway device associated with the fire control panel responsive to receiving the indicator, the interface including a plurality of portions, wherein each portion is configured to receive a respective descriptor corresponding to the fire control panel.
    Type: Application
    Filed: January 12, 2021
    Publication date: July 14, 2022
    Inventors: Deepika Sahai, Amit Jain, Karthik Kumar Davanam
  • Publication number: 20220222010
    Abstract: Methods and apparatus for advanced interleaving techniques for fabric based pooling architectures. The method implemented in an environment including a switch connected to host servers and to pooled memory nodes or memory servers hosting memory pools. Memory is interleaved across the memory pools using interleaving units, with the interleaved memory mapped into a global memory address space. Applications running on the host servers are enabled to access data stored in the memory pools via memory read and write requests issued by the applications specifying address endpoints within the global memory space. The switch generates multi-cast or multiple unicast messages associated with the memory read and write requests that are sent to the pooled memory nodes or memory servers. For memory reads, the data returned from multiple memory pools is aggregated at the switch and returned to the application using one or more packets as a single response.
    Type: Application
    Filed: March 31, 2022
    Publication date: July 14, 2022
    Inventors: Alexander BACHMUTSKY, Francesc GUIM BERNAT, Karthik KUMAR, Marcos E. CARRANZA
  • Publication number: 20220222274
    Abstract: Technologies for providing dynamic persistence of data in edge computing include a device including circuitry configured to determine multiple different logical domains of data storage resources for use in storing data from a client compute device at an edge of a network. Each logical domain has a different set of characteristics. The circuitry is also to configured to receive, from the client compute device, a request to persist data. The request includes a target persistence objective indicative of an objective to be satisfied in the storage of the data. Additionally, the circuitry is configured to select, as a function of the characteristics of the logical domains and the target persistence objective, a logical domain into which to persist the data and provide the data to the selected logical domain.
    Type: Application
    Filed: January 20, 2022
    Publication date: July 14, 2022
    Inventors: Francesc Guim Bernat, Karthik Kumar, Suraj Prabhakaran, Ramanathan Sethuraman, Timothy Verrall, Ned Smith
  • Publication number: 20220224657
    Abstract: Technologies for accelerating edge device workloads at a device edge network include a network computing device which includes a processor platform that includes at least one processor which supports a plurality of non-accelerated function-as-a-service (FaaS) operations and an accelerated platform that includes at least one accelerator which supports a plurality of accelerated FaaS (AFaaS) operation. The network computing device is configured to receive a request to perform a FaaS operation, determine whether the received request indicates that an AFaaS operation is to be performed on the received request, and identify compute requirements for the AFaaS operation to be performed. The network computing device is further configured to select an accelerator platform to perform the identified AFaaS operation and forward the received request to the selected accelerator platform to perform the identified AFaaS operation. Other embodiments are described and claimed.
    Type: Application
    Filed: October 25, 2021
    Publication date: July 14, 2022
    Inventors: Francesc Guim Bernat, Anil Rao, Suraj Prabhakaran, Mohan Kumar, Karthik Kumar
  • Publication number: 20220206849
    Abstract: Methods and apparatus for hardware support for low latency microservice deployments in switches. A switch is communicatively coupled via a network or fabric to a plurality of platforms configured to implement one or more microservices. The microservices are used to perform a distributed workload, job, or task as defined by a corresponding graph representation of the microservices including vertices (also referred to as nodes) associated with microservices and edges defining communication between microservices. The graph representation also defines dependencies between microservices. The switch is configured to schedule execution of the graph of microservices on the plurality of platforms, including generating an initial schedule that is dynamically revised during runtime in consideration of performance telemetry data for the microservices received from the platforms and network/fabric utilization monitored onboard the switch.
    Type: Application
    Filed: March 21, 2022
    Publication date: June 30, 2022
    Inventors: Francesc GUIM BERNAT, Karthik KUMAR, Alexander BACHMUTSKY