Patents by Inventor Karthik Kumar

Karthik Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11561868
    Abstract: Embodiments described herein are generally directed to intelligent management of microservices failover. In an example, responsive to an uncorrectable hardware error associated with a processing resource of a platform on which a task of a service is being performed by a primary microservice, a failover trigger is received by a failover service. A secondary microservice is identified by the failover service that is operating in lockstep mode with the primary microservice. The secondary microservice is caused by the failover service to takeover performance of the task in non-lockstep mode based on failover metadata persisted by the primary microservice. The primary microservice is caused by the failover service to be taken offline.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: January 24, 2023
    Assignee: Intel Corporation
    Inventors: Rajesh Poornachandran, Marcos Carranza, Kshitij Arun Doshi, Francesc Guim Bernat, Karthik Kumar
  • Patent number: 11560266
    Abstract: A food delivery enclosure for delivering groceries includes a low insulation zone and a high insulation zone. The low insulation zone includes energy packs, such as chill packs or hot packs and food items suitable for contact with the energy packs. The high insulation zone is above the low insulation zone and includes food items that are not suitable for contact with the energy packs.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: January 24, 2023
    Assignee: AMAZON TECHNOLOGIES, INC.
    Inventor: Karthik Kumar
  • Publication number: 20230006889
    Abstract: The present disclosure is generally related to edge computing technologies (ECTs), communications networking, network slicing, and in particular, to techniques and technologies for providing flow-specific network slices. In particular, the present disclosure describes mechanisms that expand existing end-to-end architectures in order to include quality of service and monitoring mechanisms that connect network slicing technologies with infrastructure and/or network data center quality of service provider domains. The described mechanisms provide data center bridging to enable network, edge computing, and cloud computing domains.
    Type: Application
    Filed: August 31, 2022
    Publication date: January 5, 2023
    Inventors: Akhilesh S. Thyagaturu, Francesc Guim Bernat, Xiangyang Zhuang, Karthik Kumar, Petar Torre
  • Publication number: 20230004417
    Abstract: Scalable I/O Virtualization (Scalable IOV) allows efficient and scalable sharing of Input/Output (I/O) devices across a large number of containers or Virtual Machines. Scalable IOV defines the granularity of sharing of a device as an Assignable Device Interface (ADI). In response to a request for a virtual device composition, an ADI is selected based on affinity to the same NUMA node as the running virtual machine, utilization metrics for the Input-Output Memory Management Unit (IOMMU) unit and utilization metrics of a device of a same device class. Selecting the ADI based on locality and utilization metrics reduces latency and increases throughput for a virtual machine running critical or real-time workloads.
    Type: Application
    Filed: September 6, 2022
    Publication date: January 5, 2023
    Inventors: Karthik V. NARAYANAN, Raghunathan SRINIVASAN, Karthik KUMAR
  • Patent number: 11537447
    Abstract: Technologies for providing efficient migration of services include a server device. The server device includes compute engine circuitry to execute a set of services on behalf of a terminal device and migration accelerator circuitry. The migration accelerator circuitry is to determine whether execution of the services is to be migrated from an edge station in which the present server device is located to a second edge station in which a second server device is located, determine a prioritization of the services executed by the server device, and send, in response to a determination that the services are to be migrated and as a function of the determined prioritization, data utilized by each service to the second server device of the second edge station to migrate the services. Other embodiments are also described and claimed.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: December 27, 2022
    Assignee: Intel Corporation
    Inventors: Francesc Guim Bernat, Karthik Kumar, Susanne M. Balle, Ignacio Astilleros Diez, Timothy Verrall, Ned M. Smith
  • Publication number: 20220407803
    Abstract: Technologies for quality of service based throttling in a fabric architecture include a network node of a plurality of network nodes interconnected across the fabric architecture via an interconnect fabric. The network node includes a host fabric interface (HFI) configured to facilitate the transmission of data to/from the network node, monitor quality of service levels of resources of the network node used to process and transmit the data, and detect a throttling condition based on a result of the monitored quality of service levels. The HFI is further configured to generate and transmit a throttling message to one or more of the interconnected network nodes in response to having detected a throttling condition. The HFI is additionally configured to receive a throttling message from another of the network nodes and perform a throttling action on one or more of the resources based on the received throttling message. Other embodiments are described herein.
    Type: Application
    Filed: May 17, 2022
    Publication date: December 22, 2022
    Applicant: Intel Corporation
    Inventors: Francesc Guim Bernat, Karthik Kumar, Thomas Willhalm, Raj Ramanujan, Brian Slechta
  • Patent number: 11533268
    Abstract: An example system to schedule service requests in a network computing system using hardware queue managers includes: a gateway-level hardware queue manager in an edge gateway to schedule the service requests received from client devices in a queue; a rack-level hardware queue manager in a physical rack in communication with the edge gateway, the rack-level hardware queue manager to send a pull request to the gateway-level hardware queue manager for a first one of the service requests; and a drawer-level hardware queue manager in a drawer of the physical rack, the drawer-level hardware queue manager to send a second pull request to the rack-level hardware queue manager for the first one of the service requests, the drawer including a resource to provide a function as a service specified in the first one of the service requests.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: December 20, 2022
    Assignee: INTEL CORPORATION
    Inventors: Francesc Guim Bernat, Karthik Kumar, Suraj Prabhakaran, Ignacio Astilleros Diez, Timothy Verrall
  • Patent number: 11502959
    Abstract: A traffic flow based map cache refresh may be provided. A computing device may receive a dropped packet message when a packet associated with a flow having a destination and a source was dropped before it reached the destination. Next, in response to receiving the dropped packet message, a map request message may be sent to a Map Server (MS). In response to sending the map request message, a map response message may be received indicating an updated destination for the flow. A map cache may then be refreshed for the source of the flow based on the updated destination from the received map response message.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: November 15, 2022
    Assignee: Cisco Technology, Inc.
    Inventors: Prakash C. Jain, Sanjay Kumar Hooda, Karthik Kumar Thatikonda, Denis Neogi, Rajeev Kumar
  • Publication number: 20220345420
    Abstract: There is disclosed in one example an application-specific integrated circuit (ASIC), including: an artificial intelligence (AI) circuit; and circuitry to: identify a flow, the flow including traffic diverted from a core cloud service of a network to be serviced by an edge node closer to an edge of the network than to the core of the network; receive telemetry related to the flow, the telemetry including fine-grained and flow-level network monitoring data for the flow; operate the AI circuit to predict, from the telemetry, a future service-level demand for the edge node; and cause a service parameter of the edge node to be tuned according to the prediction.
    Type: Application
    Filed: July 11, 2022
    Publication date: October 27, 2022
    Applicant: Intel Corporation
    Inventors: Francesc Guim Bernat, Karthik Kumar, Thomas Willhalm, Mark A. Schmisseur, Timothy Verrall
  • Publication number: 20220334736
    Abstract: An embodiment of an electronic apparatus may comprise one or more substrates and a controller coupled to the one or more substrates, the controller including circuitry to apply a reliability, availability, and serviceability (RAS) policy for access to a memory in accordance with a first RAS scheme, change the applied RAS policy in accordance with a second RAS scheme at runtime, where the second RAS scheme is different from the first RAS scheme, and access the memory in accordance with the applied RAS policy. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: July 1, 2022
    Publication date: October 20, 2022
    Applicant: Intel Corporation
    Inventors: Francesc Guim Bernat, Karthik Kumar, Thomas Willhalm, Hsing-Min Chen, Theodros Yigzaw, Russell Clapp, Saravanan Sethuraman, Patricia Mwove Shaffer
  • Patent number: 11475758
    Abstract: Methods, devices, and systems for monitoring control panels of a fire control system is described herein. In some examples, one or more embodiments include a computing device comprising a memory, a processor configured to execute instructions stored in the memory to receive, via a gateway device, data from a plurality of fire control panels of a fire control system, and detect an event associated with one of the fire control panels based on the received data, and a user interface configured to display information associated with the detected event.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: October 18, 2022
    Assignee: Honeywell International Inc.
    Inventors: Deepika Sahai, Simon Foulkes, Karthik Kumar Davanam, Amit Jain, Rajesh Babu Nalukurthy
  • Publication number: 20220329450
    Abstract: Examples described herein relate to a network interface device that includes circuitry to perform switching and perform a received command in one or more packets while at least one of the at least one compute device is in a reduced power state, wherein the command is associated with operation of the at least one of the at least one compute device that is in a reduced power state. In some examples, the network interface device is able to control power available to at least one compute device.
    Type: Application
    Filed: June 28, 2022
    Publication date: October 13, 2022
    Inventors: Harald SERVAT, Amruta MISRA, Mikko BYCKLING, Francesc GUIM BERNAT, Jaime ARTEAGA MOLINA, Karthik KUMAR
  • Publication number: 20220318132
    Abstract: Methods and apparatus for software-assisted sparse memory. A processor including a memory controller is configured to implement one or more portions of the memory space for memory accessed via the memory controller as sparse memory regions. The amount of physical memory used for a sparse memory region is a fraction of the address range for the sparse memory region, where only non-zero data are written to the physical memory. Mechanisms are provided to detect memory access requests for memory in a sparse memory region and perform associated operations, while non-sparse memory access operations are performed when accessing memory that is not in a sparse memory region. Interfaces are provided to enable software to request allocation of a new sparse memory region or allocate sparse memory from an existing sparse memory region. Operations associated with access to sparse memory regions include detecting whether data for read and write request are all zeros.
    Type: Application
    Filed: June 22, 2022
    Publication date: October 6, 2022
    Inventors: Thomas WILLHALM, Francesc GUIM BERNAT, Karthik KUMAR
  • Publication number: 20220321434
    Abstract: Reliability and performance of a data center is increased by processing telemetry data in a network device in the data center. A Telemetry Correlation Engine (TCE) in the network device correlates host level telemetry received from a compute node with low-level network device telemetry collected in the network device to identify performance bottlenecks for microservices based applications. The Telemetry Correlation Engine processes and analyzes the telemetry data from the compute node and network statistics available in the network device.
    Type: Application
    Filed: June 24, 2022
    Publication date: October 6, 2022
    Inventors: Andrzej KURIATA, Francesc GUIM BERNAT, Karthik KUMAR, Susanne M. BALLE, Alexander BACHMUTSKY, Duane E. GALBI, Nagabhushan CHITLUR, Sundar NADATHUR
  • Publication number: 20220321438
    Abstract: Technologies for dynamically managing resources in disaggregated accelerators include an accelerator. The accelerator includes acceleration circuitry with multiple logic portions, each capable of executing a different workload. Additionally, the accelerator includes communication circuitry to receive a workload to be executed by a logic portion of the accelerator and a dynamic resource allocation logic unit to identify a resource utilization threshold associated with one or more shared resources of the accelerator to be used by a logic portion in the execution of the workload, limit, as a function of the resource utilization threshold, the utilization of the one or more shared resources by the logic portion as the logic portion executes the workload, and subsequently adjust the resource utilization threshold as the workload is executed. Other embodiments are also described and claimed.
    Type: Application
    Filed: April 29, 2022
    Publication date: October 6, 2022
    Inventors: Francesc GUIM BERNAT, Susanne M. BALLE, Rahul KHANNA, Sujoy SEN, Karthik KUMAR
  • Publication number: 20220317749
    Abstract: A method is described. The method includes performing the following within a data center: a) recognizing that excess power derived from one or more ambient sources is available; b) determining allocations of respective portions of the excess power for different units of hardware within the data center; c) determining respective higher performance and higher power operational states for certain functional blocks within the different units of the hardware to utilize the excess power.
    Type: Application
    Filed: June 23, 2022
    Publication date: October 6, 2022
    Inventors: Francesc GUIM BERNAT, Karthik KUMAR, Marcos E. CARRANZA, Cesar Ignacio MARTINEZ SPESSOT, Trevor COOPER
  • Patent number: 11456966
    Abstract: There is disclosed in one example an application-specific integrated circuit (ASIC), including: an artificial intelligence (Al) circuit; and circuitry to: identify a flow, the flow including traffic diverted from a core cloud service of a network to be serviced by an edge node closer to an edge of the network than to the core of the network; receive telemetry related to the flow, the telemetry including fine-grained and flow-level network monitoring data for the flow; operate the Al circuit to predict, from the telemetry, a future service-level demand for the edge node; and cause a service parameter of the edge node to be tuned according to the prediction.
    Type: Grant
    Filed: October 13, 2021
    Date of Patent: September 27, 2022
    Assignee: Intel Corporation
    Inventors: Francesc Guim Bernat, Karthik Kumar, Thomas Willhalm, Mark A. Schmisseur, Timothy Verrall
  • Patent number: 11451435
    Abstract: Technologies for providing multi-tenant support in edge resources using edge channels include a device that includes circuitry to obtain a message associated with a service provided at the edge of a network. Additionally, the circuitry is to identify an edge channel based on metadata associated with the message. The edge channel has a predefined amount of resource capacity allocated to the edge channel to process the message. Further, the circuitry is to determine the predefined amount of resource capacity allocated to the edge channel and process the message using the allocated resource capacity for the identified edge channel.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: September 20, 2022
    Assignee: INTEL CORPORATION
    Inventors: Francesc Guim Bernat, Karthik Kumar, Benjamin Graniello, Timothy Verrall, Andrew J. Herdrich, Rashmin Patel, Monica Kenguva, Brinda Ganesh, Alexander Vul, Ned M. Smith, Suraj Prabhakaran
  • Publication number: 20220263891
    Abstract: Technologies for providing selective offload of execution of an application to the edge include a device that includes circuitry to determine whether a section of an application to be executed by the device is available to be offloaded. Additionally, the circuitry is to determine one or more characteristics of an edge resource available to execute the section. Further, the circuitry is to determine, as a function of the one or more characteristics and a target performance objective associated with the section, whether to offload the section to the edge resource and offload, in response to a determination to offload the section, the section to the edge resource.
    Type: Application
    Filed: March 7, 2022
    Publication date: August 18, 2022
    Inventors: Francesc Guim Bernat, Ned Smith, Thomas Willhalm, Karthik Kumar, Timothy Verrall
  • Patent number: 11416295
    Abstract: Technologies for providing efficient data access in an edge infrastructure include a compute device comprising circuitry configured to identify pools of resources that are usable to access data at an edge location. The circuitry is also configured to receive a request to execute a function at an edge location. The request identifies a data access performance target for the function. The circuitry is also configured to map, based on a data access performance of each pool and the data access performance target of the function, the function to a set of the pools to satisfy the data access performance target.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: August 16, 2022
    Assignee: INTEL CORPORATION
    Inventors: Francesc Guim Bernat, Karthik Kumar, Suraj Prabhakaran, Timothy Verrall, Thomas Willhalm, Mark Schmisseur