Patents by Inventor Katsumi Abe

Katsumi Abe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9153703
    Abstract: There is provided a thin-film transistor including at least a substrate, a gate electrode, a gate insulating layer, an oxide semiconductor layer, a source electrode, a drain electrode and a protective layer, wherein the oxide semiconductor layer is an amorphous oxide containing at least one of the elements In, Ga and Zn, the gate electrode-side carrier density of the oxide semiconductor layer is higher than the protective layer-side carrier density thereof, and the film thickness of the oxide semiconductor layer is 30 nm±15 nm.
    Type: Grant
    Filed: February 8, 2008
    Date of Patent: October 6, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Nobuyuki Kaji, Ryo Hayashi, Hisato Yabuta, Katsumi Abe
  • Publication number: 20150160071
    Abstract: Provided are a vibration detector and a vibration detecting method, which are power saving, can detect vibration even if the vibration is very weak, and can perform both start-up of the apparatus and collection of data of vibration information by the use of only one sensor. The apparatus includes a vibration detector, a semiconductor switch, a controller and a power supply. The semiconductor switch and the controller are connected to the power supply. The vibration detector detects vibration and consequently generates a vibration voltage. The semiconductor switch includes a voltage divider for generating a bias voltage inside. The semiconductor switch detects a voltage produced by superposing the bias voltage onto the vibration voltage outputted from the vibration detector, and conducts current when the detected voltage is equal to or larger than a certain value. The controller wakes up with the current conducted by the semiconductor switch as a trigger signal.
    Type: Application
    Filed: December 11, 2012
    Publication date: June 11, 2015
    Applicant: NEC Corporation
    Inventors: Hideki Kadosawa, Tetsuya Yoshinari, Shigeki Shinoda, Katsumi Abe, Yasuhiro Sasaki
  • Patent number: 9041706
    Abstract: In order to suppress an influence of an electrical stress on a TFT characteristic in use of a TFT, a light emitting display apparatus according to the present invention comprises organic EL devices and driving circuits for driving the organic EL devices. The driving circuit includes plural pixels each having a thin film transistor of which a threshold voltage reversibly changes due to the electrical stress applied between a gate terminal and a source terminal, and a voltage applying unit which sets gate potential of the thin film transistor higher than source potential. The voltage applying unit applies the electrical stress between the gate terminal and the source terminal at a time when the thin film transistor is not driven, so as to drive the thin film transistor in a region that the threshold voltage is saturated to the electrical stress.
    Type: Grant
    Filed: January 6, 2014
    Date of Patent: May 26, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hisae Shimizu, Katsumi Abe, Ryo Hayashi
  • Patent number: 8923074
    Abstract: A sense amplifier circuit is connected to a bit-line and senses and amplifies a signal read from a memory cell. A first data latch is connected to a sense amplifier via a first bus. A second data latch is connected to a second bus. A plurality of circuit groups are repeatedly provided in a first direction, each circuit group including one sense amplifier circuit and one first data latch. The second data latch is provided between the circuit groups and an input/output buffer.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: December 30, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiro Yoshihara, Naofumi Abiko, Katsumi Abe
  • Patent number: 8913398
    Abstract: An object of the present invention is to allow stress that may be applied to a semiconductor package to be suppressed, when the semiconductor package is mounted on a curved board. In a mount board 1, a semiconductor package 20 is mounted on a curved board 10 including a curved surface on at least a portion thereof. The curved board 10 includes a pedestal portion 13a disposed on a region of the curved surface portion where the semiconductor package 20 is mounted and having an upper surface thereof formed flat, and a plurality of pad portions 15a disposed on the flat surface of the pedestal portion 13a. The pedestal portion 13a is formed of an insulating material. The semiconductor package 20 is mounted on the pad portions 15a.
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: December 16, 2014
    Assignee: NEC Corporation
    Inventors: Shinji Watanabe, Nobuhiro Mikami, Junya Sato, Kenichiro Fujii, Katsumi Abe, Atsumasa Sawada
  • Publication number: 20140286093
    Abstract: According to one embodiment, a semiconductor memory device includes a NAND string and a sense amplifier. The NAND string includes a memory cell transistor to be capable of holding any of three or more levels of values. The NAND string includes one end connected to a bit line and the other end connected to a source line. The sense amplifier connects the bit line. A first voltage is applied to the source line when a first read voltage is applied to a selected word line connected to a selected memory cell transistor. A second voltage is applied to the source line when a second read voltage is applied to the selected word line. The first voltage is higher than the second voltage. The first read voltage is the lowest voltage of a plurality of read voltage. The second read voltage is higher than the first read voltage.
    Type: Application
    Filed: September 10, 2013
    Publication date: September 25, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Katsumi Abe, Masahiro Yoshihara
  • Patent number: 8808951
    Abstract: An object of the present invention is to provide an electrophotographic photosensitive body having improved electrophotographic characteristics such as sensitivity and residual potential and also having excellent durability. The present invention provides an electrophotographic photosensitive body having a layer containing at least one specific p-terphenyl compound and at least one polycarbonate resin represented by the general formula (I): in a mass ratio of the p-terphenyl compound to the polycarbonate resin within the range of 2:8 to 7:3.
    Type: Grant
    Filed: June 5, 2013
    Date of Patent: August 19, 2014
    Assignee: Hodogaya Chemical Co., Ltd.
    Inventors: Katsumi Abe, Atsushi Takesue, Takehiro Nakajima, Makoto Koike, Shinya Nagai
  • Patent number: 8797807
    Abstract: According to one embodiment, the semiconductor memory includes a memory cell array which includes memory cells to store data, a buffer circuit which includes latches, each of the latches including transistors as control elements and a flip-flop, and a control circuit which turns off the transistors to deactivate one or more of the latches.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: August 5, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masahiro Yoshihara, Katsumi Abe
  • Patent number: 8797246
    Abstract: A liquid crystal display substrate has a data driver circuit and a gate driver circuit for driving the liquid crystal display integrated thereon together with a common drive circuit, where common voltages VCOMH and VCOML are applied from the outside through a pad. The gate driver circuit is placed to be adjacent to one of the four terminals of the liquid crystal display. The common drive circuit is placed to be adjacent to the terminal opposite to where the gate driver circuit is placed and as close to the pad as possible while having almost the same width as the area of the gate driver circuit. The pad close to where the common drive circuit is placed is used as the pad for applying the common voltages VCOMH and VCOML.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: August 5, 2014
    Assignee: Gold Charm Limited
    Inventor: Katsumi Abe
  • Patent number: 8722288
    Abstract: [Problems] To provide a novel compound which has a high carrier mobility and is useful as a charge-transporting agent that is not only capable of stably forming a photosensitive layer without precipitating crystals or forming pinholes at the time of forming the photosensitive layer but is also capable of forming an organic photosensitive material for electrophotography that has a high sensitivity and a low residual potential. [Means for Solution] A diphenylnaphthylamine derivative represented by the following general formula (1), wherein R1 to R3 are alkyl groups, k is an integer of 0 to 3, j is an integer of 0 to 4, l is an integer of 0 to 6, and X1 and X2 are hydrocarbon groups having at least one ethylenically unsaturated bond.
    Type: Grant
    Filed: November 4, 2010
    Date of Patent: May 13, 2014
    Assignee: Hodogaya Chemical Co., Ltd.
    Inventors: Shigetaka Numazawa, Katsumi Abe, Makoto Koike, Kiyotaka Ihara
  • Publication number: 20140125712
    Abstract: In order to suppress an influence of an electrical stress on a TFT characteristic in use of a TFT, a light emitting display apparatus according to the present invention comprises organic EL devices and driving circuits for driving the organic EL devices. The driving circuit includes plural pixels each having a thin film transistor of which a threshold voltage reversibly changes due to the electrical stress applied between a gate terminal and a source terminal, and a voltage applying unit which sets gate potential of the thin film transistor higher than source potential. The voltage applying unit applies the electrical stress between the gate terminal and the source terminal at a time when the thin film transistor is not driven, so as to drive the thin film transistor in a region that the threshold voltage is saturated to the electrical stress.
    Type: Application
    Filed: January 6, 2014
    Publication date: May 8, 2014
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: HISAE SHIMIZU, KATSUMI ABE, RYO HAYASHI
  • Patent number: 8673792
    Abstract: An object of the invention is to provide a method of making a p-terphenyl compound mixture which includes two symmetric p-terphenyl compounds respectively represented by formula (1) and formula (2) and an asymmetric p-terphenyl compound represented by formula (3)
    Type: Grant
    Filed: June 12, 2013
    Date of Patent: March 18, 2014
    Assignee: Hodogaya Chemical Co., Ltd.
    Inventors: Shinya Nagai, Atsushi Takesue, Makoto Koike, Katsumi Abe, Takehiro Nakajima
  • Patent number: 8659519
    Abstract: A pixel circuit including at least a light emitting element, and a thin film transistor that supplies to the light emitting element a first current controlling a gray scale according to luminance-current characteristics of the light emitting element, wherein the thin film transistor has a back gate electrode, at least a driving period in which the thin film transistor supplies the first current to the light emitting element, and a writing period in which a second current is written to the thin film transistor before the driving period in order to pass the first current to the thin film transistor during the driving period are included, and by changing voltages which are applied to the back gate electrode in the driving period and the writing period, current capability to a gate voltage of the thin film transistor is made to differ.
    Type: Grant
    Filed: August 27, 2009
    Date of Patent: February 25, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Katsumi Abe, Kenji Takahashi, Ryo Hayashi, Hideya Kumomi
  • Patent number: 8654114
    Abstract: In order to suppress an influence of an electrical stress on a TFT characteristic in use of a TFT, a light emitting display apparatus according to the present invention comprises organic EL devices and driving circuits for driving the organic EL devices. The driving circuit includes plural pixels each having a thin film transistor of which a threshold voltage reversibly changes due to the electrical stress applied between a gate terminal and a source terminal, and a voltage applying unit which sets gate potential of the thin film transistor higher than source potential. The voltage applying unit applies the electrical stress between the gate terminal and the source terminal at a time when the thin film transistor is not driven, so as to drive the thin film transistor in a region that the threshold voltage is saturated to the electrical stress.
    Type: Grant
    Filed: July 29, 2008
    Date of Patent: February 18, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hisae Shimizu, Katsumi Abe, Ryo Hayashi
  • Patent number: 8629817
    Abstract: A new driving circuit is provided. The driving circuit according to the present invention comprises a first period for setting a current to be supplied to a display element, a second period for setting a gray-scale of the display element, and a third period for supplying a driving current to the display element. The present invention, in the driving circuit of the display element, is provided with a current source circuit for supplying a constant current to the display element and a control circuit for controlling the time to supply a constant current to the display element from the current source circuit.
    Type: Grant
    Filed: January 14, 2013
    Date of Patent: January 14, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Katsumi Abe, Masafumi Sano, Ryo Hayashi, Hideya Kumomi
  • Patent number: 8625296
    Abstract: An object of the present invention is to allow stress that may be applied to a semiconductor package to be suppressed, when the semiconductor package is mounted on a curved board. In a mount board 1, a semiconductor package 20 is mounted on a curved board 10 including a curved surface on at least a portion thereof. The curved board 10 includes a pedestal portion 13a disposed on a region of the curved surface portion where the semiconductor package 20 is mounted and having an upper surface thereof formed flat, and a plurality of pad portions 15a disposed on the flat surface of the pedestal portion 13a. The pedestal portion 13a is formed of an insulating material. The semiconductor package 20 is mounted on the pad portions 15a.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: January 7, 2014
    Assignee: NEC Corporation
    Inventors: Shinji Watanabe, Nobuhiro Mikami, Junya Sato, Kenichiro Fujii, Katsumi Abe, Atsumasa Sawada
  • Publication number: 20140003154
    Abstract: In general, according to one embodiment, a semiconductor memory device includes a first transistor, a plurality of memory cells and a controller. One end of the first transistor is electrically connected to a first power supply. The plurality of memory cells are electrically connected between other end of the first transistor and a second power supply. The controller is configured to apply a first voltage to a gate of the first transistor when reading data from a selected memory cell. The controller is configured to make the first voltage progressively-increasing.
    Type: Application
    Filed: March 15, 2013
    Publication date: January 2, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Katsumi ABE, Masahiro Yoshihara
  • Publication number: 20140003015
    Abstract: An object of the present invention is to allow stress that may be applied to a semiconductor package to be suppressed, when the semiconductor package is mounted on a curved board. In a mount board 1, a semiconductor package 20 is mounted on a curved board 10 including a curved surface on at least a portion thereof. The curved board 10 includes a pedestal portion 13a disposed on a region of the curved surface portion where the semiconductor package 20 is mounted and having an upper surface thereof formed flat, and a plurality of pad portions 15a disposed on the flat surface of the pedestal portion 13a. The pedestal portion 13a is formed of an insulating material. The semiconductor package 20 is mounted on the pad portions 15a.
    Type: Application
    Filed: September 3, 2013
    Publication date: January 2, 2014
    Applicant: NEC CORPORATION
    Inventors: Shinji WATANABE, Nobuhiro MIKAMI, Junya SATO, Kenichiro FUJII, Katsumi ABE, Atsumasa SAWADA
  • Patent number: 8610695
    Abstract: A drive circuit for a light emitting display apparatus including a pixel circuit having a light emitting device for emitting a light having brightness determined based on supplied current and a drive transistor for supplying the current to the light emitting device, comprises a threshold value correction circuit converting a second signal including a threshold voltage of the drive transistor and a data voltage, the second signal being output from the drive transistor when a first signal including the data voltage is input into the control electrode of the drive transistor, into a third signal including the threshold voltage of an inverted polarity and the data voltage or a voltage corresponding to the data voltage, to output the converted third signal to the pixel circuit. The pixel circuit includes a switch for supplying the third signal to the control electrode of the drive transistor.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: December 17, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hisae Shimizu, Katsumi Abe
  • Patent number: 8599111
    Abstract: A driving circuit of a display element includes a current source circuit having a first transistor and a holding circuit for holding a gate voltage of the first transistor during a first period at an electric potential corresponding to a constant current to be supplied to the display element, and a control circuit including a second transistor connected in series to the current source circuit and connected in parallel to the display element and the capacitor element whose one terminal is connected to a gate of the second transistor and the other terminal is connected to a line, and controlling the light emission time of the display element by controlling the second transistor during a third period. A constant voltage is applied from the line during the first period. The gray-scale voltage is applied from the line during a second period, and the gate of the second transistor and the one terminal are short-circuited.
    Type: Grant
    Filed: March 8, 2007
    Date of Patent: December 3, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Katsumi Abe, Masafumi Sano, Ryo Hayashi, Hideya Kumomi