Patents by Inventor Katsumi Nakamura

Katsumi Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120273836
    Abstract: A semiconductor device includes: a transistor region including an IGBT having a gate electrode and an emitter electrode; a termination region placed around the transistor region; and an extraction region placed between the transistor and the termination region and extracting redundant carriers. A P-type layer is placed on an N-type drift layer in the extraction region. The P-type layer is connected to the emitter electrode. A dummy gate electrode is placed via an insulation film on the P-type layer. The dummy gate electrode is connected to the gate electrode. Life time of carriers in the termination region is shorter than life time of carriers in the transistor region and the extraction region.
    Type: Application
    Filed: December 13, 2011
    Publication date: November 1, 2012
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Koji Sadamatsu, Ze Chen, Katsumi Nakamura
  • Publication number: 20120267680
    Abstract: A stabilizing plate portion is formed in a region of a first main surface lying between first and second insulated gate field effect transistor portions. The stabilizing plate portion includes a first stabilizing plate arranged closest to the first insulated gate field effect transistor portion and a second stabilizing plate arranged closest to the second insulated gate field effect transistor portion. An emitter electrode is electrically connected to an emitter region of each of the first and second insulated gate field effect transistor portions, electrically connected to each of the first and second stabilizing plates, and arranged on the entire first main surface lying between the first and second stabilizing plates, with an insulating layer being interposed.
    Type: Application
    Filed: December 19, 2011
    Publication date: October 25, 2012
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Daisuke Oya, Katsumi Nakamura
  • Publication number: 20120228700
    Abstract: A semiconductor device includes: an N-type drift layer; a P-type anode layer on the N-type drift layer; a trench penetrating the P-type anode layer; a conductive substance embedded in the trench via an insulating film; and an N-type buffer layer between the N-type drift layer and the P-type anode layer and having impurity concentration which is higher than that of the N-type drift layer.
    Type: Application
    Filed: September 20, 2011
    Publication date: September 13, 2012
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Akito Nishii, Katsumi Nakamura
  • Publication number: 20110291223
    Abstract: A semiconductor device includes a semiconductor substrate having a diode active region and an edge termination region adjacent to each other, a first region of a first conductivity type in the diode active region, a second region of a second conductivity type, a third region of the first conductivity type in the edge termination region, and a fourth region of the second conductivity type. The first region and the third region share a drift region of the first conductivity type. The first region and the third region share a fifth region of the first conductivity type. The drift region in the third region is greater in number of crystal defects per unit volume than the drift region in the first region in order that the drift region in the third region is shorter in carrier lifetime than the drift region in the first region.
    Type: Application
    Filed: April 25, 2011
    Publication date: December 1, 2011
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Katsumi NAKAMURA
  • Publication number: 20110089360
    Abstract: A flow control valve in which corrosion is less likely to occur in the vicinity of a radial step portion in a gas passage of a housing and a method for manufacturing the same are provided. A flow control valve includes: a housing formed with a gas passage including a first cylinder member accommodating portion, a second cylinder member accommodating portion, and a radial step portion; a first cylinder member accommodated in the first cylinder member accommodating portion; a second cylinder member accommodated in the second cylinder member accommodating portion; and a valve body that is rotatably arranged inside the first cylinder member and the second cylinder member in the radial direction. The housing is formed of cast iron. At least surfaces of the first cylinder member and the second cylinder member are formed of a highly corrosion resistant material.
    Type: Application
    Filed: June 23, 2009
    Publication date: April 21, 2011
    Applicants: TAIHO KOGYO CO., LTD., HINO MOTORS, LTD.
    Inventors: Katsumi Nakamura, Shingo Iguchi, Yoshiki Ihara
  • Patent number: 7910987
    Abstract: A gate electrode <13> is provided to fill up a trench <300> while covering its opening. Assuming that WG represents the diameter (sectional width) of a head portion of the gate electrode <13> located upward beyond a P-type base layer <4> and an N+-type emitter diffusion layer <51>, WT represents the diameter (sectional width) of an inner wall of a linearly extending portion of the trench <300> and WC represents the distance between the boundary (the inner wall of the trench 300) between a gate oxide film <11> and the P-type base layer <4> and an end surface of the gate electrode <13> located upward beyond the trench <300> in a section of the trench <300>, relation of either WG?1.3·WT or WC?0.2 ?m holds between these dimensions.
    Type: Grant
    Filed: November 7, 2005
    Date of Patent: March 22, 2011
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Katsumi Nakamura
  • Publication number: 20100327313
    Abstract: A semiconductor device includes a semiconductor substrate and a MOS transistor. The semiconductor substrate has the first main surface and the second main surface facing each other. The MOS transistor includes a gate electrode (5a) formed on the first main surface side, an emitter electrode (11) formed on the first main surface side, and a collector electrode (12) formed in contact with the second main surface. An element generates an electric field in a channel by a voltage applied to the gate electrode (5a), and controls the current between the emitter electrode (11) and the collector electrode (12) by the electric field in the channel. The spike density in the interface between the semiconductor substrate and the collector electrode (12) is not less than 0 and not more than 3×108 unit/cm2. Consequently, a semiconductor device suitable for parallel operation is provided.
    Type: Application
    Filed: March 31, 2008
    Publication date: December 30, 2010
    Applicant: Mitsubishi Electric Corporation
    Inventor: Katsumi Nakamura
  • Publication number: 20100308446
    Abstract: The first layer is located on the first electrode and has the first conductivity type. The second layer is located on the first layer and has the second conductivity type. The third layer is located on the second layer. The second electrode is located on the third layer. The fourth layer is located between the second layer and the third layer, and has the second conductivity type. The third layer includes the first portion and the second portion. The first portion has the second conductivity type and has a peak value of an impurity concentration higher than the peak value of the impurity concentration in the second layer. The second portion has the first conductivity type. The area of the second portion accounts for not less than 20% and not more than 95% of the total area of the first portion and the second portion.
    Type: Application
    Filed: March 3, 2010
    Publication date: December 9, 2010
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Katsumi NAKAMURA
  • Publication number: 20100206406
    Abstract: A valve assembly in which, even if a housing corrodes, application of a radially inward compression force to a heat-resistant filter can be suppressed. The valve assembly includes the housing having a gas path and a valve shaft hole, a valve having a valve shaft movably inserted in the valve shaft hole and also having a valve element connected to the valve shaft, and tubular heat-resistant filters installed between the inner peripheral surface of the valve shaft hole and the outer peripheral surface of the valve shaft and capturing dust in exhaust gas. The housing is made of cast iron. The valve assembly further has reinforcement collars installed between the inner peripheral surface of the valve shaft hole and the outer peripheral surfaces of the heat-resistant filters. The reinforcement collars have higher rigidity than the heat-resistant filters. At least the surfaces of the reinforcement collars are made of a high corrosion resistant material having higher corrosion resistance than the cast iron.
    Type: Application
    Filed: October 1, 2008
    Publication date: August 19, 2010
    Applicant: TAIHO KOGYO CO., LTD.
    Inventors: Katsumi Nakamura, Shingo Iguchi
  • Patent number: 7560771
    Abstract: A semiconductor device of the present invention is provided with a power device which has a semiconductor substrate having a first main surface and a second main surface that are opposed to each other and an insulating gate structure on the first main surface side, wherein a main current flows between the first main surface and the second main surface, that is to say, is provided with an insulating gate type MOS transistor structure wherein the thickness (t1) of the semiconductor substrate is no less than 50 ?m and no greater than 250 ?m and a low ON voltage and a high withstanding capacity against breakdown are implemented in the first main surface. Thereby, a low ON voltage, the maintaining of the withstanding capacity against breakdown and the reduction of a switching loss on the high voltage side can be implemented.
    Type: Grant
    Filed: November 1, 2004
    Date of Patent: July 14, 2009
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Katsumi Nakamura, Shigeru Kusunoki, Hideki Nakamura
  • Patent number: 7426955
    Abstract: A core structure of a heat exchanger includes seat plates arranged opposite to each other with a predetermined space interposed between them and formed with tube holes, reinforcements connecting the seat plates at their end portions, tubes fixed at its both end portions by insertion into the tube holes, corrugated fins arranged between the tubes, and an upper and lower tanks attached to the seat plates. The tanks are connected by the tubes so that coolant flows between the tanks through the tubes. Tubes arranged at outermost positions of a core part among the tubes are inserted at its end portions by insert members so that the insert members can increase rigidity of the end positions of the outermost positioned tubes and ensure flowing of the coolant between the tanks through the outermost positioned tubes.
    Type: Grant
    Filed: February 4, 2005
    Date of Patent: September 23, 2008
    Assignee: Calsonic Kansei Corporation
    Inventors: Satoshi Kimura, Katsumi Nakamura, Shiro Nakajima
  • Patent number: 7392837
    Abstract: Tanks of a first heat exchanger have plane sections perpendicular to bottoms having a plurality of tube insertion holes formed therein. Tanks of a second heat exchanger with circular cross sections have bottoms having a plurality of tube insertion holes formed therein. The axes of the tube insertion holes of the first and second heat exchangers are held in parallel with each other. The second heat exchanger is in contact with the plane sections of the first heat exchanger tank.
    Type: Grant
    Filed: August 11, 2006
    Date of Patent: July 1, 2008
    Assignee: Calsonic Kansei Corporation
    Inventors: Kenji Makino, Hiroyasu Koizumi, Minoru Tsuchiya, Kunio Matsugi, Hiroshi Chikuma, Satoshi Ishihara, Makoto Tajima, Yoshiki Tsuda, Toshiaki Yamamoto, Hideki Kobayashi, Katsumi Nakamura, Junichi Enari, Mamoru Baba
  • Patent number: 7253031
    Abstract: A pin diode is formed by a p+ collector region, an n type buffer region, an n? region and an n+ cathode region. A trench is formed from the surface of n+ cathode region through n+ cathode region to reach n? region. An insulating film is formed along an inner wall surface of trench. A gate electrode layer is formed to oppose to the sidewall of n+ cathode region with insulating film interposed. A cathode electrode is formed to be electrically connected to n+ cathode region. An anode electrode is formed to be electrically connected to p+ collector region. The n+ cathode region is formed entirely over the surface between trenches extending parallel to each other. Thus, a power semiconductor device in which gate control circuit is simplified and which has good on property can be obtained.
    Type: Grant
    Filed: November 2, 2004
    Date of Patent: August 7, 2007
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tetsuo Takahashi, Katsumi Nakamura, Tadaharu Minato, Masana Harada
  • Patent number: 7250345
    Abstract: A semiconductor device of the present invention is provided with a power device which has a semiconductor substrate having a first main surface and a second main surface that are opposed to each other and an insulating gate structure on the first main surface side, wherein a main current flows between the first main surface and the second main surface, that is to say, is provided with an insulating gate type MOS transistor structure wherein the thickness (t1) of the semiconductor substrate is no less than 50 ?m and no greater than 250 ?m and a low ON voltage and a high withstanding capacity against breakdown are implemented in the first main surface. Thereby, a low ON voltage, the maintaining of the withstanding capacity against breakdown and the reduction of a switching loss on the high voltage side can be implemented.
    Type: Grant
    Filed: November 1, 2004
    Date of Patent: July 31, 2007
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Katsumi Nakamura, Shigeru Kusunoki, Hideki Nakamura
  • Patent number: 7229882
    Abstract: A semiconductor device of the present invention includes an MOSFET which has a stacked gate insulation film formed of at least two types of insulation films, that is, a thermal oxide film provided on a semiconductor substrate and a CVD oxide film provided nearer to a gate electrode than thermal oxide film. The stacked insulation film is provided so that the ratio of the thickness of the CVD oxide film to that of the entire stacked gate insulation film is at least 20%. By such a structure, the gate insulation film thickness is kept uniform. Further, nitrogen may be segregated at an interface between the thermal oxide film and a semiconductor substrate and an interface between the gate electrode and the CVD oxide film. Thus, the occurrence of interface states is prevented between the gate insulation film and the semiconductor substrate as well as between the gate insulation film and the gate electrode.
    Type: Grant
    Filed: December 7, 2004
    Date of Patent: June 12, 2007
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Katsumi Nakamura
  • Patent number: 7180131
    Abstract: A semiconductor device of the present invention includes an MOSFET which has a stacked gate insulation film formed of at least two types of insulation films, that is, a thermal oxide film provided on a semiconductor substrate and a CVD oxide film provided nearer to a gate electrode than thermal oxide film. The stacked insulation film is provided so that the ratio of the thickness of the CVD oxide film to that of the entire stacked gate insulation film is at least 20%. By such a structure, the gate insulation film thickness is kept uniform. Further, nitrogen may be segregated at an interface between the thermal oxide film and a semiconductor substrate and an interface between the gate electrode and the CVD oxide film. Thus, the occurrence of interface states is prevented between the gate insulation film and the semiconductor substrate as well as between the gate insulation film and the gate electrode.
    Type: Grant
    Filed: December 7, 2004
    Date of Patent: February 20, 2007
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Katsumi Nakamura
  • Publication number: 20060278366
    Abstract: Tanks of a first heat exchanger have plane sections perpendicular to bottoms having a plurality of tube insertion holes formed therein. Tanks of a second heat exchanger with circular cross sections have bottoms having a plurality of tube insertion holes formed therein. The axes of the tube insertion holes of the first and second heat exchangers are held in parallel with each other. The second heat exchanger is in contact with the plane sections of the first heat exchanger tank.
    Type: Application
    Filed: August 11, 2006
    Publication date: December 14, 2006
    Inventors: Kenji Makino, Hiroyasu Koizumi, Minoru Tsuchiya, Kunio Matsugi, Hiroshi Chikuma, Satoshi Ishihara, Makoto Tajima, Yoshiki Tsuda, Toshiaki Yamamoto, Hideki Kobayashi, Katsumi Nakamura, Junichi Enari, Mamoru Baba
  • Patent number: 7115944
    Abstract: A semiconductor device of the present invention has an insulating gate type field effect transistor portion having an n-type emitter region (3) and an n? silicon substrate (1), which are opposed to each other sandwiching a p-type body region (2), as well as a gate electrode (5a) which is opposed to p-type body region (2) sandwiching a gate insulating film (4a), and also has a stabilizing plate (5b). This stabilizing plate (5b) is made of a conductor or a semiconductor, is opposed to n? silicon substrate (1) sandwiching an insulating film (4, 4b) for a plate, and forms together with n? silicon substrate (1), a capacitor. This stabilizing plate capacitor formed between stabilizing plate (5b) and n? silicon substrate (1) has a capacitance greater than that of the gate-drain capacitor formed between gate electrode (5a) and n? silicon substrate (1).
    Type: Grant
    Filed: August 16, 2005
    Date of Patent: October 3, 2006
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Katsumi Nakamura, Shigeru Kusunoki, Hideki Nakamura
  • Patent number: 7108049
    Abstract: Tanks of a first heat exchanger have plane sections perpendicular to bottoms having a plurality of tube insertion holes formed therein. Tanks of a second heat exchanger with circular cross sections have bottoms having a plurality of tube insertion holes formed therein. The axes of the tube insertion holes of the first and second heat exchangers are held in parallel with each other. The second heat exchanger is in contact with the plane sections of the first heat exchanger tank.
    Type: Grant
    Filed: November 3, 2004
    Date of Patent: September 19, 2006
    Assignee: Calsonic Kansei Corporation
    Inventors: Kenji Makino, Hiroyasu Koizumi, Minoru Tsuchiya, Kunio Matsugi, Hiroshi Chikuma, Satoshi Ishihara, Makoto Tajima, Yoshiki Tsuda, Toshiaki Yamamoto, Hideki Kobayashi, Katsumi Nakamura, Junichi Enari, Mamoru Baba
  • Patent number: 7107661
    Abstract: The present invention provides a method and apparatus of recycling a printed circuit board for separating and retrieving a metallic material, which includes a printed metallic material, and an insulating material, both composing the printed circuit board. Both the metallic material and the insulating material, which are separated and retrieved, are possible for recycling. In the method for recycling the printed circuit board, hot filtration equipment 4a and resin-metal separation equipment 51 are used in hot filtration process P400. The waste printed circuit board 1 is heated and force-filtered so that only the insulating material 1a pass through the filter. Then, the insulating material 1a and the metallic material 1b are separated and retrieved. It is preferred that the insulating body base 23 of the printed circuit board 100 as the waste printed circuit board is made of thermoplastic resin or a mixture of thermoplastic resin and inorganic loading material.
    Type: Grant
    Filed: December 16, 2002
    Date of Patent: September 19, 2006
    Assignee: Denso Corporation
    Inventors: Rikiya Kamimura, Katsumi Nakamura, Kouji Kond, Atsusi Sakaida, Toshihisa Taniguchi