Abstract: There is provided a semiconductor device having, on a silicon substrate, a gate insulating film and a gate electrode in this order; wherein the gate insulating film comprises a nitrogen containing high-dielectric-constant insulating film which has a structure in which nitrogen is introduced into metal oxide or metal silicate; and the nitrogen concentration in the nitrogen containing high-dielectric-constant insulating film has a distribution in the direction of the film thickness; and a position at which the nitrogen concentration in the nitrogen containing high-dielectric-constant insulating film reaches the maximum in the direction of the film thickness is present in a region at a distance from the silicon substrate. A manufacturing method of a semiconductor device comprising the step of making the introduction of nitrogen by irradiating the high-dielectric-constant insulating film which is made of metal oxide or metal silicate, with a nitrogen containing plasma, is also provided.

Abstract: An SRAM device including a memory cell, the memory cell having two access transistors connected to a word line, and a flip-flop circuit having complementary transistors, the transistor being a field effect transistor having a standing semiconductor thin plate, a logic signal input gate and a bias voltage input gate, the gates sandwiching the semiconductor thin plate and being electrically separated from each other, a first bias voltage is applied to bias voltage input gates of the transistors of the memory cells in a row including a memory cell being accessed for reading or writing, and a second bias voltage is applied to the bias voltage input gates of the transistors of the memory cells in a row including a memory cell under memory holding operation.

Abstract: A static random access memory (SRAM) cell includes a first to a fourth semiconductor thin plate that are provided on a substrate and are arranged parallel to each other. On respective semiconductor thin plates, there is formed a first four-terminal double-gate field effect transistor (FET) with a first conductivity type, a second and a third four-terminal double-gate FET which are connected in series with each other and have a second conductivity type, a fourth and a fifth four-terminal double-gate FET which are connected in series with each other and have the second conductivity type, and a sixth four-terminal double-gate FET with the first conductivity type. The third and the fourth four-terminal double-gate FETs form select transistors, and the first, second, fifth and sixth four-terminal double-gate FETs form a complementary metal-oxide-semiconductor (CMOS) inverter.

Abstract: A field-effect transistor comprising a movable gate electrode that suppresses a leakage current from the gate electrode, and has a large current drivability and a low leakage current between a source and a drain. The field-effect transistor comprises: an insulating substrate; a semiconductor layer of triangle cross-sectional shape formed on the insulating substrate, having a gate insulation film on a surface, and forming a channel in a lateral direction; fixed electrodes that are arranged adjacent to both sides of the semiconductor layer and in parallel to the semiconductor layer, each of the electrodes having an insulation film on a surface; a source/drain formed at the end part of the semiconductor layer; and the movable gate electrode formed above the semiconductor layer and the fixed electrodes with a gap.

Abstract: Provided is a method for fabricating a nano-wire field effect transistor including steps of: preparing an SOI substrate having a (100) surface orientation, and nano-wire field effect transistor where two triangular columnar members configuring the nano-wires and being made of a silicon crystal layer are arranged one above the other on an SOI substrate having a (100) surface such a way that the ridge lines of the triangular columnar members face via an insulator; processing the silicon crystal configuring the SOI substrate into a standing plate-shaped member having a rectangular cross-section; and as a nanowire, processing the silicon crystal by orientation dependent wet etching into a shape where two triangular columnar members are arranged one above the other in such a way that the ridge lines of the triangular columnar members configuring the nano-wires face through the ridge lines thereof, and an integrated circuit including the nano-wire field effect transistor.

Abstract: An object of the present invention is to provide a semiconductor device which comprises a barrier film having a high etching selection ratio of the interlayer insulating film thereto, a good preventive function against the Cu diffusion, a low dielectric constant and excellent adhesiveness to the Cu interconnection and a manufacturing method thereof.

Abstract: Provided is a method for fabricating a nano-wire field effect transistor including steps of: preparing a nano-wire field effect transistor including two columnar members made of a silicon crystal configuring a nano-wire on a substrate are arranged on a substrate in parallel and one above the other, and an SOI substrate having a (100) surface orientation; processing a silicon crystal layer configuring the SOI substrate into a standing plate-shaped member having a rectangular cross-section; processing the silicon crystal by orientation dependent wet etching and thermal oxidation into a shape where two triangular columnar members are arranged one above the other with a spacing from each other as to face along the ridge lines of the triangular columnar members; and processing the triangular columnar member into a circular columnar member configuring a nano-wire by hydrogen-annealing or a thermal oxidation; and an integrated circuit including the transistor.

Abstract: An SRAM device comprising a memory cell, the memory cell comprising two access transistors connected to a word line, and a flip-flop circuit having complementary transistors, the transistor being a field effect transistor having a standing semiconductor thin plate, a logic signal input gate and a bias voltage input gate, the gates sandwiching the semiconductor thin plate and being electrically separated from each other, and wherein a first bias voltage is applied to bias voltage input gates of the transistors of the memory cells in a row including a memory cell being accessed for reading or writing such that the threshold voltage on the logic signal input gates of the transistors is set at low level, and a second bias voltage is applied to the bias voltage input gates of the transistors of the memory cells in a row including a memory cell under memory holding operation such that the threshold voltage on the logic signal input gates of the transistors is set at high level.

Abstract: In an SRAM cell including a first to a fourth semiconductor thin plates which stand on a substrate and are arranged in parallel to each other, on each of the four semiconductor thin plates being formed a first four-terminal double-gate FET with a first conductivity type; a second and a third four-terminal double-gate FETs which are connected in series with each other and have a second conductivity type; a fourth and a fifth four-terminal double-gate FETs which are connected in series with each other and have the second conductivity type; a sixth four-terminal double-gate FET with the first conductivity type, wherein the third and the fourth four-terminal double-gate FETs form select transistors, and the first, the second, the fifth and the sixth four-terminal double-gate FETs form a CMOS inverter, logic signal input gates of the first and the sixth four-terminal double-gate FETs are arranged on the side facing the second and the third semiconductor thin plates, respectively, while threshold voltage control ga

Abstract: A field-effect transistor comprising a movable gate electrode that suppresses a leakage current from the gate electrode, and has a large current drivability and a low leakage current between a source and a drain. The field-effect transistor comprises: an insulating substrate; a semiconductor layer of triangle cross-sectional shape formed on the insulating substrate, having a gate insulation film on a surface, and forming a channel in a lateral direction; fixed electrodes that are arranged adjacent to both sides of the semiconductor layer and in parallel to the semiconductor layer, each of the electrodes having an insulation film on a surface; a source/drain formed at the end part of the semiconductor layer; and the movable gate electrode formed above the semiconductor layer and the fixed electrodes with a gap.

Abstract: The dielectric constants of SiC and SiCN that are currently the subjects of much investigation are both 4.5 to 5 or so and that of SiOC, 2.8 to 3.0 or so. With further miniaturization of the interconnection size and the spacing of interconnections brought about by the reduction in device size, there have arisen strong demands that dielectric constants should be further reduced. Furthermore, because the etching selection ratio of SiOC to SiCN as well as that of SiOC to SiC are small, if SiCN or SiC is used as the etching stopper film, the surface of the metal interconnection layer may be oxidized at the time of photoresist removal, which gives rise to a problem of high contact resistance.

Abstract: With a capacitor C inserted in an interstage portion of multiple stages of amplifier circuits, a high pass filter is generated by the capacitor C and an input impedance |Z| of an amplifier circuit in the next stage. Accordingly, frequency components lower than a cutoff frequency fc are cut off, and therefore are not transferred to the subsequent stage. However, radio frequency components higher than or equal to a fundamental wave component determined by an envelope of a radio frequency signal intermittently transmitted can be transferred. Consequently, transfer of DC offset potentials can be cut off, and noise, such as flicker noise, having great power in a DC or near-DC zone can be effectively cut off. Thereby, the S/N ratio, detection sensitivity, and detection accuracy can be improved.

Abstract: For the purpose of removing an oxide film on the surface of a varying metal electroconductive material used for wiring in a semiconductor device without inflicting damage on a peripheral structure, the oxide film formed on the surface of a metal electroconductive region 12 is subjected to a reducing treatment that is effected by placing the metal electroconductive region 12 in a reducing treatment chamber 22, causing an oxygen pump 30 to introduce into the reducing treatment chamber 22 an inert gas having at least an oxygen partial pressure thereof suppressed to 1×10?13 atmosphere or less and heating the metal electroconductive region 12 with a heating device 25.

Abstract: An object of the present invention is to provide a semiconductor device which comprises a barrier film having a high etching selection ratio of the interlayer insulating film thereto, a good preventive function against the Cu diffusion, a low dielectric constant and excellent adhesiveness to the Cu interconnection and a manufacturing method thereof.

Abstract: An object of the present invention is to provide a semiconductor device which comprises a barrier film having a high etching selection ratio of the interlayer insulating film thereto, a good preventive function against the Cu diffusion, a low dielectric constant and excellent adhesiveness to the Cu interconnection and a manufacturing method thereof.

Abstract: A semiconductor device has an MIS (metal-insulating film-semiconductor) structure, and a film mainly containing Al, O, and N atoms is used on a semiconductor. Alternatively, a semiconductor device has an MIS structure, and a film mainly containing Al, O, and N atoms is provided as a gate insulating film on a channel region between a source and a drain. Characteristics required of a gate insulating film of a 0.05 ?m-gate-length-generation semiconductor transistor are satisfied. In particular, no fixed charge is included in the film, and impurity diffusion is reduced.

Abstract: The dielectric constants of SiC and SiCN that are currently the subjects of much investigation are both 4.5 to 5 or so and that of SiOC, 2.8 to 3.0 or so. With further miniaturization of the interconnection size and the spacing of interconnections brought about by the reduction in device size, there have arisen strong demands that dielectric constants should be further reduced. Furthermore, because the etching selection ratio of SiOC to SiCN as well as that of SiOC to SiC are small, if SiCN or SiC is used as the etching stopper film, the surface of the metal interconnection layer may be oxidized at the time of photoresist removal, which gives rise to a problem of high contact resistance.

Abstract: A start signal output circuit having an RF/DC conversion circuit to which radio frequency power (RF) of specified frequency is inputted and from which a direct current potential (DC) is outputted, comprises a detection/amplification circuit 210 which includes a voltage doubler wave-detector circuit 10 configured including a sensing diode Q1 (Tr34) for sensing the RF power, a differential amplifier including differential pair transistors Tr31 and Tr32, and a current mirror circuit. A base current of one Tr31 of the differential pair transistors is brought into substantial agreement with a DC component of a current flowing through the sensing diode Q1 (Tr34). A total of currents flowing through the differential pair transistors Tr31 and Tr32 is regulated to a substantially constant value by the current mirror circuit. Thus, the start signal output circuit which is small in size, high in sensitivity and low in power consumption can be realized.

Abstract: With a capacitor C inserted in an interstage portion of multiple stages of amplifier circuits, a high pass filter is generated by the capacitor C and an input impedance |Z| of an amplifier circuit in the next stage. Accordingly, frequency components lower than a cutoff frequency fc are cut off, and therefore are not transferred to the subsequent stage. However, radio frequency components higher than or equal to a fundamental wave component determined by an envelope of a radio frequency signal intermittently transmitted can be transferred. Consequently, transfer of DC offset potentials can be cut off, and noise, such as flicker noise, having great power in a DC or near-DC zone can be effectively cut off. Thereby, the S/N ratio, detection sensitivity, and detection accuracy can be improved.

Abstract: The invention provides an insulator having a main component of silicon dioxide, wherein the insulator includes at least one kind of organic polymer such as benzene nucleuses distributed therein in order to reduce a dielectric constant thereof as well as a method of forming the same.