Patents by Inventor Kazuhiko Sato

Kazuhiko Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090109258
    Abstract: An apparatus includes a liquid ejecting head capable of ejecting liquid from a plurality of ejection ports by driving a plurality of ejection energy generation elements corresponding to the plurality of ejection portions. The apparatus includes a wiping mechanism capable of wiping an ejection port face in which a plurality of ejection ports is arranged in the liquid ejecting head. The ink ejection from the plurality of ejection ports is performed in a manner of a plurality of divisions. A time interval from a last wiping to a next wiping is adjusted according to an interval of the ejection energy generating elements corresponding to an adjacent ejection port.
    Type: Application
    Filed: May 27, 2008
    Publication date: April 30, 2009
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Masaki Nitta, Katsushi Hara, Jun Shimoji, Kazuhiko Sato, Hiroaki Kato, Yasuyuki Takanaka, Shuuichi Masuda, Toshiaki Yamaguchi
  • Patent number: 7522697
    Abstract: The present invention is to easily associate X-ray projection data and scanning table z-direction coordinate information with each other. Using set parameters of the operations of a scanning gantry and a scanning table, the association of the X-ray projection data and scanning table z-direction coordinate information with each other is executed. Thereafter, image reconstruction is carried out based on the X-ray projection data to obtain a tomographic image. The operation set parameters are stored as part of the X-ray projection data. Alternatively, they are collectively stored even in the case of files separate from the X-ray projection data.
    Type: Grant
    Filed: February 28, 2007
    Date of Patent: April 21, 2009
    Assignee: GE Medical Systems Global Technology Company, LLC
    Inventors: Yusuke Satta, Kazuhiko Sato, Akihiko Nishide, Akira Hagiwara
  • Patent number: 7503638
    Abstract: An ink jet printing apparatus is capable of maintaining the ink ejection performance in good condition at all times even when a large number of ink droplets are used to form an image. To this end, the ink jet printing apparatus includes a wiping member to wipe off ink adhering to ejection ports and surrounding areas of the print head; and a control unit to count the number of ink droplets ejected from the ejection ports and change processing associated with a wiping-based recovery operation using the wiping member according to the counted number of ink droplets ejected.
    Type: Grant
    Filed: February 24, 2006
    Date of Patent: March 17, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuhiko Sato, Taku Yokozawa, Yuhei Oikawa
  • Publication number: 20090030217
    Abstract: There is provided a novel method for producing a bifunctional epoxy monomer which comprises reacting diolefin with a hydrogen peroxide aqueous solution, in the presence of molybdenum or tungsten oxide as a catalyst to selectively epoxidize a double bound at a specific position. The bifunctional epoxy monomers provided by the present invention are substances widely used in various industrial fields such as chemical industry, as materials for resist materials (particularly solder resist materials), and intermediates of agrochemicals and medicines, and various polymers such as plasticizers, adhesives and coating resins.
    Type: Application
    Filed: May 16, 2006
    Publication date: January 29, 2009
    Applicants: SHOWA DENKO K.K., National Institute of Advanced Industrial Science and Technology
    Inventors: Hiroshi Uchida, Yuko Sakata, Ritsuko Hirakawa, Kazuhiko Sato, Masanori Ookoshi
  • Publication number: 20080291740
    Abstract: A semiconductor memory device includes a memory cell array, word lines each of which connects the control gates of the memory cells on the same row together in the memory cell array, a row decoder which selects a word line, and applies a voltage to the selected word line, and a voltage generator which generates a boosted voltage, and outputs the boosted voltage as the voltage, the voltage generator includes a comparator which compares a first voltage with a second voltage, and outputs a comparison result signal, a constant current circuit which generates a first control signal in accordance with the comparison result signal, a first delay circuit which generates a second control signal by delaying the comparison result signal, and a charge pump circuit which generates the boosted voltage in response to the first and second control signals.
    Type: Application
    Filed: October 24, 2007
    Publication date: November 27, 2008
    Inventors: Kazuhiko SATO, Hidetoshi Saito, Hiyotaka Uchigane
  • Publication number: 20080277794
    Abstract: A semiconductor IC device which includes a circuit region and a peripheral region on a main surface of a semiconductor substrate, a first insulating film formed over the main surface, external terminals arranged in the peripheral region and formed over the first insulating film, a conductive guard ring formed over the first insulating film and provided around the external terminals, and second insulating films formed in the internal region and the peripheral region, the second insulating film in the peripheral region is formed over the first insulating film and over the guard ring and is contacting the external terminals, the second insulating films of the circuit region and that of the peripheral region are separately formed and are isolated from each other. Separate second insulating film may be formed over the wirings of one or more of existing wiring levels of the semiconductor device.
    Type: Application
    Filed: June 12, 2008
    Publication date: November 13, 2008
    Inventors: Ken Uchikoshi, Naokatsu Suwanai, Atsushi Tachigami, Katsuhiko Hotta, Masashi Sahara, Kazuhiko Sato
  • Publication number: 20080258504
    Abstract: A structure of a rear part in a vehicle body. A rear glass window is provided at a rear end part of a roof of the vehicle, and the rear glass window is inclined downward toward the back of the vehicle. A trunk compartment is formed from a part below an attachment part of the rear glass window to a rear end part of the vehicle body. A trunk lid is attached to a lower edge of the attachment part of the rear glass window in a manner such that the trunk lid can be opened and closed freely. A visual window for observing a field on the back side of the vehicle body is provided in a wall of the trunk lid, the wall being positioned on the back side of the vehicle body. A partition wall having an interior window may be provided below the rear glass window.
    Type: Application
    Filed: December 20, 2007
    Publication date: October 23, 2008
    Inventors: Hideto Sakane, Kazuhiko Sato, Tohru Ono, Shinichi Ibato, Tetsuya Higurashi
  • Patent number: 7441166
    Abstract: There is provided a testing apparatus including: a pattern generator that generates an address signal and a data signal to be supplied to a plurality of memories under test and an expectation signal; a plurality of logic comparators that generate fail data when an output signal output from the plurality of memories under test and the expectation signal are not identical with each other; a plurality of fail memories that store the fail data generated from the plurality of logic comparators; a plurality of memory controllers that generate bad address information showing a bad address in the memory under test based on the fail data stored on the plurality of fail memories; a plurality of universal buffer memories that store the bad address information generated from the plurality of memory controllers; and a plurality of bad information writing sections that concurrently write bad information into the bad address in the plurality of memories under test, which is shown by the bad address information stored on the
    Type: Grant
    Filed: September 1, 2006
    Date of Patent: October 21, 2008
    Assignee: Advantest Corporation
    Inventors: Masuhiro Yamada, Kazuhiko Sato, Toshimi Ohsawa
  • Patent number: 7400046
    Abstract: A semiconductor IC device which includes a circuit region and a peripheral region on a main surface of a semiconductor substrate, a first insulating film formed over the main surface, external terminals arranged in the peripheral region and formed over the first insulating film, a conductive guard ring formed over the first insulating film and provided around the external terminals, and second insulating films formed in the internal region and the peripheral region, the second insulating film in the peripheral region is formed over the first insulating film and over the guard ring and is contacting the external terminals, the second insulating films of the circuit region and that of the peripheral region are separately formed and are isolated from each other. Separate second insulating film may be formed over the wirings of one or more of existing wiring levels of the semiconductor device.
    Type: Grant
    Filed: May 31, 2007
    Date of Patent: July 15, 2008
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Ken Uchikoshi, Naokatsu Suwanai, Atsushi Tachigami, Katsuhiko Hotta, Masashi Sahara, Kazuhiko Sato
  • Patent number: 7385096
    Abstract: A process for producing a 1,2-diol through the reaction of an olefin with hydrogen peroxide. The process is highly efficient and highly selective and catalyst recovery and reuse are easy. It does not use any strong acid or strong base causative of apparatus corrosion. The process for producing a 1,2-diol is characterized by reacting an olefin with hydrogen peroxide in the presence of a polymer having a sulfo group.
    Type: Grant
    Filed: January 23, 2003
    Date of Patent: June 10, 2008
    Assignees: Japan Science and Technology Agency, National Institute of Advanced Industrial Science and Technology
    Inventors: Masato Tanaka, Kazuhiko Sato, Yoko Usui
  • Publication number: 20080106204
    Abstract: In a headlamp luminance controlling device, a CPU 21 first decides a luminance factor D based on a state of each switch 10 to switch 12 and a signal from a sensor 13. The CPU 21 determines an initial value of a PWM duty ratio S from the luminance factor D with a load current Ap as a default value (rated current A0). The CPU 21 starts the initial driving of a headlamp HL using the duty ratio S. The CPU 21 then determines the luminance factor D based on the state of each switch 10 to switch 12 and the signal from the sensor 13. Next, the CPU 21 determines the PWM duty ratio S based on the luminance factor D and the load current Ap detected by the headlamp current detector 23. The CPU 21 drives the headlamp HL using the PWM duty ratio S.
    Type: Application
    Filed: October 23, 2007
    Publication date: May 8, 2008
    Applicants: OMRON CORPORATION, HONDA MOTOR CO., LTD.
    Inventors: Kazuhiko Sato, Hirohito Miyazaki, Izumi Yamada, Akihiro Kakamu, Masaru Ishizaki
  • Patent number: 7356435
    Abstract: There is provided a semiconductor test apparatus including: a first waveform generating means that generates a common pattern waveform corresponding to common information common to each of a plurality of semiconductor devices; a plurality of second waveform generating means that generates individual pattern waveforms corresponding to a plurality of individual information individually prepared in response to each of the plurality of semiconductor devices; and a waveform switching unit that selectively performs an operation of inputting the common pattern waveform generated from the first waveform generating means in common and an operation of inputting the individual pattern waveforms respectively generated from the plurality of second waveform generating means individually, into each of the plurality of semiconductor devices.
    Type: Grant
    Filed: December 16, 2005
    Date of Patent: April 8, 2008
    Assignee: Advantest Corporation
    Inventors: Kazuhiko Sato, Sae-Bum Myung, Hiroyuki Chiba
  • Publication number: 20080031407
    Abstract: The present invention is to easily associate X-ray projection data and scanning table z-direction coordinate information with each other. Using set parameters of the operations of a scanning gantry and a scanning table, the association of the X-ray projection data and scanning table z-direction coordinate information with each other is executed. Thereafter, image reconstruction is carried out based on the X-ray projection data to obtain a tomographic image. The operation set parameters are stored as part of the X-ray projection data. Alternatively, they are collectively stored even in the case of files separate from the X-ray projection data.
    Type: Application
    Filed: February 28, 2007
    Publication date: February 7, 2008
    Inventors: Yusuke Satta, Kazuhiko Sato, Akihiko Nishide, Akira Hagiwara
  • Patent number: 7303986
    Abstract: An insulating portion of the respective wiring layers for a semiconductor device is constituted of insulating films. The one insulating film is made of a material whose conductivity is higher than that of the other insulating film that is made of an ordinary silicon oxide film and is provided in contact with the wiring. An electric charge accumulated in the wiring generated in the course of manufacture of the semiconductor device is discharged through the one insulating film at a stage where a charge accumulation in the wiring is low. This permits the heat release value generated through the discharge to be suppressed to a low level, and the short-circuiting-failure between adjacent wirings to be suppressed or prevented.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: December 4, 2007
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Ken Uchikoshi, Naokatsu Suwanai, Atsushi Tachigami, Katsuhiko Hotta, Masashi Sahara, Kazuhiko Sato
  • Publication number: 20070228574
    Abstract: A semiconductor IC device which includes a circuit region and a peripheral region on a main surface of a semiconductor substrate, a first insulating film formed over the main surface, external terminals arranged in the peripheral region and formed over the first insulating film, a conductive guard ring formed over the first insulating film and provided around the external terminals, and second insulating films formed in the internal region and the peripheral region, the second insulating film in the peripheral region is formed over the first insulating film and over the guard ring and is contacting the external terminals, the second insulating films of the circuit region and that of the peripheral region are separately formed and are isolated from each other. Separate second insulating film may be formed over the wirings of one or more of existing wiring levels of the semiconductor device.
    Type: Application
    Filed: May 31, 2007
    Publication date: October 4, 2007
    Inventors: Ken Uchikoshi, Naokatsu Suwanai, Atsushi Tachigami, Katsuhiko Hotta, Masashi Sahara, Kazuhiko Sato
  • Publication number: 20070215117
    Abstract: In an electromagnetic fuel injection valve including a resin molded part of a synthetic resin which integrally has a coupler to which a connecting terminal connecting to a coil of a coil assembly is faced, and in which at least part of the solenoid housing is embedded, the resin molded part (7) is formed by a first resin molded layer (7a) which is formed of a synthetic resin with mixture of glass fibers to cover at least part of the solenoid housing (25) and form at least part of a coupler (40), and a second resin molded layer (7b) which is formed of thermoplastic polyester elastomer with mixture of glass fibers excluded to cover the first resin molded layer (7a). This makes it possible to effectively suppress occurrence of operation sound while securing sufficient strength for obtaining reliability of an electrical connecting portion and to make the fuel injection valve compact.
    Type: Application
    Filed: February 25, 2005
    Publication date: September 20, 2007
    Inventors: Daisuke Matsuo, Kazuhiko Sato, Tomoyuki Ohmura, Kenichi Sato, Osamu Hinata
  • Patent number: 7264303
    Abstract: As a wrist portion of an application robot equipped with a plurality of application nozzles moves in a predetermined operation pattern, viscous damping and constraining materials having different properties are simultaneously injected from the application nozzles so that immediately after the damping material is injected from the preceding application nozzle, as viewed in the moving direction and applied to a vehicle body panel as an underlayer material, the constraining material having different property is injected from the succeeding application nozzle, as viewed in the moving direction, and applied as an overlayer material over the underlayer material.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: September 4, 2007
    Assignee: Mitsubishi Jidosha Kogyo Kabushiki Kaisha
    Inventors: Hideki Fukudome, Ryo Ashikawa, Hiroshi Matsuda, Kazuhiko Sato, Makoto Ohkubo
  • Patent number: 7257753
    Abstract: A semiconductor testing apparatus capable of reducing time required for testing or repairing a plurality of semiconductor devices. The semiconductor testing apparatus performs test for a plurality of DUT in parallel and performs repair for the plurality of DUT in parallel. For this, the apparatus includes an ALPG, a PDS, an AFM, a driver pin processor, an IO pin processor, a driver channel, and an IO channel. The IO pin processor has a plurality of sub-FC units. When test is performed simultaneously for a plurality of DUT, an individual pattern waveform is generated corresponding to individual information.
    Type: Grant
    Filed: November 14, 2002
    Date of Patent: August 14, 2007
    Assignee: Advantest Corporation
    Inventor: Kazuhiko Sato
  • Publication number: 20070067685
    Abstract: There is provided a testing apparatus including: a pattern generator that generates an address signal and a data signal to be supplied to a plurality of memories under test and an expectation signal; a plurality of logic comparators that generate fail data when an output signal output from the plurality of memories under test and the expectation signal are not identical with each other; a plurality of fail memories that store the fail data generated from the plurality of logic comparators; a plurality of memory controllers that generate bad address information showing a bad address in the memory under test based on the fail data stored on the plurality of fail memories; a plurality of universal buffer memories that store the bad address information generated from the plurality of memory controllers; and a plurality of bad information writing sections that concurrently write bad information into the bad address in the plurality of memories under test, which is shown by the bad address information stored on the
    Type: Application
    Filed: September 1, 2006
    Publication date: March 22, 2007
    Applicant: Advantest Corporation
    Inventors: Masuhiro Yamada, Kazuhiko Sato, Toshimi Ohsawa
  • Publication number: 20070066050
    Abstract: An insulating portion of the respective wiring layers for a semiconductor device is constituted of insulating films. The one insulating film is made of a material whose conductivity is higher than that of the other insulating film that is made of an ordinary silicon oxide film and is provided in contact with the wiring. An electric charge accumulated in the wiring generated in the course of manufacture of the semiconductor device is discharged through the one insulating film at a stage where a charge accumulation in the wiring is low. This permits the heat release value generated through the discharge to be suppressed to a low level, and the short-circuiting-failure between adjacent wirings to be suppressed or prevented.
    Type: Application
    Filed: November 21, 2006
    Publication date: March 22, 2007
    Inventors: Ken Uchikoshi, Naokatsu Suwanai, Atsushi Tachigami, Katsuhiko Hotta, Masashi Sahara, Kazuhiko Sato