Abstract: A level shifter 13 is provided for each of SR flip flops F1 constituting a shift register 11. The level shifter 13 increases a voltage of a clock signal CK. This arrangement reduces a distance for transmitting a clock signal whose voltage has been increased, as compared with a construction in which a voltage of a clock signal is increased by a single level shifter and the signal is transmitted to each of the flip flops; consequently, a load capacity of the level shifter can be smaller. Furthermore, each of the level shifters is operated during a pulse output of the previous level shifter 13, and the operation is suspended at the end of the pulse output. Thus, the level shifters 13 can operate only when it is necessary to apply a clock signal CK to the corresponding SR flip flop F1. As a result, even when an amplitude of a clock signal is small, it is possible to reduce power consumption of the shift resister under normal operation.

Abstract: Conventionally, no provision has been made to perform an update during a period of time during which the user does not use a communications terminal. Frequently used programs and data need be updated frequently, and infrequently used programs and data need not be frequently updated. Therefore, it is preferred that an update be performed depending on the frequency of use. No provision has been made heretofore to perform an update in accordance with frequency of use. To solve these problems, the communications terminal has a communication section for communicating with a server via a communication network, a storage section for storing a program, a control section for controlling the communication section and storage section, and a usage storage section for storing the usage status of the communications terminal, and a program stored in the storage section is updated in accordance with the usage status stored in the usage storage section.

Abstract: A shift register circuit includes a plurality of latch circuits connected in series to sequentially transfer a pulse signal ST from one to another, a clock signal line transmitting a clock signal CLK, and a plurality of switching circuits performing electrical connection and disconnection between the clock signal line and the plurality of latch circuits. Upon turning on the shift register, at least one of the switching circuits electrically disconnects at least one of the latch circuits from the clock signal line. During an initialization period immediately after power has been turned on, the frequency of the clock signal CLK is lower than in a normal operation period and gradually increases toward the frequency used in the normal operation period.

Abstract: A CMOS logical circuit comprises two electric current paths each of which has circuits consisting of n-type and p-type transistors. In a circuit consisting of n-type or p-type transistors, one electric current path is provided with a circuit having the same construction as that of a circuit having an n-type transistor of a CMOS logical circuit outputting a logical operation result similar to that of this logical circuit, and the other electric current path is provided with a circuit having the same construction as that of a circuit having a p-type transistor of the CMOS logical circuit outputting a logical operation result similar to that of this logical circuit. In another circuit consisting of the other channel type, a gate electrode of the transistor provided on the one electric current path and that of the transistor provided on the other electric current path are connected to drain electrodes of the counterparts.

Abstract: A digital-to-analog conversion circuit of charge distribution type includes a plurality of capacitors having respective capacitances that increase in a sequential order, one end of the capacitors being commonly connected electrically. The circuit also includes a plurality of analog switches each for electrically connecting a reference potential corresponding to a digital signal inputted from outside to the other end of the corresponding capacitor. These analog switches have respective driving capacities that increase in a sequential order.

Abstract: A transistor model for a simulator simulates a resistance between a source region and a drain region with a model equation which has terms representing resistance values corresponding respectively to areas of mutually different impurity concentrations below a gate section in simulating characteristics of a transistor. At least two of the terms each having a threshold parameter indicating a voltage at which a semiconductor element composed of the associated region and regions adjacent to that region changes from an ON state to an OFF state. The threshold parameters of the terms being specified independently from each other. Thus, the characteristics of a transistor having a set of areas of mutually different impurity concentrations below a gate section, inclusive of subthreshold regions which are difficult to evaluate through actual measurement, can be simulated to high accuracy while preserving a good fit with a capacitance model.

Abstract: A precharge control circuit constituted by (1) a latch circuit mounted in a precharge circuit and (2) a level shifter circuit of a current drive type controlled through an output of the latch circuit is included. The precharge control circuit changes the latch circuit to an active state to cause the level shifter circuit of a current drive type to operate only during a precharge period and also during immediately preceding and succeeding periods, and outside these periods, changes the latch circuit in a non-active state and the level shifter circuit of a current drive type in an operating state to save power consumption in the level shifter circuit. This enables a low-power-consuming precharge circuit, as well as a low-power-consuming image display device with a high quality display capability, to be offered.

Abstract: Disclosed is a breather system for a fuel tank reliably performing a function of a breather when a vehicle is inclined to the right or to the left and a straddle-type four wheeled all terrain vehicle comprising the breather system in which the fuel tank is provided below a seat, and a fuel inlet and a tank cap covering the fuel inlet is protruded from a rear fender laterally of the seat. The breather system has two breather openings provided in the fuel tank, breather hoses respectively connected to the breather openings, a T-shape joint integrally connecting the breather hoses, and a check valve connected to an ambient side of the T-shape joint, and the two breather openings are provided on the right and left sides of the fuel tank so as to be spaced apart from each other.

Abstract: A shift register is provided with a shift register section composed of a plurality of stages of flip-flops that operate in synchronization with a clock signal, and level shifters for boosting a start signal lower than a driving voltage and for applying the same to both ends of the shift register section, and the shift register is capable of switching the shift direction in accordance with the switching signal. The foregoing level shifters are current-driving-type level shifters that can operate even in the case where the transistor characteristics are inferior or in the case of fast operations, and that can carry out level shifting even with a start signal having a small amplitude. Furthermore, the foregoing level shifters are provided at both ends of the shift register section, respectively, and one of the same stops operating in accordance with a switching signal, so that consumed power should decrease.

Abstract: In a shift register provided with flip-flops that operate in synchronism with a clock signal, and a switching means, which is opened and closed in response to an output of the preceding stage of each of the flip-flops, is installed. The clock signal is selectively inputted by the switching means, and the selected clock signal is inverted and used as a shift register output from each of the stages. Moreover, two kinds of clock signals, each of which has a duty ratio of not more than 50% and which have no overlapped portions in their low-level periods, are used so as to prevent the outputs of the shift-register from overlapping each other. Thus, it is possible to provide a shift register which is preferably used for a driving circuit of an image display device, can miniaturize the driving circuit, and can desirably change the pulse width of the output signal, and also to provide an image display device using such a shift register.

Abstract: Administration of a decoy, i.e. a compound which specifically antagonizes the nucleic acid domain to which NF-&kgr;B is bound, is effective in the treatment and prevention of diseases caused by the transcriptional regulatory factor NF-&kgr;B, such as ischemic diseases, inflammatory diseases, autoimmune diseases, cancer metastasis and invasion, and cachexia.

Abstract: A transmission apparatus of an all-terrain vehicle includes: a non-stage transmission disposed in a power transmission path from an engine to drive wheels; a forward and backward movement switching device capable of switching to a forward movement position, a neutral position, or a backward movement position, the forward and backward movement switching device being disposed in the power transmission path at a position near said engine; and a shift operation device for switching forward and backward movement disposed on a handle bar at a position adjacent to a handle grip, the shift operation device and the forward and backward movement switching device being interlocked with each other.

Abstract: The data signal line driving circuit of the present invention is arranged so that data signal line groups, each of which is made up of two data signal lines sequentially disposed, are connected to two video signal lines, each of which allows a two-phased video signal to be forwarded. A shift resister SR, a drive switching circuit, and a waveform shaping circuit, that constitute a video signal fetching section, collect the data signal line groups via the two video signal lines as a single block. At this time, the data signal lines are respectively driven so as to fetch the video signal from the video signal lines into the data signal lines of the data signal line groups in each block. Thus, in performing multiphase development, it is possible to provide the data signal line driving circuit which can reduce power consumption in low resolution driving compared with a case of high resolution driving.

Abstract: In a structure in which a plurality of signals related to each other are supplied to a driving circuit in such a manner that at least one of the signals is supplied also to the other circuit, the present invention prevents change of phase relation between the plural signals due to difference in wiring load, without directly processing the signals with higher power consumption. The first and second clock signals SCK1 and SCK2 are supplied to the first data signal line driving circuit SD1, while the first clock signal SCK1 is also supplied to the second data signal line driving circuit SD2 in parallel. The wirings 1 and 2 for the respective signals are adjusted to have equal wiring load with a dummy wiring 2 provided in the wiring 2, for solving uneven wiring load caused by difference of leading manner, the dummy wiring 2 constituting an additional capacitor section 7, together with a liquid crystal layer and a counter electrode.

Abstract: The communication terminal is comprised of: a voice input unit for inputting voice; a voice converting unit for converting the voice inputted into a voice signal; a character converting unit for converting the voice signal into a character signal; a transmitting unit capable of transmitting both the voice signal and the character signal via a communication line; and a control unit for controlling the transmitting unit in such a manner that the transmitting unit transmits the voice signal, or the character signal in response to a condition of the communication line. Also, the communication terminal is comprised of: a receiving unit capable of receiving both a voice signal and a character signal; an output unit for outputting the voice signal received by the receiving unit; and a display unit for displaying thereon the character signal received by the receiving unit.

Abstract: A transmission apparatus of an all-terrain vehicle includes: a non-stage transmission; a forward and backward movement switching device capable of switching to a forward movement position, a neutral position, or a backward movement position; and a shift operation device of rotary type for switching forward and backward movement disposed on a handle bar at a position adjacent to a handle grip. The shift operation device includes a rotary member for a shift operation and a locking mechanism for locking the rotary member so as not to move toward at least a position for backward movement from a position for neutral. The locking mechanism is configured to be handled by a hand griping the handle grip to make the locking mechanism unlocked.

Abstract: In a shift register block according to the present invention, a plurality of flip-flops F/F(1), F/F(2), . . . F/F(n) constitute a shift register SR, and each adjacent ones of these flip-flops are therebetween having a corresponding one of waveform processing circuits WR(1) through WR(n), so that the shift register SR and the waveform processing circuits WR(1) and WR(n) are linearly aligned. With such an arrangement, it is possible to reduce area occupied by a signal line driving circuit including the sift register block, thereby narrowing the frame area of a display device.

Abstract: In a shift register provided with flip-flops that operate in synchronism with a clock signal, and a switching means, which is opened and closed in response to an output of the preceding stage of each of the flip-flops, is installed. The clock signal is selectively inputted by the switching means, and the selected clock signal is inverted and used as a shift register output from each of the stages. An output pulse having the same width as the pulse of the clock signal is generated.

Abstract: A shift register is provided with a shift register section composed of a plurality of stages of flip-flops that operate in synchronization with a clock signal, and level shifters for boosting a start signal lower than a driving voltage and for applying the same to both ends of the shift register section, and the shift register is capable of switching the shift direction in accordance with the switching signal. The foregoing level shifters are current-driving-type level shifters that can operate even in the case where the transistor characteristics are inferior or in the case of fast operations, and that can carry out level shifting even with a start signal having a small amplitude. Furthermore, the foregoing level shifters are provided at both ends of the shift register section, respectively, and one of the same stops operating in accordance with a switching signal, so that consumed power should decrease.

Abstract: Disclosed are a highly-reliable starter device of a four-wheeled all terrain vehicle (ATV), reliably functioning corresponding switches even when a brake or neutral lamp is burned. This device is suitable to the straddle-type ATV provided with a transmission lever at a position different from the steering handle and provided with the starter switch in the vicinity of the handle grip. A drive circuit for connecting a starter motor for driving the engine to a power supply. In addition, two relays are connected in parallel to the starter circuit connecting a start relay to the power supply through the starter switch, and a brake switch and a neutral switch are connected in parallel with each other between the starter circuit and the ground. When each of the switches is closed, the corresponding relay is operated to close the starter circuit.