Abstract: A data signal line drive circuit is provided with: a shift register belonging to a system, whose stages correspond to respective sampling units for driving odd-number-th data signal lines; and a shift register belonging to another system, whose stages correspond to respective sampling units for driving even-number-th data signal lines. On the occasion of low-resolution mode, only either of the shift registers is operated, and in accordance with the outputs from the respective stages of the shift register which has been operated, timing signals, which are supplied to the sampling units corresponding to the stages of both shift registers, are generated. With this arrangement, even if one of input signals each having different signal line resolution is inputted, a signal line drive circuit which consumes a small amount of electric power can be realized, while it is possible to specify the timings of the operation of signal line drive sections for driving signal lines, in accordance with the input signal.

Abstract: A source driver of the present invention includes a bypass switch which connects two source lines with each other. A video signal to one of the source lines is simultaneously supplied to the other source line. The source driver is thus capable of indirectly transmitting a video signal of a video line, supplied to one source line, to the other source line. Therefore, according to the source driver, it is possible to transmit video signals on fewer image lines than the number of source lines. As a result, it is possible to significantly lower power consumption.

Abstract: A driving circuit of the present invention includes a signal line switching circuit section that connects each signal line with two adjacent ones of output stages of a shift register circuit, one of the two adjacent ones of output stages following the other, switches over so that the signal lines are, in the switching-over manner and in concert, driven either by the following output stages or by the followed output stages. Thus, it is possible to provide a driving circuit that can be freely placed in any manner, is suitable for many purposes, and is capable of switching shifting directions without needing inversion of a clock signal and without causing shift of pixels, and switching the shifting directions with a simple arrangement even if there are an even number of signal lines for driving effective pixel columns.

Abstract: The present invention relates to a novel sulfonic acid derivative of hydroxamic acid or a pharmacologically acceptable salt thereof. More particularly, the present invention relates to a sulfonic acid derivative of hydroxamic acid or a pharmacologically acceptable salt thereof, which is useful as an inhibitor of lipopolysaccharides (LPS). In addition, the present invention relates to a novel intermediate compound useful for the synthesis of this sulfonic acid derivative of hydroxamic acid.

Abstract: A level shifter 13 is provided for each of SR flip flops F1 constituting a shift register 11. The level shifter 13 increases a voltage of a clock signal CK. This arrangement reduces a distance for transmitting a clock signal whose voltage has been increased, as compared with a construction in which a voltage of a clock signal is increased by a single level shifter and the signal is transmitted to each of the flip flops; consequently, a load capacity of the level shifter can be smaller. Furthermore, each of the level shifters is operated during a pulse output of the previous level shifter 13, and the operation is suspended at the end of the pulse output. Thus, the level shifters 13 can operate only when it is necessary to apply a clock signal CK to the corresponding SR flip flop F1. As a result, even when an amplitude of a clock signal is small, it is possible to reduce power consumption of the shift resister under normal operation.

Abstract: A precharge circuit is composed of (a) a reference signal input section, to which at least one precharge reference potential is inputted, (b) a control signal input section, to which at least one control signal is inputted, (c) a plurality of signal delay sections for sequentially delaying an output of the control signal input section, and (d) a reference signal switching section for switching, in accordance with outputs of the signal delay sections, between a state of outputting the precharge reference potential of the reference signal input section to each of the data signal lines and a state of non-outputting the same thereto. With this arrangement, the precharge control signal is sequentially delayed within the precharge circuit by the delay circuits composed of inverter circuits or the like, so that timings at which the precharge reference potential is written in the data signal lines are dispersed.

Abstract: The present invention relates to a hydroxamic acid derivative of the formula (I) wherein each symbol is as defined in the specification, a pharmacologically acceptable salt thereof, a pharmaceutical composition containing the derivative or a salt thereof, and to pharmaceutical use thereof. The hydroxamic acid derivative and a pharmacologically acceptable salt thereof of the present invention have an inhibitory activity of TNF &agr; production, and are useful for, for example, the prophylaxis and treatment of the diseases such as autoimmune diseases and inflammatory diseases (e.g., sepsis, MOF, rheumatoid arthritis, Crohn's disease, cachexia, myasthenia gravis, systemic lupus erythematosus, asthma, I type diabetes, psoriasis and the like), and the like.

Abstract: A control signal generating circuit CTL for controlling the writing into pixels PIX instructs a data signal line drive circuit SD2, which is for driving pixels in a non-display area, to write a voltage VB or a voltage VW which are for non-displaying, not only in the first frame but also once in a predetermined number of frames. In other words, the pixels in the display area is refreshed at intervals longer than those in the case of refreshing the pixels in each frame. Thus, even if the mobility of an active element is high and the leak current on the occasion of OFF-state is large, or even if a large amount of electric charge is accumulated because of the photoelectric effect due to the use of a backlight, it is possible to prevent unnecessary displaying on the display area, which is caused because the writing into the pixels in the display area influences on the pixels in the non-display area, and hence it is possible to improve the quality of partial displaying, while restraining the power consumption.

Abstract: A data signal line drive circuit is provided with: a shift register belonging to a system, whose stages correspond to respective sampling units for driving odd-number-th data signal lines; and a shift register belonging to another system, whose stages correspond to respective sampling units for driving even-number-th data signal lines. On the occasion of low-resolution mode, only either of the shift registers is operated, and in accordance with the outputs from the respective stages of the shift register which has been operated, timing signals, which are supplied to the sampling units corresponding to the stages of both shift registers, are generated. With this arrangement, even if one of input signals each having different signal line resolution is inputted, a signal line drive circuit which consumes a small amount of electric power can be realized, while it is possible to specify the timings of the operation of signal line drive sections for driving signal lines, in accordance with the input signal.

Abstract: If a clock signal ck is “H” and an input pulse signal in (first control signal) is “H”, then n-type transistors M15 and M16 are turned on to make an output node/OUT have the GND level. Then, a p-type transistor M12 is turned on to make an output node OUT have a Vcc (16 V) level. Thus, a latch circuit LAT operates as a level shifter circuit when first and second control signals and the clock signal ck are at “H” and operates as a level hold circuit in any other case. Therefore, the shift register circuit constructed of the latch circuit LAT functions as a low-voltage interface, and the input of the clock signal ck is stopped when the latch circuit LAT is inactive, so that the load and the consumption of power of the clock signal line are reduced.

Abstract: A matrix type image display device has a structure in which the internal states of all of shift registers (the outputs of flip-flops included in the shift registers) in a scanning signal line drive circuit and data signal line drive circuit are made inactive by the use of an initializing signal generated by a NAND gate based on a combination of signals, which do not affect a displayed image, from a control circuit. With this structure, since the shift registers are initialized when power is supplied, it is possible to prevent an indefinite state when power is supplied. Therefore, by selectively inputting signals (such as clock signals) for controlling the shift registers, it is possible to prevent an excessive increase in the signal line load. Consequently, the operation of the image display device can be stabilized.

Abstract: A reserve tank for engine coolant formed by a blow molding method in which an external surface of the reserve tank is colored simultaneously with blow molding process and thus painting is unnecessary, and a straddle-type all terrain vehicle equipped with the reserve tank. The method comprises the steps of placing a thermoplastic tube, called a “parison”, between halves of an open mold, closing the mold halves, blowing the parison to expand the parison to the cavities of the mold halves, and cooling the parison to set the material, thereby forming the reserve tank. The method further comprises the steps of placing a thermoplastic film with a color which is different from that of the parison so that it covers at least one of the cavities before closing the molds, and expanding the thermoplastic film to the cavities along with the parison so that the film sticks thereto.

Abstract: Before a potential of counter electrode is changed, a potential holding circuit fixedly holds potentials of data signal lines S during a non-selective period of scanning signal lines G. This prevents the potentials of the data signal lines S from being an undesirably large potential, which is caused by coupling capacitors between the counter electrode and each data signal line S, whereby it is possible to supply to the pixel capacitor an electric charge corresponding to a gradation to be displayed, by using the relatively low potentials of the data signal lines S. This lowers a power supply voltage of a data signal driving circuit SD, thus reducing the electric power consumption. In short, with this arrangement, a liquid crystal display device can perform an opposed AC drive for line-inversion drive, frame-inversion drive and the like, by low power supply voltage of the data signal line driving circuit SD, thereby reducing the electric power consumption.

Abstract: A potential of a data signal line S during a scanning period is charged to a substantially intermediate potential of a data signal at a corresponding frame. Thus, extremely large dispersion does not occur in a potential of each pixel capacitor with respect to a potential of the data signal line S, so that it is possible to restrict dispersion of a leak current flowing via an active element of each pixel. Thus, potential variation of a pixel PIX is reduced, so that it is possible to improve display quality during a non-scanning period. That is, in an active-matrix-type liquid crystal display, when a frame frequency is reduced by setting the non-scanning period to be sufficiently larger than a scanning period while a standby image is being displayed so as to realize low power consumption, the display quality is improved.

Abstract: The scanning signal line driving circuit sequentially carries out active driving with respect to each set of a certain number of scanning signal lines which are adjacent to each other in a vertical direction, and when carrying out an actual writing with respect to a first set of a certain number of pixel lines adjacent to each other in the vertical direction, carries out pre-charging with respect to a second set of the certain number of pixel lines to which the actual writing is carried out next with a potential of a same polarity as that of the first set of the certain number of pixel lines. In this manner, it is possible to provide a matrix image display device with no irregularities in display quality and is capable of matching the apparent vertical resolution of the device to that of the image source, when using an image signal of vertical resolution lower than the maximum physical vertical resolution of the device.

Abstract: A precharge control circuit constituted by (1) a latch circuit mounted in a precharge circuit and (2) a level shifter circuit of a current drive type controlled through an output of the latch circuit is included. The precharge control circuit changes the latch circuit to an active state to cause the level shifter circuit of a current drive type to operate only during a precharge period and also during immediately preceding and succeeding periods, and outside these periods, changes the latch circuit in a non-active state and the level shifter circuit of a current drive type in an operating state to save power consumption in the level shifter circuit. This enables a low-power-consuming precharge circuit, as well as a low-power-consuming image display device with a high quality display capability, to be offered.

Abstract: An aqueous bath for treating the surfaces of light metals and light metal alloys that does not contain hexavalent chromium or produce any other highly polluting effluent and that forms a highly corrosion-resistant and highly paint-adherent conversion coating has a pH from 1.0 to 7.0 and contains from 0.01 to 50 g/L of permanganic acid and/or salt(s) thereof and 0.01 to 20 g/L of at least one water soluble compound of titanium or zirconium.

Abstract: Disclosed are a highly-reliable starter device of a four-wheeled all terrain vehicle (ATV), reliably functioning corresponding switches even when a brake or neutral lamp is burned. This device is suitable to the straddle-type ATV provided with a transmission lever at a position different from the steering handle and provided with the starter switch in the vicinity of the handle grip. A drive circuit for connecting a starter motor for driving the engine to a power supply. In addition, two relays are connected in parallel to the starter circuit connecting a start relay to the power supply through the starter switch, and a brake switch and a neutral switch are connected in parallel with each other between the starter circuit and the ground. When each of the switches is closed, the corresponding relay is operated to close the starter circuit.

Abstract: Disclosed is a breather system for a fuel tank reliably performing a function of a breather when a vehicle is inclined to the right or to the left and a straddle-type four wheeled all terrain vehicle comprising the breather system in which the fuel tank is provided below a seat, and a fuel inlet and a tank cap covering the fuel inlet is protruded from a rear fender laterally of the seat. The breather system has two breather openings provided in the fuel tank, breather hoses respectively connected to the breather openings, a T-shape joint integrally connecting the breather hoses, and a check valve connected to an ambient side of the T-shape joint, and the two breather openings are provided on the right and left sides of the fuel tank so as to be spaced apart from each other.

Abstract: Administration of a decoy, i.e. a compound which specifically antagonizes the nucleic acid domain to which NF-&kgr;B is bound, is effective in the treatment and prevention of diseases caused by the transcriptional regulatory factor NF-&kgr;B, such as ischemic diseases, inflammatory diseases, autoimmune diseases, cancer metastasis and invasion, and cachexia.