Patents by Inventor Kazuki Fujita
Kazuki Fujita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9197826Abstract: Charges accumulated in pixels contained in one or a plurality of readout object rows that form a partial region of a photodetecting region are selectively read out in each of the L times (L is an integer not less than 2) of imaging frames, and in each of the L times of imaging frames, resetting of charges accumulated in pixels contained in only a part of non-readout object rows is performed, as well as, resetting is performed at least once in a period of the L times of imaging frames for each of the two or more non-readout object rows. Accordingly, a control method for a solid-state imaging element capable of reducing the time required per one imaging frame and reducing load on the peripheral circuit when selectively reading out charges accumulated in pixels in a partial region of the photodetecting region is realized.Type: GrantFiled: December 14, 2011Date of Patent: November 24, 2015Assignee: HAMAMATSU PHOTONICS K.K.Inventors: Kazuki Fujita, Ryuji Kyushima, Harumichi Mori
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Patent number: 9191601Abstract: A controlling section causes a charge of a photodiode to be output to an integration circuit by bringing a readout switch into a connected state, and then brings the readout switch into a non-connected state. Thereafter, a voltage value is output to a holding circuit from the integration circuit. After carrying out the output operation mentioned above, an operation for causing a charge held in an integrating capacitive element to be discharged, and bringing the readout switch into a connected state to cause a charge held in the photodiode to be discharged and an operation for causing voltage values held in the holding circuits to be sequentially output are carried out in parallel. Accordingly, a solid-state imaging device and a method of driving it capable of solving the problems due to a memory effect, a delay effect, and switching noise are realized.Type: GrantFiled: December 7, 2011Date of Patent: November 17, 2015Assignee: HAMAMATSU PHOTONICS K.K.Inventors: Ryuji Kyushima, Kazuki Fujita, Harumichi Mori
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Patent number: 9191602Abstract: A controlling section, by bringing readout switches of pixels of a certain row out of the M rows into a connected state, causes charges generated in the row to be input to integration circuits, causes first holding circuits to hold voltage values output from the integration circuits, and then brings transfer switches into a connected state to transfer the voltage values to the second holding circuits, and thereafter performs in parallel an operation for causing the voltage values to be sequentially output from the second holding circuits and an operation for, by bringing readout switches of pixels of another row into a connected state, causing charges generated in the row to be input to the integration circuits. Accordingly, a solid-state imaging device and a driving method thereof capable of suppressing variations in output characteristics, while solving the problem due to a delay effect are realized.Type: GrantFiled: December 7, 2011Date of Patent: November 17, 2015Assignee: HAMAMATSU PHOTONICS K.K.Inventors: Ryuji Kyushima, Kazuki Fujita, Harumichi Mori
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Patent number: 9097812Abstract: The present invention relates to a solid-state imaging device, etc. having a structure for capturing a high-resolution image even when any row selecting wiring is disconnected. The solid-state imaging device (1) comprises a photodetecting section (10), a signal reading-out section (20), a row selecting section (30), a column selecting section (40), an overflow preventing section (50), and a controlling section (60). The photodetecting section (10) has M×N pixel portions P1,1 to PM,N two-dimensionally arranged in a matrix of M rows and N columns, and each of the pixel portions P1,1 to PM,N includes a photodiode that generates charge of an amount according to an incident light intensity and a reading-out switch connected to the photodiode. Each of the N pixel portions Pm,1 to Pm,N belonging to an m-th row is connected to the row selecting section (30) and the overflow preventing section (50) by an m-th row selecting wiring LV,m.Type: GrantFiled: June 17, 2013Date of Patent: August 4, 2015Assignee: HAMAMATSU PHOTONICS K.K.Inventors: Kazuki Fujita, Harumichi Mori, Ryuji Kyushima, Masahiko Honda
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Patent number: 9049394Abstract: A solid-state imaging device includes a photodetecting section including pixels each including a transistor and a photodiode, readout wiring lines connected to the transistors, a signal output section for sequentially outputting voltage values according to the amounts of charges input through the respective readout wiring lines, potential change switches for switching the potentials of the readout wiring lines to a potential Vdr different from input potentials of integration circuits of the signal output section, and a controlling section. The controlling section switches potentials of the readout wiring lines to the different potential Vdr for a predetermined period included in a period, after an elapse of a readout period where voltage values corresponding to the amounts of charges generated in the pixels are sequentially output from the signal output section, until a next readout period is started.Type: GrantFiled: December 20, 2011Date of Patent: June 2, 2015Assignee: HAMAMATSU PHOTONICS K.K.Inventors: Kazuki Fujita, Ryuji Kyushima, Harumichi Mori
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Patent number: 8988517Abstract: A solid-state image pickup apparatus 1A is formed such that M×N (where M<N and M and N are integers greater than or equal to 2) pixels are two-dimensionally arrayed in M rows and N columns, and has a photodetecting section 10A having a rectangular photosensitive surface whose longitudinal direction is the row direction. The solid-state image pickup apparatus 1A is supported rotatably by a rotation controlling section, and the rotation controlling section controls a rotation angle of the solid-state image pickup apparatus 1A such that the longitudinal direction of the photodetecting section 10A is made parallel to a moving direction B of the solid-state image pickup apparatus 1A in one imaging mode of the two imaging modes, and the longitudinal direction of the photodetecting section 10A is made perpendicular to the moving direction B of the solid-state image pickup apparatus 1A in the other imaging mode of the two imaging modes.Type: GrantFiled: April 22, 2009Date of Patent: March 24, 2015Assignee: Hamamatsu Photonics K.K.Inventors: Harumichi Mori, Ryuji Kyushima, Kazuki Fujita
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Patent number: 8975591Abstract: A solid-state imaging device according to an embodiment includes a plurality of signal output units. Each of the plurality of signal output units includes an input terminal electrode group including terminal electrodes for inputting a reset signal, a hold signal, a horizontal start signal, and a horizontal clock signal and an output terminal electrode for providing an output signal. The solid-state imaging device further includes common lines that are provided across the plurality of signal output units. A terminal electrode for the reset signal and a terminal electrode for the hold signal are connected to the corresponding common lines through the corresponding switches.Type: GrantFiled: March 26, 2010Date of Patent: March 10, 2015Assignee: Hamamatsu Photonics K.K.Inventors: Kazuki Fujita, Ryuji Kyushima, Harumichi Mori
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Patent number: 8953745Abstract: A solid-state image pickup apparatus 1A includes a photodetecting section 10A and a signal readout section 20 etc. In the photodetecting section 10A, M×N pixel units P1,1 to PM,N are arrayed in M rows and N columns. When in a first imaging mode, a voltage value according to an amount of charges generated in a photodiode of each of the M×N pixel units in the photodetecting section 10A is output from the signal readout section 20. When in a second imaging mode, a voltage value according to an amount of charges generated in the photodiode of each pixel unit included in consecutive M1 rows in the photodetecting section 10A is output from the signal readout section 20. When in the second imaging mode than when in the first imaging mode, the readout pixel pitch in frame data is smaller, the frame rate is higher, and the gain being a ratio of an output voltage value to an input charge amount in the signal readout section 20 is greater.Type: GrantFiled: October 8, 2013Date of Patent: February 10, 2015Assignee: Hamamatsu Photonics K.K.Inventors: Harumichi Mori, Ryuji Kyushima, Kazuki Fujita
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Publication number: 20140353515Abstract: A sensor unit includes a metallic base member, a solid-state imaging element, and amplifier chips. The base member has a first placement surface and a second placement surface. The solid-state imaging element has a photodetecting surface, and is disposed on the first placement surface such that a rear surface and the first placement surface face each other. The amplifier chips are mounted on a substrate disposed on the second placement surface. The base member further has side wall portions facing side surfaces of the solid-state imaging element. The chips and the solid-state imaging element are electrically connected to one another via a bonding wire. The chips are thermally coupled to the base member via a thermal via of the substrate.Type: ApplicationFiled: December 4, 2012Publication date: December 4, 2014Applicant: HAMAMATSU PHOTONICS K.K.Inventors: Kazuki Fujita, Ryuji Kyushima, Harumichi Mori, Haruyoshi Okada, Junichi Sawada
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Publication number: 20140252241Abstract: A solid state imaging device 1 includes a photodetecting section 10, a signal readout section 20, a controlling section 30, dummy photodetecting sections 11 and 12 including dummy photodiodes, discharging means for discharging junction capacitance portions of the dummy photodiodes, and a scintillator layer 50 provided so as to cover the photodetecting section 10. The dummy photodetecting section 11 is disposed so as to neighbor the first row (the upper side of the photodetecting section 10) of the photodetecting section 10 and has a length equivalent to the length of the photodetecting section 10 in the left-right direction. The dummy photodetecting section 12 is disposed so as to neighbor the M-th column of the photodetecting section 10 (the lower side of the photodetecting section 10) and has a length equivalent to the length of the photodetecting section 10 in the left-right direction.Type: ApplicationFiled: May 22, 2014Publication date: September 11, 2014Applicant: Hamamatsu Photonics K.K.Inventors: Harumichi MORI, Kazuki Fujita, Ryuji Kyushima
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Patent number: 8766203Abstract: A solid state imaging device 1 includes a photodetecting section 10, a signal readout section 20, a controlling section 30, dummy photodetecting sections 11 and 12 including dummy photodiodes, discharging arrangement for discharging junction capacitance portions of the dummy photodiodes, and a scintillator layer 50 provided so as to cover the photodetecting section 10. The dummy photodetecting section 11 is disposed so as to neighbor the first row (the upper side of the photodetecting section 10) of the photodetecting section 10 and has a length equivalent to the length of the photodetecting section 10 in the left-right direction. The dummy photodetecting section 12 is disposed so as to neighbor the M-th column of the photodetecting section 10 (the lower side of the photodetecting section 10) and has a length equivalent to the length of the photodetecting section 10 in the left-right direction.Type: GrantFiled: September 24, 2008Date of Patent: July 1, 2014Assignee: Hamamatsu Photonics K.K.Inventors: Harumichi Mori, Kazuki Fujita, Ryuji Kyushima
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Patent number: 8704146Abstract: A solid-state imaging device of one embodiment includes a light receiving section including of a plurality of pixels 11 having respective photodiodes, the pixels being two-dimensionally arrayed in M rows and N columns; N readout lines disposed for the respective columns and connected with the photodiodes PD included in the pixels of a respective columns via readout switches; a signal output section for outputting a voltage value according to an amount of charge input through each of the readout lines; and a vertical shift register for controlling an opening and closing operation of the readout switch for each of the rows. A contour between one side along a row direction of the light receiving section and a pair of sides along a column direction has a stepped shape. A dummy photodiode region is formed along the stepped contour of the light receiving section.Type: GrantFiled: March 13, 2013Date of Patent: April 22, 2014Assignee: Hamamatsu Photonics K.K.Inventors: Harumichi Mori, Ryuji Kyushima, Kazuki Fujita
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Patent number: 8675813Abstract: The solid-state imaging device comprises a photodetecting section having M×N pixel portions P1,1 to PM,N two-dimensionally arranged in a matrix of M rows and N columns. A pixel portion Pm,n of the photodetecting section includes a photodiode PD generating charge of an amount according to an incident light intensity and a reading-out switch SW1 connected to the photodiode PD. The photodetecting section includes plural dummy photodiodes PD1 arranged around one pixel portion without not completely surrounding the one pixel portion, and each dummy photodiode PD1 is provided in a region surrounded by any two pixel portions adjacent to one another.Type: GrantFiled: June 19, 2013Date of Patent: March 18, 2014Assignee: Hamamatsu Photonics K.K.Inventors: Kazuki Fujita, Harumichi Mori, Ryuji Kyushima, Masahiko Honda
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Patent number: 8653466Abstract: A solid-state imaging device according to one embodiment includes a plurality of signal output units. Each of the plurality of signal output units includes a first input terminal electrode group that includes a plurality of terminal electrodes for inputting a reset signal, a hold signal, a horizontal start signal, and a horizontal clock signal and a first output terminal electrode that provides output signals. The solid-state imaging device further includes a second input terminal electrode group that includes a plurality of terminal electrodes for receiving the reset signal, the hold signal, the horizontal start signal, and the horizontal clock signal, a plurality of switches that switch an electrode group which is connected with integrating circuits, holding circuits, and a horizontal shift register between the first input terminal electrode group and the second input terminal electrode group, and a second output terminal electrode.Type: GrantFiled: March 26, 2010Date of Patent: February 18, 2014Assignee: Hamamatsu Photonics K.K.Inventors: Kazuki Fujita, Ryuji Kyushima, Harumichi Mori
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Publication number: 20140037060Abstract: A solid-state image pickup apparatus 1A includes a photodetecting section 10A and a signal readout section 20 etc. In the photodetecting section 10A, M×N pixel units P1,1 to PM,N are arrayed in M rows and N columns. When in a first imaging mode, a voltage value according to an amount of charges generated in a photodiode of each of the M×N pixel units in the photodetecting section 10A is output from the signal readout section 20. When in a second imaging mode, a voltage value according to an amount of charges generated in the photodiode of each pixel unit included in consecutive M1 rows in the photodetecting section 10A is output from the signal readout section 20. When in the second imaging mode than when in the first imaging mode, the readout pixel pitch in frame data is smaller, the frame rate is higher, and the gain being a ratio of an output voltage value to an input charge amount in the signal readout section 20 is greater.Type: ApplicationFiled: October 8, 2013Publication date: February 6, 2014Applicant: HAMAMATSU PHOTONICS K.K.Inventors: Harumichi MORI, Ryuji KYUSHIMA, Kazuki FUJITA
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Patent number: 8625741Abstract: A solid-state image pickup device 1 includes a photodetecting section 10, a signal readout section 20, a controlling section 30, and a correction processing section 40. In the photodetecting section 10, M×N pixel units P1,1 to PM,N each including a photodiode that generates charge of an amount according to an incident light intensity and a readout switch connected to the photodiode are two-dimensionally arrayed in M rows and N columns. A charge generated in each pixel unit Pm,n is input to an integration circuit Sn through a readout wiring line LO,n, and a voltage value output from the integration circuit Sn according to the charge amount is output to an output wiring line Lout through a holding circuit Hn. In the correction processing section 40, a correction processing is applied to respective frame data output from the signal readout section 20, and the frame data after the correction processing is output.Type: GrantFiled: July 13, 2009Date of Patent: January 7, 2014Assignee: Hamamatsu Photonics K.K.Inventors: Ryuji Kyushima, Kazuki Fujita, Junichi Sawada
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Publication number: 20130308030Abstract: Charges accumulated in pixels contained in one or a plurality of readout object rows that form a partial region of a photodetecting region are selectively read out in each of the L times (L is an integer not less than 2) of imaging frames, and in each of the L times of imaging frames, resetting of charges accumulated in pixels contained in only a part of non-readout object rows is performed, as well as, resetting is performed at least once in a period of the L times of imaging frames for each of the two or more non-readout object rows. Accordingly, a control method for a solid-state imaging element capable of reducing the time required per one imaging frame and reducing load on the peripheral circuit when selectively reading out charges accumulated in pixels in a partial region of the photodetecting region is realized.Type: ApplicationFiled: December 14, 2011Publication date: November 21, 2013Applicant: HAMAMATSU PHOTONICS K.K.Inventors: Kazuki Fujita, Ryuji Kyushima, Harumichi Mori
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Publication number: 20130299679Abstract: A controlling section causes a charge of a photodiode to be output to an integration circuit by bringing a readout switch into a connected state, and then brings the readout switch into a non-connected state. Thereafter, a voltage value is output to a holding circuit from the integration circuit. After carrying out the output operation mentioned above, an operation for causing a charge held in an integrating capacitive element to be discharged, and bringing the readout switch into a connected state to cause a charge held in the photodiode to be discharged and an operation for causing voltage values held in the holding circuits to be sequentially output are carried out in parallel. Accordingly, a solid-state imaging device and a method of driving it capable of solving the problems due to a memory effect, a delay effect, and switching noise are realized.Type: ApplicationFiled: December 7, 2011Publication date: November 14, 2013Applicant: HAMAMATSU PHOTONICS K.K.Inventors: Ryuji Kyushima, Kazuki Fujita, Harumichi Mori
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Publication number: 20130292549Abstract: A solid-state imaging device includes a photodetecting section including pixels each including a transistor and a photodiode, readout wiring lines connected to the transistors, a signal output section for sequentially outputting voltage values according to the amounts of charges input through the respective readout wiring lines, potential change switches for switching the potentials of the readout wiring lines to a potential Vdr different from input potentials of integration circuits of the signal output section, and a controlling section. The controlling section switches potentials of the readout wiring lines to the different potential Vdr for a predetermined period included in a period, after an elapse of a readout period where voltage values corresponding to the amounts of charges generated in the pixels are sequentially output from the signal output section, until a next readout period is started.Type: ApplicationFiled: December 20, 2011Publication date: November 7, 2013Applicant: HAMAMATSU PHOTONICS K.K.Inventors: Kazuki Fujita, Ryuji Kyushima, Harumichi Mori
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Patent number: 8576984Abstract: A solid-state image pickup apparatus 1A includes a photodetecting section 10A and a signal readout section 20 etc. In the photodetecting section 10A, M×N pixel units P1,1 to PM,N are arrayed in M rows and N columns. When in a first imaging mode, a voltage value according to an amount of charges generated in a photodiode of each of the M×N pixel units in the photodetecting section 10A is output from the signal readout section 20. When in a second imaging mode, a voltage value according to an amount of charges generated in the photodiode of each pixel unit included in consecutive M1 rows in the photodetecting section 10A is output from the signal readout section 20. When in the second imaging mode than when in the first imaging mode, the readout pixel pitch in frame data is smaller, the frame rate is higher, and the gain being a ratio of an output voltage value to an input charge amount in the signal readout section 20 is greater.Type: GrantFiled: April 22, 2009Date of Patent: November 5, 2013Assignee: Hamamatsu Photonics K.K.Inventors: Harumichi Mori, Ryuji Kyushima, Kazuki Fujita