Patents by Inventor Kazuo Shimokawa

Kazuo Shimokawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100140639
    Abstract: An optical semiconductor device includes a light emitting element having a first surface and a second surface, the first surface having a first electrode provided thereon, the second surface being located on the opposite side from the first surface and having a second electrode provided thereon; a first conductive member connected to the first surface; a second conductive member connected to the second surface; a first external electrode connected to the first conductive member; a second external electrode connected to the second conductive member; and an enclosure sealing the light emitting element, the first conductive member, and the second conductive member between the first external electrode and the second external electrode, and being configured to transmit light emitted from the light emitting element.
    Type: Application
    Filed: September 2, 2009
    Publication date: June 10, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akihiko HAPPOYA, Kazuhito Higuchi, Tomohiro Iguchi, Kazuo Shimokawa, Takashi Koyanagawa, Michinobu Inoue, Izuru Komatsu, Hisashi Ito
  • Publication number: 20100140640
    Abstract: Provided is an optical semiconductor device includes: a light-emitting layer having a first main surface, a second main surface opposed to the first main surface, a first electrode and a second electrode which are formed on the second main surface; a fluorescent layer provided on the first main surface; a light-transmissive layer provided on the fluorescent layer and made of a light-transmissive inorganic material; a first metal post provided on the first electrode; a second metal post provided on the second electrode; a sealing layer provided on the second main surface so as to seal in the first and second metal posts with one ends of the respective first and second metal posts exposed; a first metal layer provided on the exposed end of the first metal post; and a second metal layer provided on the exposed end of the second metal post.
    Type: Application
    Filed: September 9, 2009
    Publication date: June 10, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuo SHIMOKAWA, Takashi KOYANAGAWA, Takeshi MIYAGI, Akihiko HAPPOYA, Kazuhito HIGUCHI, Tomoyuki KITANI
  • Publication number: 20100006888
    Abstract: Provided is a method of manufacturing an optical semiconductor device, the method including: providing a resin layer on a light-emitting substrate to cover a principle surface of the light-emitting substrate, the light-emitting substrate including a pair of electrodes in each section of the principle surface, the resin layer including multiple holes each exposing two of the electrodes located adjacent to each other but in the different sections; providing post electrodes respectively on all the paired electrodes formed in all the sections by filling a conductive material in the holes of the resin layer on the principal surface; and forming multiple optical semiconductor devices by cutting the light-emitting substrate into sections, the light-emitting substrate provided with the post electrodes respectively on all the paired electrodes formed in all the sections.
    Type: Application
    Filed: July 7, 2009
    Publication date: January 14, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Naotake WATANABE, Izuru Komatsu, Kazuo Shimokawa, Hisashi Ito
  • Patent number: 7633153
    Abstract: A semiconductor module comprises a mounting board. A plurality of power switching device chips are mounted on the mounting board by flip-chip bonding. The chip has an upper surface and a lower surface and is configured to face the upper surface toward the mounting board. A drive IC chip is mounted on the mounting board by flip-chip bonding. The drive IC chip is operative to drive gates of transistors formed in the plurality of power switching device chips. A plurality of heat sink members are located on the lower surfaces of the plurality of power switching device chips, respectively. A resinous member is provided to seal the plurality of power switching device chips and the drive IC chip in a single package.
    Type: Grant
    Filed: July 16, 2007
    Date of Patent: December 15, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuo Shimokawa, Takashi Koyanagawa, Masako Ooishi, Tatsuya Yamada, Osamu Usuda, Yoshiki Endo, Taiki Miura, Masaki Toyoshima, Ichiro Omura, Akio Nakagawa, Kenichi Matsushita, Yusuke Kawaguchi, Haruki Arai, Hiroshi Takei, Tomohiro Kawano, Noriaki Yoshikawa, Morio Takahashi, Yasuhito Saito, Masahiro Urase
  • Publication number: 20090224279
    Abstract: An optical semiconductor device includes: an optical semiconductor element including a light-emitting layer formed on a first principal surface, a first electrode formed on the light-emitting layer and having a smaller size than the first principal surface, and a second electrode formed on a second principal surface different from the first principal surface; a first lead portion including a bonding region to which the first electrode is bonded and which has a smaller size than the first principal surface, and a first groove portion formed on an outer peripheral region adjacent to the bonding region, the first lead portion being electrically connected to the first electrode bonded to the bonding region by use of a bonding member; and a second lead portion electrically connected to the second electrode by use of a connecting member.
    Type: Application
    Filed: October 17, 2007
    Publication date: September 10, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuo Shimokawa, Yasunari Ukita
  • Patent number: 7514783
    Abstract: A semiconductor module comprises a mounting board. A plurality of power switching device chips are mounted on the mounting board by flip-chip bonding. The chip has an upper surface and a lower surface and is configured to face the upper surface toward the mounting board. A drive IC chip is mounted on the mounting board by flip-chip bonding. The drive IC chip is operative to drive gates of transistors formed in the plurality of power switching device chips. A plurality of heat sink members are located on the lower surfaces of the plurality of power switching device chips, respectively. A resinous member is provided to seal the plurality of power switching device chips and the drive IC chip in a single package.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: April 7, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuo Shimokawa, Takashi Koyanagawa, Masako Ooishi, Tatsuya Yamada, Osamu Usuda, Yoshiki Endo, Taiki Miura, Masaki Toyoshima, Ichiro Omura, Akio Nakagawa, Kenichi Matsushita, Yusuke Kawaguchi, Haruki Arai, Hiroshi Takei, Tomohiro Kawano, Noriaki Yoshikawa, Morio Takahashi, Yasuhito Saito, Masahiro Urase
  • Patent number: 7510911
    Abstract: A semiconductor device comprises a plurality of semiconductor chips each having a surface bonded to a wiring board and being electrically connected thereto, a plurality of metal plates each having a one-end portion bonded to the other surface of each of the plurality of semiconductor chips and having an other-end portion bonded to the wiring board to make electric connection therebetween, thermoplastic resin which seals the metal plates integrally as one body, such that a surface opposing the surface bonded to the semiconductor chip, of each of the metal plates, is exposed to outside, and thermosetting resin which seals an outer peripheral portion of the thermoplastic resin, and the semiconductor chips.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: March 31, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taizo Tomioka, Kazuo Shimokawa
  • Publication number: 20070257708
    Abstract: A semiconductor module comprises a mounting board. A plurality of power switching device chips are mounted on the mounting board by flip-chip bonding. The chip has an upper surface and a lower surface and is configured to face the upper surface toward the mounting board. A drive IC chip is mounted on the mounting board by flip-chip bonding. The drive IC chip is operative to drive gates of transistors formed in the plurality of power switching device chips. A plurality of heat sink members are located on the lower surfaces of the plurality of power switching device chips, respectively. A resinous member is provided to seal the plurality of power switching device chips and the drive IC chip in a single package.
    Type: Application
    Filed: July 16, 2007
    Publication date: November 8, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuo Shimokawa, Takashi Koyanagawa, Masako Ooishi, Tatsuya Yamada, Osamu Usuda, Yoshiki Endo, Taiki Miura, Masaki Toyoshima, Ichiro Omura, Akio Nakagawa, Kenichi Matsushita, Yusuke Kawaguchi, Haruki Arai, Hiroshi Takei, Tomohiro Kawano, Noriaki Yoshikawa, Morio Takahashi, Yasuhito Saito, Masahiro Urase
  • Publication number: 20070257376
    Abstract: A semiconductor module comprises a mounting board. A plurality of power switching device chips are mounted on the mounting board by flip-chip bonding. The chip has an upper surface and a lower surface and is configured to face the upper surface toward the mounting board. A drive IC chip is mounted on the mounting board by flip-chip bonding. The drive IC chip is operative to drive gates of transistors formed in the plurality of power switching device chips. A plurality of heat sink members are located on the lower surfaces of the plurality of power switching device chips, respectively. A resinous member is provided to seal the plurality of power switching device chips and the drive IC chip in a single package.
    Type: Application
    Filed: July 16, 2007
    Publication date: November 8, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuo Shimokawa, Takashi Koyanagawa, Masako Ooishi, Tatsuya Yamada, Osamu Usuda, Yoshiki Endo, Taiki Miura, Masaki Toyoshima, Ichiro Omura, Akio Nakagawa, Kenichi Matsushita, Yusuke Kawaguchi, Haruki Arai, Hiroshi Takei, Tomohiro Kawano, Noriaki Yoshikawa, Morio Takahashi, Yasuhito Saito, Masahiro Urase
  • Publication number: 20060214274
    Abstract: In a semiconductor device manufacturing method which includes a mounting a semiconductor element having a bonding electrode on a substrate, the mounting includes supplying solder paste containing Au—Sn series solder particles onto the substrate, putting the semiconductor element having a film of an Sn alloy or Sn formed on the bonding electrode on the solder paste, and melting the Au—Sn series solder particles and the film of the Sn alloy or Sn to bond the semiconductor element to the substrate.
    Type: Application
    Filed: March 22, 2006
    Publication date: September 28, 2006
    Inventors: Kazuo Shimokawa, Akira Ushijima
  • Publication number: 20060055432
    Abstract: A semiconductor module comprises a mounting board. A plurality of power switching device chips are mounted on the mounting board by flip-chip bonding. The chip has an upper surface and a lower surface and is configured to face the upper surface toward the mounting board. A drive IC chip is mounted on the mounting board by flip-chip bonding. The drive IC chip is operative to drive gates of transistors formed in the plurality of power switching device chips. A plurality of heat sink members are located on the lower surfaces of the plurality of power switching device chips, respectively. A resinous member is provided to seal the plurality of power switching device chips and the drive IC chip in a single package.
    Type: Application
    Filed: August 31, 2005
    Publication date: March 16, 2006
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuo Shimokawa, Takashi Koyanagawa, Masako Ooishi, Tatsuya Yamada, Osamu Usuda, Yoshiki Endo, Taiki Miura, Masaki Toyoshima, Ichiro Omura, Akio Nakagawa, Kenichi Matsushita, Yusuke Kawaguchi, Haruki Arai, Hiroshi Takei, Tomohiro Kawano, Noriaki Yoshikawa, Morio Takahashi, Yasuhito Saito, Masahiro Urase
  • Publication number: 20050029651
    Abstract: A semiconductor device comprises a plurality of semiconductor chips each having a surface bonded to a wiring board and being electrically connected thereto, a plurality of metal plates each having a one-end portion bonded to the other surface of each of the plurality of semiconductor chips and having an other-end portion bonded to the wiring board to make electric connection therebetween, thermoplastic resin which seals the metal plates integrally as one body, such that a surface opposing the surface bonded to the semiconductor chip, of each of the metal plates, is exposed to outside, and thermosetting resin which seals an outer peripheral portion of the thermoplastic resin, and the semiconductor chips.
    Type: Application
    Filed: June 25, 2004
    Publication date: February 10, 2005
    Inventors: Taizo Tomioka, Kazuo Shimokawa
  • Patent number: D508682
    Type: Grant
    Filed: May 27, 2004
    Date of Patent: August 23, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsuya Yamada, Kazuhiko Kurahashi, Toshihisa Inoue, Taizo Tomioka, Kazuo Shimokawa, Yoshiki Endo, Masahiro Urase, Osamu Usuda
  • Patent number: D521952
    Type: Grant
    Filed: May 27, 2004
    Date of Patent: May 30, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsuya Yamada, Kazuhiko Kurahashi, Toshihisa Inoue, Taizo Tomioka, Kazuo Shimokawa, Yoshiki Endo, Masahiro Urase, Osamu Usuda