Semiconductor device

- Kabushiki Kaisha Toshiba
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Description

FIG. 1 is a front, top and right side perspective view of a semiconductor device, showing our new design;

FIG. 2 is a top plan view thereof; the opposite side being a mirror image thereof;

FIG. 3 is a front elevational view thereof;

FIG. 4 is a right side elevational view thereof; the opposite side being a mirror image thereof; and,

FIG. 5 is a rear elevational view thereof.

Claims

The ornamental design for a semiconductor device, as shown and described.

Referenced Cited
U.S. Patent Documents
5752182 May 12, 1998 Nakatsuka et al.
5949294 September 7, 1999 Kondo et al.
D416236 November 9, 1999 Kobayashi et al.
5991162 November 23, 1999 Saso
D444132 June 26, 2001 Iwanishi et al.
6383835 May 7, 2002 Hata et al.
D476962 July 8, 2003 Yoshihira et al.
6713868 March 30, 2004 Ueno
Foreign Patent Documents
1046274 August 1999 JP
1067223 April 2000 JP
1078599-1 July 2000 JP
1131942 January 2002 JP
1171699 April 2003 JP
Other references
  • Kinseki, KSS Products Catalog, SAW Filter (LSFB30-190-004M0), p. 71. Mar. 2000.
  • Dempa Shimbun, An Infineon Technologies Tuner IC (TUA6120), Jul. 2002.
Patent History
Patent number: D508682
Type: Grant
Filed: May 27, 2004
Date of Patent: Aug 23, 2005
Assignee: Kabushiki Kaisha Toshiba
Inventors: Tatsuya Yamada (Yokohama), Kazuhiko Kurahashi (Kawasaki), Toshihisa Inoue (Yokohama), Taizo Tomioka (Yokohama), Kazuo Shimokawa (Yokohama), Yoshiki Endo (Hyogo-ken), Masahiro Urase (Himeji), Osamu Usuda (Tatsuno)
Primary Examiner: Stella Reid
Assistant Examiner: Selina Sikder
Attorney: Banner & Witcoff, Ltd.
Application Number: 29/206,162