Patents by Inventor Kazushige Kawasaki

Kazushige Kawasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7683398
    Abstract: A semiconductor device and a manufacturing method thereof are provided which enable reduction and enhanced stability of contact resistance between the back surface of a nitride substrate and an electrode formed thereover. A nitride semiconductor device includes an n-type GaN substrate (1) over which a semiconductor element is formed, and an n-electrode (10) as a metal electrode formed over the back surface of the GaN substrate (1). A connection layer (20) is formed between the GaN substrate (1) and the n-electrode (10), and the connection layer (20) is composed of a material that is other than nitride semiconductors and that contains silicon.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: March 23, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Katsuomi Shiozawa, Kyozo Kanamoto, Kazushige Kawasaki, Hitoshi Sakuma, Yuji Abe
  • Patent number: 7656920
    Abstract: A semiconductor laser device producing light having a TE-polarized component suitable for practical use (i.e., light having TE-polarized light intensity sufficiently high for practical use). A semiconductor laser device includes a GaAsP active layer, InGaP guide layers, and AlGaInP cladding layers. The GaAsP active layer emits light. The GaAsP active layer is interposed between the InGaP guide layers. The InGaP guide layers and GaAsP active layer are interposed between the AlGaInP cladding layers. Polarization ratio, which is a ratio of light intensity of TM-polarized light to light intensity of TE-polarized light, of the light produced by the semiconductor laser device is less than 2.3.
    Type: Grant
    Filed: November 23, 2005
    Date of Patent: February 2, 2010
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kimio Shigihara, Kazushige Kawasaki, Kenichi Ono
  • Publication number: 20100017158
    Abstract: A methodology to determine a bit pattern that may excite a worse case or near worse case simultaneous switching noise on a memory or input/output (IO) interface of a digital system is provided. This methodology involves determining an impedance profile of the IO interface of the digital system. The amplitude response of signal X(f) may be matched in the impedance profile of the IO interface. The phase response of the signal X(f) is also set. The signal X(f) having a matched amplitude response may be converted from a frequency domain signal to a time domain signal to produce a signal X(t). Signal X(t) the time domain signal X(t) may be digitized to represent a bit stream B(t).
    Type: Application
    Filed: July 21, 2008
    Publication date: January 21, 2010
    Inventors: Rohan Mandrekar, Paul Marlan Harvey, Yaping Zhou, Kazushige Kawasaki
  • Patent number: 7582908
    Abstract: A nitride semiconductor device and its manufacturing method are provided which are capable of achieving low-resistance ohmic properties and high adhesion. A nitride semiconductor device has an n-type GaN substrate over which a semiconductor element is formed and an n-electrode as a metal electrode formed over the back surface of the GaN substrate. A surface denatured layer functioning as a carrier supply layer is provided between the GaN substrate and the n-electrode. The surface denatured layer is formed by denaturing the back surface of the GaN substrate by causing it to react with a material that contains silicon.
    Type: Grant
    Filed: March 26, 2007
    Date of Patent: September 1, 2009
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kyozo Kanamoto, Katsuomi Shiozawa, Kazushige Kawasaki, Hitoshi Sakuma, Yoshiyuki Suehiro
  • Patent number: 7577173
    Abstract: A semiconductor laser device comprises a GaN substrate having a refractive index of 3.5 or below, a semiconductor layer laminated on the substrate, and a pair of facets forming a resonator and in face-to-face-relation to each other in a direction perpendicular to the direction of the laminated layer. One of the facets of the resonator includes a low reflection film, of a first dielectric film, a second dielectric film, a third dielectric film, and a fourth dielectric film. When the refractive indexes of these films are taken as n1, n2, n3, and n4, n1=n3 and n2=n4. The following relationship between the first dielectric film and the third dielectric film, and between the second dielectric film and the fourth dielectric film is established, nd+n?d?=p?/4, where p is an integer, and ? is oscillation wavelength of a laser beam generated by the semiconductor laser device.
    Type: Grant
    Filed: November 13, 2007
    Date of Patent: August 18, 2009
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazushige Kawasaki, Yasuyuki Nakagawa, Hiromasu Matsuoka
  • Publication number: 20090184336
    Abstract: A semiconductor light emitting device includes: a semiconductor layer; an insulating film on the semiconductor layer and having an opening; a multilayer adhesive layer on the insulating film; and a Pd electrode in contact with the semiconductor layer through the opening and in contact with the multilayer adhesive layer. The multilayer adhesive layer includes an Au layer at the top and an alloy of Au and Pd at the interface between the Au layer and the Pd electrode.
    Type: Application
    Filed: July 10, 2008
    Publication date: July 23, 2009
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takafumi Oka, Shinji Abe, Kazushige Kawasaki, Hitoshi Sakuma
  • Publication number: 20090170225
    Abstract: A method for manufacturing a semiconductor light emitting device includes forming an insulating film on a semiconductor substrate, the insulating film having an opening therein, forming a Pd electrode in the opening and on the insulating film, and removing the portion of the Pd electrode on the insulating film by the application of a physical force to the portion, while leaving the Pd electrode in the opening.
    Type: Application
    Filed: December 10, 2008
    Publication date: July 2, 2009
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takafumi Oka, Masatsugu Kusunoki, Kazushige Kawasaki, Shinji Abe, Hitoshi Sakuma
  • Publication number: 20090130790
    Abstract: A method for manufacturing a nitride semiconductor light-emitting element comprises: forming a semiconductor laminated structure wherein an n-type nitride semiconductor epitaxial layer, an active layer, and a p-type nitride semiconductor epitaxial layer are laminated on a substrate; forming a p-type electrode having a first electrode layer containing Pd and a second electrode layer containing Ta on the p-type nitride semiconductor epitaxial layer; heat treating at a temperature between 400° C. and 600° C. in an ambient containing oxygen after forming the p-type electrode; and forming a pad electrode containing Au on the p-type electrode after the heat treating.
    Type: Application
    Filed: November 5, 2008
    Publication date: May 21, 2009
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kyozo Kanamoto, Katsuomi Shiozawa, Kazushige Kawasaki, Shinji Abe, Hitoshi Sakuma
  • Publication number: 20090127661
    Abstract: Semiconductor devices, in particular nitride semiconductor devices for use in the manufacture of laser diodes, prevent peeling-off of the electrode, and at the same time reduces the complexity of processes and a reduction in yield. A nitride semiconductor device according to the invention includes a P-type nitride semiconductor layer with a ridge on its surface, an SiO2 film covering at least the side face of the ridge, an adherence layer formed on a surface of the SiO2 film and composed mainly of silicon, and a P-type electrode formed on the upper surface of the ridge and on a surface of the adherence layer.
    Type: Application
    Filed: November 17, 2008
    Publication date: May 21, 2009
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Katsuomi Shiozawa, Kyozo Kanamoto, Toshiyuki Oishi, Hiroshi Kurokawa, Kazushige Kawasaki, Shinji Abe, Hitoshi Sakuma
  • Publication number: 20080311694
    Abstract: An SiO2 film is formed on a semiconductor layer stack, the SiO2 film having a thickness da and an etch rate Ra in buffered (BHF). A waveguide ridge with the SiO2 film thereon is formed using a resist pattern 76. An SiN film is formed on top and both sides of the waveguide ridge, while leaving the resist pattern in place, the SiN film having a thickness db and an etch rate Rb in BHF, where 1<(db/Rb)/(da/Ra). Then the resist pattern and the overlying portion of the SiN film are removed by lift-off to form an opening in the SiN film. Wet etching for a predetermined period of time with BHF removes the SiO2 film from the waveguide ridge, while leaving the SiN film in place.
    Type: Application
    Filed: November 29, 2007
    Publication date: December 18, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazushige Kawasaki, Takafumi Oka, Katsuomi Shiozawa
  • Patent number: 7456039
    Abstract: An SiO2 film is formed on a semiconductor layer stack, the SiO2 film having a thickness da and an etch rate Ra in buffered (BHF). A waveguide ridge with the SiO2 film thereon is formed using a resist pattern 76. An SiN film is formed on top and both sides of the waveguide ridge, while leaving the resist pattern in place, the SiN film having a thickness db and an etch rate Rb in BHF, where 1<(db/Rb)/(da/Ra). Then the resist pattern and the overlying portion of the SiN film are removed by lift-off to form an opening in the SiN film. Wet etching for a predetermined period of time with BHF removes the SiO2 film from the waveguide ridge, while leaving the SiN film in place.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: November 25, 2008
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazushige Kawasaki, Takafumi Oka, Katsuomi Shiozawa
  • Publication number: 20080280386
    Abstract: A method for manufacturing an laser diode includes: providing a wafer having thereon a semiconductor structure; depositing an SiO2 film; forming channels and a waveguide ridge between the channels in the wafer; forming an SiO2 film over the wafer; forming a resist pattern covering the SiO2 film in the channels such that the top surfaces of the resist pattern are lower than the top surface of the deposited SiO2 film on the top of the waveguide ridge, the resist pattern exposing the SiO2 film on the top of the waveguide ridge; removing the SiO2 film and the deposited SiO2 film by wet etching, using the resist pattern as a mask, to expose a p-GaN layer in the waveguide ridge; and forming an electrode layer on the top surface of the p-GaN layer.
    Type: Application
    Filed: October 31, 2007
    Publication date: November 13, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazushige Kawasaki, Toshiaki Kitano, Takafumi Oka
  • Publication number: 20080272862
    Abstract: An electrically optimized and structurally protected micro via structure for high speed signals in multilayer interconnection substrates is provided. The via structure eliminates the overlap of a contact with the reference planes to thereby reduce the via capacitance and thus, the via impedance mismatch in the via structure. As a result, the via structure is electrically optimized. The via structure further comprises one or more floating support members placed in close proximity to the via within a via clearance area between the via and the reference planes. The floating support members are “floating” in the sense that they are not in electrical contact with either the via or the reference planes. Thus, they are not provided for purposes of signal propagation but only for structural support. The floating support members may be connected to one another by way of one or more microvia structures.
    Type: Application
    Filed: July 11, 2008
    Publication date: November 6, 2008
    Applicant: International Business Machines Corporation
    Inventors: Paul M. Harvey, Kazushige Kawasaki, Gen Yamada
  • Publication number: 20080211062
    Abstract: A semiconductor device and a manufacturing method thereof are provided which enable reduction and enhanced stability of contact resistance between the back surface of a nitride substrate and an electrode formed thereover. A nitride semiconductor device includes an n-type GaN substrate (1) over which a semiconductor element is formed, and an n-electrode (10) as a metal electrode formed over the back surface of the GaN substrate (1). A connection layer (20) is formed between the GaN substrate (1) and the n-electrode (10), and the connection layer (20) is composed of a material that is other than nitride semiconductors and that contains silicon.
    Type: Application
    Filed: March 2, 2007
    Publication date: September 4, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Katsuomi SHIOZAWA, Kyozo Kanamoto, Kazushige Kawasaki, Hitoshi Sakuma, Yuji Abe
  • Publication number: 20080205468
    Abstract: A semiconductor laser device comprises a GaN substrate having a refractive index of 3.5 or below, a semiconductor layer laminated on the substrate, and a pair of facets forming a resonator and in face-to-face-relation to each other in a direction perpendicular to the direction of the laminated layer. One of the facets of the resonator includes a low reflection film, of a first dielectric film, a second dielectric film, a third dielectric film, and a fourth dielectric film. When the refractive indexes of these films are taken as n1, n2, n3, and n4, n1=n3 and n2=n4. The following relationship between the first dielectric film and the third dielectric film, and between the second dielectric film and the fourth dielectric film is established, nd+n?d?=p?/4, where p is an integer, and ? is oscillation wavelength of a laser beam generated by the semiconductor laser device.
    Type: Application
    Filed: November 13, 2007
    Publication date: August 28, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazushige Kawasaki, Yasuyuki Nakagawa, Hiromasu Matsuoka
  • Patent number: 7378351
    Abstract: A nitride semiconductor device is manufactured by the step of forming a nitride semiconductor layer form on a GaN substrate main surface, the step of polishing a back surface of the GaN substrate formed with the above-mentioned nitride semiconductor layer, the step of dry etching the back surface of the GaN substrate subjected to the above-mentioned polishing by using a gas mixture of chlorine and oxygen, and the step of forming an n-type electrode on the back surface of the GaN substrate subjected to the above-mentioned dry etching.
    Type: Grant
    Filed: June 3, 2005
    Date of Patent: May 27, 2008
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Katsuomi Shiozawa, Toshiyuki Oishi, Kazushige Kawasaki, Zempei Kawazu, Yuji Abe
  • Publication number: 20080116575
    Abstract: A nitride semiconductor device according to the present invention includes a P-type contact layer and a P-type electrode provided on the P-type contact layer. The P-type electrode includes a AuGa film provided on the P-type contact layer, a Au film provided on the AuGa film, a Pt film 4 provided on the Au film, and a Au film provided on the Pt film. The ratio of the thickness of the AuGa film to the total thickness of the AuGa film and the Au film is not less than 12% but not more than 46%.
    Type: Application
    Filed: August 24, 2007
    Publication date: May 22, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Katsuomi Shiozawa, Hitoshi Sakuma, Kazushige Kawasaki, Toshihiko Shiga, Toshiyuki Oishi
  • Publication number: 20080090315
    Abstract: After a metal cap layer is laminated on a semiconductor laminated structure, a waveguide ridge is formed, the waveguide ridge is coated with an SiO2 film, and a resist is applied; then, a resist pattern is formed, the resist pattern exposing the surface of the SiO2 film on the top of the waveguide ridge, and burying the SiO2 film in channels with a resist film having a surface higher than the surface of the metal cap layer of the waveguide ridge and lower than the surface of the SiO2 film of the waveguide ridge; the SiO2 film is removed by dry etching, using the resist pattern as a mask. The metal cap layer is removed by wet etching, and a p-GaN layer of the waveguide ridge is exposed to form the electrode layer.
    Type: Application
    Filed: October 8, 2007
    Publication date: April 17, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Shinji Abe, Kazushige Kawasaki
  • Publication number: 20080073796
    Abstract: An electrically optimized and structurally protected micro via structure for high speed signals in multilayer interconnection substrates is provided. The via structure eliminates the overlap of a contact with the reference planes to thereby reduce the via capacitance and thus, the via impedance mismatch in the via structure. As a result, the via structure is electrically optimized. The via structure further comprises one or more floating support members placed in close proximity to the via within a via clearance area between the via and the reference planes. The floating support members are “floating” in the sense that they are not in electrical contact with either the via or the reference planes. Thus, they are not provided for purposes of signal propagation but only for structural support. The floating support members may be connected to one another by way of one or more microvia structures.
    Type: Application
    Filed: September 27, 2006
    Publication date: March 27, 2008
    Inventors: Paul M. Harvey, Kazushige Kawasaki, Gen Yamada
  • Publication number: 20080023799
    Abstract: A nitride semiconductor device includes an n-type GaN substrate with a semiconductor device formed thereon and an n-type electrode which is a metal electrode formed on the rear surface of the GaN substrate. A surface modified layer and a reaction layer are interposed between the GaN substrate and n-type electrode. The surface modified layer serves as a carrier supplying layer, and is formed by causing the rear surface of the GaN substrate to react with a Si-containing plasma to be modified. The reaction layer is generated by partially removing a deposited material deposited on the surface modified layer by cleaning to generate a deposited layer and then causing Ti contained in a first metal layer and the deposited layer to partially react by heat treatment.
    Type: Application
    Filed: July 2, 2007
    Publication date: January 31, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kyozo KANAMOTO, Katsuomi Shiozawa, Kazushige Kawasaki, Hitoshi Sakuma, Junichi Horie, Toshihiko Shiga, Toshiyuki Oishi