Patents by Inventor Kazuto Tsuji

Kazuto Tsuji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6573121
    Abstract: A semiconductor device includes a semiconductor element, a resin package sealing the semiconductor element, resin projections protruding downward from a mounting surface of the resin package, metallic film portions provided to the resin projections, and connecting members electrically connecting the semiconductor elements to the metallic film parts. Outer circumference surfaces of the resin package are upright surfaces defined by cutting.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: June 3, 2003
    Assignee: Fujitsu Limited
    Inventors: Yoshiyuki Yoneda, Ryuji Nomoto, Toshiyuki Motooka, Kazuto Tsuji, Junichi Kasai, Toshimi Kawahara, Hideharu Sakoda, Kenji Itasaka, Terumi Kamifukumoto
  • Publication number: 20030071342
    Abstract: A semiconductor device includes a resin housing provided with a functional part, a wire pattern made of a conductive material and molded in the resin housing, a part of the wire pattern being exposed from the resin housing, an electronic part connected with the wire pattern in a state where the electronic parts is molded in the resin housing, and a semiconductor element connected to the part of the wire pattern being exposed from the resin housing. The semiconductor element provides a designated function in cooperation with a functional part of the resin housing.
    Type: Application
    Filed: March 28, 2002
    Publication date: April 17, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Toshiyuki Honda, Kazuto Tsuji, Masanori Onodera, Hiroshi Aoki, Izumi Kobayashi, Susumu Moriya, Hiroshi Kaiya
  • Publication number: 20030031204
    Abstract: Method and apparatus for encoding overhead is described. More particularly, on a receive side channels are multiplexed, and a channel is selected for overhead to process. Transport Overhead and Path Overhead are parsed out and provided to an overhead extractor for encoding. Overhead is encoded according to channel number, frame number, row location and column location (“encoded information”), where either row location or column location is dependent on frame number. On the transmit side, encoded overhead is received at an overhead inserter and parsed back for line output by decoding the encoded information.
    Type: Application
    Filed: September 27, 2001
    Publication date: February 13, 2003
    Inventors: Michael Yo-Yun Ho, Oon-Sim Ang, Barry Kazuto Tsuji, Oreste Basil Varelas
  • Publication number: 20030006503
    Abstract: A device includes a chip, and a resin package sealing the chip, the resin package having resin projections located on a mount-side surface of the resin package. Metallic films are respectively provided to the resin projections. Connecting parts electrically connect electrode pads of the chip and the metallic films.
    Type: Application
    Filed: November 17, 1999
    Publication date: January 9, 2003
    Inventors: YOSHIYUKI YONEDA, KAZUTO TSUJI, SEIICHI ORIMO, HIDEHARU SAKODA, RYUJI NOMOTO, MASANORI ONODERA, JUNICHI KASAI
  • Patent number: 6495773
    Abstract: A wire bonding method includes a first bonding process for forming a first ball-shaped part in a wire and bonding the first ball-shaped part to a first connected member; a ball-shaped part forming process for guiding the wire away from a position where the wire is bonded to an inner lead so as to form a predetermined loop, and a second bonding process for forming a second ball-shaped part in a predetermined position in the wire; and a second bonding process for bonding the second ball-shaped part to a semiconductor element pad that serves as a second connected member.
    Type: Grant
    Filed: September 25, 1998
    Date of Patent: December 17, 2002
    Assignee: Fujitsu Limited
    Inventors: Ryuji Nomoto, Kazuto Tsuji, Mitsutaka Sato, Junichi Kasai
  • Publication number: 20020172225
    Abstract: Method and apparatus is described for decoupling data from a clock signal and recoupling the data to a different clock signal for subsequent synchronous processing by a pointer processor. More particularly, on a receive or drop side, one buffer is configured to store payload pointers and a synchronous payload envelope arriving clocked by a line clock signal, while another buffer is configure to store TOH or SOH arriving clocked by the line clock signal. Each buffer clocks out such stored information off of a same system clock signal, such as a drop clock signal. On a transmit or add side, a buffer is configured to store payload pointers and a synchronous payload envelope. This buffer clocks in such stored information off of a system clock signal, such as an add clock signal, and clocks out such stored information off of a transmit reference clock signal.
    Type: Application
    Filed: August 14, 2001
    Publication date: November 21, 2002
    Inventors: Oon-Sim Ang, Barry Kazuto Tsuji, Oreste Basil Varelas
  • Patent number: 6472744
    Abstract: A semiconductor module includes a plurality of semiconductor devices each including a circuit substrate carrying thereon a single memory semiconductor chip and a socket for holding the semiconductor devices detachably.
    Type: Grant
    Filed: May 26, 1998
    Date of Patent: October 29, 2002
    Assignee: Fujitsu Limited
    Inventors: Mitsutaka Sato, Tetsuya Fujisawa, Shigeyuki Maruyama, Junichi Kasai, Toshimi Kawahara, Toshio Hamano, Yoshihiro Kubota, Mitsunada Osawa, Yoshiyuki Yoneda, Kazuto Tsuji, Hirohisa Matsuki
  • Publication number: 20020119658
    Abstract: A semiconductor device includes a resin housing provided with a functional part, a wire pattern made of a conductive material and molded in the resin housing, a part of the wire pattern being exposed from the resin housing, an electronic part connected with the wire pattern in a state where the electronic parts is molded in the resin housing, and a semiconductor element connected to the part of the wire pattern being exposed from the resin housing. The semiconductor element provides a designated function in cooperation with a functional part of the resin housing.
    Type: Application
    Filed: December 12, 2001
    Publication date: August 29, 2002
    Applicant: Fujitsu Limited
    Inventors: Toshiyuki Honda, Kazuto Tsuji, Masanori Onodera, Hiroshi Aoki, Izumi Kobayashi, Susumu Moriya, Hiroshi Kaiya
  • Patent number: 6376921
    Abstract: A semiconductor device includes a semiconductor element, a resin package sealing the semiconductor element, resin projections protruding downward from a mounting surface of the resin package, metallic film portions provided to the resin projections, and connecting members electrically connecting the semiconductor elements to the metallic film parts.
    Type: Grant
    Filed: November 16, 1998
    Date of Patent: April 23, 2002
    Assignee: Fujitsu Limited
    Inventors: Yoshiyuki Yoneda, Ryuji Nomoto, Toshiyuki Motooka, Kazuto Tsuji, Junichi Kasai, Toshimi Kawahara, Hideharu Sakoda, Kenji Itasaka, Terumi Kamifukumoto
  • Publication number: 20020027265
    Abstract: A semiconductor device includes a semiconductor element, a resin package sealing the semiconductor element, resin projections protruding downward from a mounting surface of the resin package, metallic film portions provided to the resin projections, and connecting members electrically connecting the semiconductor elements to the metallic film parts. Outer circumference surfaces of the resin package are upright surfaces defined by cutting.
    Type: Application
    Filed: March 16, 2001
    Publication date: March 7, 2002
    Applicant: Fujitsu Limited
    Inventors: Yoshiyuki Yoneda, Ryuji Nomoto, Toshiyuki Motooka, Kazuto Tsuji, Junichi Kasai, Toshimi Kawahara, Hideharu Sakoda, Kenji Itasaka, Terumi Kamifukumoto
  • Publication number: 20020000645
    Abstract: A semiconductor module includes a plurality of semiconductor devices each including a circuit substrate carrying thereon a single memory semiconductor chip and a socket for holding the semiconductor devices detachably.
    Type: Application
    Filed: May 26, 1998
    Publication date: January 3, 2002
    Inventors: MITSUTAKA SATO, TETSUYA FUJISAWA, SHIGEYUKI MARUYAMA, JUNICHI KASAI, TOSHIMI KAWAHARA, TOSHIO HAMANO, YOSHIHIRO KUBOTA, MITSUNADA OSAWA, YOSHIYUKI YONEDA, KAZUTO TSUJI, HIROHISA MATSUKI
  • Patent number: 6271583
    Abstract: A semiconductor device includes a substrate having a first surface, a second surface and at least one conductor part which are exposed at both the first and second surfaces of the substrate, a semiconductor chip provided on the first surface of the substrate and having a plurality of electrode pads, a plurality of leads, a plurality of bonding-wires electrically connecting the leads and the conductor parts to corresponding ones of the electrode pads of the semiconductor chip, and a resin package encapsulating the semiconductor chip, a part of the leads, and the substrate so that the conductor parts are exposed at the second surface of the substrate.
    Type: Grant
    Filed: June 16, 1998
    Date of Patent: August 7, 2001
    Assignee: Fujitsu Limited
    Inventors: Hideharu Sakoda, Yoshiyuki Yoneda, Kazuto Tsuji
  • Patent number: 6255740
    Abstract: This invention relates to a semiconductor device in which a plurality of outer terminals are arranged in a lattice formation on a flat surface. The semiconductor device has a semiconductor chip, a lead member having a lead portion and an outer connecting terminal connected integrally to the lead portion, the lead portion electrically connected to the semiconductor chip, the lead portion extending outwardly from the semiconductor chip, the outer connecting terminal extending downwardly from the lead portion, a sealing resin sealing the semiconductor chip and the lead portion, a bottom face of the semiconductor chip and a bottom face of the lead portion being exposed from the sealing resin, and an insulating member covering the bottom face of the semiconductor chip and the bottom face of the lead portion.
    Type: Grant
    Filed: May 1, 1997
    Date of Patent: July 3, 2001
    Assignee: Fujitsu Limited
    Inventors: Kazuto Tsuji, Yoshiyuki Yoneda, Hideharu Sakoda, Ryuji Nomoto, Eiji Watanabe, Seiichi Orimo, Masanori Onodera, Masaki Waki
  • Patent number: 6191494
    Abstract: A semiconductor device and a method of producing the same are provided. The semiconductor device includes: a semiconductor chip; a resin package which seals the semiconductor chip; signal passages which guide the signal terminals of the semiconductor chip outward from the resin package; a grounding metal film in contact with the bottom surface of the semiconductor chip; and a grounding passage which is connected to the grounding metal film and guided outward from the resin package.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: February 20, 2001
    Assignee: Fujitsu Limited
    Inventors: Nobuo Ooyama, Shinichiro Maki, Fumitoshi Fujisaki, Syunichi Kuramoto, Yukio Saigo, Yasuo Yatsuda, Youichi Matae, Atsushi Yano, Kazuto Tsuji, Masafumi Tetaka
  • Patent number: 6159770
    Abstract: There is provided a method for fabricating semiconductor devices including resin packages sealing semiconductor elements and external connection terminals respectively resin projections formed on the resin packages and metallic film parts provided to the resin projections. The semiconductor elements are mounted to a lead frame having recess portions located in positions corresponding to positions of the resin projections, metallic film parts being provided in the recess portions. The semiconductor elements are electrically connected to the metallic film parts. The resin packages that seal the semiconductor elements and gate portions are integrally formed with the resin packages. The lead frame is etched so that the resin packages are separated from the lead frame together with the metallic layer parts. The resin packages are attached to an adhesive tape provided to a frame and being used as a carrier.
    Type: Grant
    Filed: November 16, 1998
    Date of Patent: December 12, 2000
    Assignee: Fujitsu Limited
    Inventors: Masafumi Tetaka, Shinichiro Maki, Nobuo Ohyama, Seiichi Orimo, Hideharu Sakoda, Yoshiyuki Yoneda, Akihiro Shigeno, Ryoichi Yokoyama, Fumitoshi Fujisaki, Masao Fukunaga, Kazuto Tsuji, Terumi Kamifukumoto, Kenji Itasaka, Masanori Onodera
  • Patent number: 6072239
    Abstract: A device includes a chip, and a resin package sealing the chip, the resin package having resin projections located on a mount-side surface of the resin package. Metallic films are respectively provided to the resin projections. Connecting parts electrically connect electrode pads of the chip and the metallic films.
    Type: Grant
    Filed: November 6, 1996
    Date of Patent: June 6, 2000
    Assignee: Fujitsu Limited
    Inventors: Yoshiyuki Yoneda, Kazuto Tsuji, Seiichi Orimo, Hideharu Sakoda, Ryuji Nomoto, Masanori Onodera, Junichi Kasai
  • Patent number: 6069408
    Abstract: A method of manufacturing a semiconductor device includes the steps of: mounting a semiconductor chip on a holding board having electrode accommodation recesses formed thereon, and mounting electrode members to the electrode accommodation recesses, the electrode members being formed separately from the semiconductor element; electrically connecting electrode pads formed on the semiconductor chip with the electrode members; forming a resin package for sealing the semiconductor chip on the holding board by using a die, the holding board serving as a part of the die; and separating the resin package including the electrode members from the holding board.
    Type: Grant
    Filed: January 14, 1999
    Date of Patent: May 30, 2000
    Assignee: Fujitsu Limited
    Inventors: Toshiyuki Honda, Akihiro Oku, Takanori Watanabe, Kazuto Tsuji, Yoshiyuki Yoneda
  • Patent number: 6025650
    Abstract: This invention relates to a semiconductor device in which a plurality of outer terminals are arranged in a lattice formation on a flat surface. The semiconductor device comprises a semiconductor chip having a plurality of pads, a resin portion sealing said semiconductor chip and a terminal portion in which a prescribed number of pole terminals electrically connected to said pads provided in said semiconductor chip are provided, said pole terminals being exposed from said resin portion. According to the invention, a cost for production is reduced and a reliability and electrical characteristics can be improved.
    Type: Grant
    Filed: October 30, 1997
    Date of Patent: February 15, 2000
    Assignee: Fujitsu Limited
    Inventors: Kazuto Tsuji, Yoshiyuki Yoneda, Hideharu Sakoda, Ryuuji Nomoto, Eiji Watanabe, Seiichi Orimo, Masanori Onodera, Junichi Kasai
  • Patent number: 5930603
    Abstract: A method for producing a semiconductor device includes steps of: a) a positioning board forming process in which concave portions, each of which is located at a position corresponding to a position of a respective projecting electrode of a semiconductor device, and first positioning portions, which are used for determining a position of a sealing resin with respect to the projecting electrode, are integrally formed on a flat-plate member so as to form a positioning board; b) a filling process in which an electrode material for forming the projecting electrode is filled in the concave portions formed on the positioning board; c) a bonding process in which a composite board is formed by mounting a circuit board on the positioning board so as to bond each of the electrode material filled in the concave portions to the circuit board; d) a sealing resin forming process in which a mold having a cavity for forming a sealing resin and second positioning portions for determining a position of the positioning board wit
    Type: Grant
    Filed: May 27, 1997
    Date of Patent: July 27, 1999
    Assignee: Fujitsu Limited
    Inventors: Kazuto Tsuji, Yoshiyuki Yoneda, Seiichi Orimo, Ryuji Nomoto, Masanori Onodera, Hideharu Sakoda
  • Patent number: 5904506
    Abstract: A semiconductor device includes a rigid member embedded in a resin package body for supporting thereon outer leads that extend from the resin package body and test pads provided on the outer leads for testing the semiconductor device.
    Type: Grant
    Filed: April 10, 1998
    Date of Patent: May 18, 1999
    Assignee: Fujitsu Limited
    Inventors: Yoshiyuki Yoneda, Kazuto Tsuji