Patents by Inventor Kazuya Kobayashi

Kazuya Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210039635
    Abstract: An in-vehicle controlling apparatus, comprising an evaluation unit configured to evaluate a sense-of-security level a passenger may feel with respect to an object present in a traveling direction of a self-vehicle, and a signal generation unit configured to generate a predetermined signal based on the sense-of-security level, wherein the evaluation unit evaluates the sense-of-security level based on a time headway and a temporal variation component of the time headway.
    Type: Application
    Filed: August 3, 2020
    Publication date: February 11, 2021
    Inventors: Kazuya KOBAYASHI, Ken AMEMIYA, Soichiro UEURA
  • Patent number: 10777667
    Abstract: A semiconductor device has bipolar transistors on a substrate. There is also an insulating film on the substrate, covering the bipolar transistors. On this insulating film is emitter wiring, sticking through openings in the insulating film (first openings) to be electrically coupled to the emitter layer of the bipolar transistors. On the emitter wiring is a protective film. On the protective film is a bump, sticking through an opening in the protective film (second opening) to be electrically coupled to the emitter wiring. In plan view, the second opening is included in the area that is inside the bump and outside the first openings.
    Type: Grant
    Filed: November 12, 2019
    Date of Patent: September 15, 2020
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Atsushi Kurokawa, Koshi Himeda, Kazuya Kobayashi
  • Publication number: 20200243671
    Abstract: A semiconductor element includes a semiconductor substrate; a collector layer on the semiconductor substrate; a base layer on the collector layer; an emitter layer on the base layer; emitter wiring electrically coupled to the emitter layer; a top metal layer on the emitter wiring; a first protective film covering the emitter wiring and the top metal layer, the first protective film having a first opening that overlaps at least the collector layer; and a bump including an under-bump metal layer electrically coupled to the emitter wiring via the first opening, the under-bump metal layer being larger than the first opening in plan-view area. The first protective film has an inner edge around the first opening, and the inner edge is on the top metal layer.
    Type: Application
    Filed: January 24, 2020
    Publication date: July 30, 2020
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Atsushi KUROKAWA, Kazuya KOBAYASHI
  • Publication number: 20200235026
    Abstract: A semiconductor apparatus includes a substrate, plural transistor groups disposed on the substrate, an insulating film, and a metal member. Each of the plural transistor groups includes plural unit transistors arranged in a first direction within a plane of a top surface of the substrate. The plural transistor groups are arranged in a second direction perpendicular to the first direction. The insulating film covers the plural unit transistors and includes at least one cavity. The metal member is disposed on the insulating film and is electrically connected to the plural unit transistors via the at least one cavity. A heat transfer path is formed by a metal in a region from each of the plural unit transistors to a top surface of the metal member. Thermal resistance values of the heat transfer paths are different from each other among the plural unit transistors.
    Type: Application
    Filed: January 22, 2020
    Publication date: July 23, 2020
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Atsushi KUROKAWA, Koshi HIMEDA, Kazuya KOBAYASHI
  • Publication number: 20200168725
    Abstract: A semiconductor device has bipolar transistors on a substrate. There is also an insulating film on the substrate, covering the bipolar transistors. On this insulating film is emitter wiring, sticking through openings in the insulating film (first openings) to be electrically coupled to the emitter layer of the bipolar transistors. On the emitter wiring is a protective film. On the protective film is a bump, sticking through an opening in the protective film (second opening) to be electrically coupled to the emitter wiring. In plan view, the second opening is included in the area that is inside the bump and outside the first openings.
    Type: Application
    Filed: November 12, 2019
    Publication date: May 28, 2020
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Atsushi KUROKAWA, Koshi HIMEDA, Kazuya KOBAYASHI
  • Publication number: 20200161226
    Abstract: A dielectric film is disposed on a semiconductor substrate, and a conductor including a bent section is arranged between the semiconductor substrate and the dielectric film. A pad is disposed on the dielectric film. The pad is covered with a protective film. The protective film has an opening through which an upper surface of the pad is exposed. The bent section in the conductor and the pad overlap each other as seen in plan view, and an inside corner and an outside corner in the bent section are chamfered.
    Type: Application
    Filed: January 22, 2020
    Publication date: May 21, 2020
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Atsushi KUROKAWA, Hiroaki TOKUYA, Kazuya KOBAYASHI, Yuichi SANO
  • Patent number: 10612449
    Abstract: A piston cooling device includes a main body which includes a communication path communicating with an oil passage provided in the internal combustion engine, a nozzle pipe portion which includes an oil injection port for injecting an oil passing through the communication path, toward the piston, and a filter which is provided at an upstream side of the nozzle pipe portion in an oil flow path to filter the oil. The main body includes a cylindrical portion inserted into the oil passage. The filter has a bottomed cylindrical shape in which a filter side surface stands from a filter bottom surface, and is held inside the cylindrical portion. Filter holes are formed in the filter bottom surface and the filter side surface. The filter is disposed such that the filter bottom surface protrudes further upstream side in the oil flow path than a tip end of the cylindrical portion.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: April 7, 2020
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Hiroshi Sotani, Shinsuke Kawakubo, Kazuya Kobayashi
  • Publication number: 20200006265
    Abstract: A target element to be protected and a protrusion are arranged on a substrate. An insulating film arranged on the substrate covers the target element and at least a side surface of the protrusion. An electrode pad for external connection is arranged on the insulating film. The electrode pad at least partially overlaps the target element and the protrusion as seen in plan view. A maximum distance between the upper surface of the protrusion and the electrode pad in the height direction is shorter than a maximum distance between the upper surface of the target element and the electrode pad in the height direction.
    Type: Application
    Filed: June 26, 2019
    Publication date: January 2, 2020
    Inventors: Kazuya KOBAYASHI, Atsushi KUROKAWA, Hiroaki TOKUYA, Isao OBU, Yuichi SAITO
  • Patent number: 10121746
    Abstract: A semiconductor device includes a semiconductor substrate, a first metal layer, an insulation layer, an organic layer, and a second metal layer. The first metal layer, the insulation layer, the organic layer, and the second metal layer are sequentially stacked on a surface of the semiconductor substrate. The first metal layer and the second metal layer are electrically connected to each other through vias formed in the insulation layer and the organic layer. The second metal layer includes an electrode pad at a position corresponding to the positions of the vias. At the interface between the surface of the semiconductor substrate and the first metal layer, a patch portion having a trapezoidal cross-sectional shape is disposed directly below the vias.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: November 6, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazuya Kobayashi, Yuichi Sano, Daisuke Tokuda, Hiroaki Tokuya
  • Publication number: 20180283257
    Abstract: A piston cooling device includes a main body which includes a communication path communicating with an oil passage provided in the internal combustion engine, a nozzle pipe portion which includes an oil injection port for injecting an oil passing through the communication path, toward the piston, and a filter which is provided at an upstream side of the nozzle pipe portion in an oil flow path to filter the oil. The main body includes a cylindrical portion inserted into the oil passage. The filter has a bottomed cylindrical shape in which a filter side surface stands from a filter bottom surface, and is held inside the cylindrical portion. Filter holes are formed in the filter bottom surface and the filter side surface. The filter is disposed such that the filter bottom surface protrudes further upstream side in the oil flow path than a tip end of the cylindrical portion.
    Type: Application
    Filed: March 28, 2018
    Publication date: October 4, 2018
    Applicant: HONDA MOTOR CO., LTD.
    Inventors: Hiroshi SOTANI, Shinsuke KAWAKUBO, Kazuya KOBAYASHI
  • Publication number: 20180247895
    Abstract: A semiconductor device includes electrodes which contain Au and which are placed above conductive layers in a region adjacent to stacked insulating films and also includes base layers which are composed of compositionally modulated layers and which are placed between the electrodes and the conductive layers. The base layers include lateral end sections composed of single layers projecting from lateral end sections of the electrodes in the direction of the interlayer interface between the insulating films; sections which are located under the electrodes and of which a major compositional component is Ti or Ti and W; and projecting sections which project from under the electrodes in the direction of the interlayer interface between the insulating films and of which compositional components are compositionally modulated to Ti and O, to Ti, O, and N, or to Ti, W, O, and N.
    Type: Application
    Filed: February 23, 2018
    Publication date: August 30, 2018
    Inventors: Yuichi SANO, Atsushi KUROKAWA, Kazuya KOBAYASHI
  • Publication number: 20180145028
    Abstract: A semiconductor device includes a semiconductor substrate, a first metal layer, an insulation layer, an organic layer, and a second metal layer. The first metal layer, the insulation layer, the organic layer, and the second metal layer are sequentially stacked on a surface of the semiconductor substrate. The first metal layer and the second metal layer are electrically connected to each other through vias formed in the insulation layer and the organic layer. The second metal layer includes an electrode pad at a position corresponding to the positions of the vias. At the interface between the surface of the semiconductor substrate and the first metal layer, a patch portion having a trapezoidal cross-sectional shape is disposed directly below the vias.
    Type: Application
    Filed: November 16, 2017
    Publication date: May 24, 2018
    Inventors: Kazuya Kobayashi, Yuichi Sano, Daisuke Tokuda, Hiroaki Tokuya
  • Patent number: 9826535
    Abstract: A processor performs a process that includes decoding, from among a radio signal received by the radio signal receiving apparatus, control data that includes information indicating frequency bands that a mobile station apparatus is capable of dealing with, component carriers and scenarios for carrier aggregation, receiving the decoded control data, calculating, in accordance with the received control data, a transmission-bandwidth adjacency level value indicating a policy on component-carrier allocation to the mobile station apparatus, determining, in accordance with the calculated transmission-bandwidth adjacency level value, a component carrier to be allocated to the mobile station apparatus from among the component carriers and the frequency bands that the mobile station apparatus is capable of dealing with; and generating a transmission signal that includes information indicating the determined component carrier.
    Type: Grant
    Filed: April 27, 2015
    Date of Patent: November 21, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Kazuya Kobayashi, Takato Ezaki
  • Publication number: 20170127357
    Abstract: An apparatus includes a memory and a processor coupled to the memory. The processor is configured to execute reception processing. The reception processing includes a process of receiving a signal from a target terminal among a plurality of terminals by a control channel adapted to multiplexing the signal transmitted from the target terminal with one or more of signals transmitted from any of the plurality of terminals except for the target terminal, and a process of performing automatic frequency control, based on the signal received from the target terminal, for a data signal received from the target terminal. The processor is configured to execute adjustment processing. The adjustment processing includes a process of performing adjustment of a first transmission power of the signal in the target terminal based on a second transmission power of the one or more of signals in the any of the plurality of terminals.
    Type: Application
    Filed: October 24, 2016
    Publication date: May 4, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Kazuya Kobayashi, Yoshiyuki Ono, Shunsuke IIZUKA
  • Publication number: 20170034693
    Abstract: A base station apparatus includes a memory; and a processor coupled to the memory, the processor configured to: sequentially acquire terminal identification IDs, and update and retain the terminal identification IDs. Each of the terminal identification IDs indicates a current connection state of a terminal with respect to each second base station apparatus among second base station apparatuses of cells managed by the base station apparatus including a cell of the base station apparatus. The processor, when communication is performed with the terminal through carrier aggregation, acquires the terminal identification IDs in the cells subject to the carrier aggregation and obtains a usable terminal identification ID usable across the cells subject to the carrier aggregation.
    Type: Application
    Filed: October 6, 2016
    Publication date: February 2, 2017
    Inventors: Yoshiyuki ONO, Kazuya KOBAYASHI
  • Patent number: 9491642
    Abstract: A base station includes an antenna, a sending unit, a monitoring unit, and a controlling unit. The antenna is configured to be operated corresponding to a communication area of the base station, the antenna being capable of controlling a tilt angle, the tilt angle being an angle made by a vertical direction and a direction of a main beam of the antenna. The sending unit is configured to send a command corresponding to adjustment of timing of sending a signal sent from a mobile station. The monitoring unit is configured to monitor the number of mobile stations present in the communication area by using the command. The controlling unit is configured to reduce the tilt angle when the number of mobile stations exceeds an upper limit allowed to be contained in the communication area.
    Type: Grant
    Filed: October 10, 2013
    Date of Patent: November 8, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Seiji Hamada, Kazuya Kobayashi
  • Patent number: 9374794
    Abstract: In a communication system including first and second base stations, an apparatus operates as the first base station. The apparatus determines a first reference timing that is used as a reference timing for transmitting a downlink signal, and adjusts the determined first reference timing to a second reference timing being used in the second base station. The apparatus corrects a deviation of the first reference timing from the second reference timing, which has occurred after adjustment of the first reference timing, in accordance with a receiving timing of a preamble signal transmitted from a mobile station device to the second base station.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: June 21, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Yoshiyuki Ono, Kazuya Kobayashi
  • Publication number: 20150230233
    Abstract: A processor performs a process that includes decoding, from among a radio signal received by the radio signal receiving apparatus, control data that includes information indicating frequency bands that a mobile station apparatus is capable of dealing with, component carriers and scenarios for carrier aggregation, receiving the decoded control data, calculating, in accordance with the received control data, a transmission-bandwidth adjacency level value indicating a policy on component-carrier allocation to the mobile station apparatus, determining, in accordance with the calculated transmission-bandwidth adjacency level value, a component carrier to be allocated to the mobile station apparatus from among the component carriers and the frequency bands that the mobile station apparatus is capable of dealing with; and generating a transmission signal that includes information indicating the determined component carrier.
    Type: Application
    Filed: April 27, 2015
    Publication date: August 13, 2015
    Inventors: Kazuya Kobayashi, Takato Ezaki
  • Publication number: 20150131606
    Abstract: An allocation of radio resources in one of first and second radio areas in which a fading frequency estimated value with a relatively low estimation accuracy is obtained is controlled based on a fading frequency estimated value with a relatively high estimation accuracy among the fading frequency estimated values obtained from a radio signal sent by the radio terminal and received in the first and second radio areas.
    Type: Application
    Filed: September 24, 2014
    Publication date: May 14, 2015
    Inventors: Kazuya Kobayashi, Shunsuke IIZUKA, Seiji Hamada
  • Patent number: 8933497
    Abstract: A semiconductor switch device and a method of manufacturing the semiconductor switch device are provided. The semiconductor switch device includes semiconductor elements on a single semiconductor substrate. At least one of the semiconductor elements constitutes a switch circuit and at least one other of the semiconductor elements constitutes a logic (connection) circuit. Each semiconductor element includes a recess, a gate electrode in the recess, a drain electrode, and a source electrode. In one representative aspect, the gate electrode in the switch circuit can have a rectangular external shape in section, and the gate electrode in the connection circuit has a shape in section other than rectangular.
    Type: Grant
    Filed: November 15, 2011
    Date of Patent: January 13, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Tsunekazu Saimei, Kazuya Kobayashi, Koshi Himeda, Nobuyoshi Okuda