Patents by Inventor Kazuyoshi Furukawa

Kazuyoshi Furukawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9203800
    Abstract: A communication method executed by a node in an ad hoc network having multiple nodes, includes receiving from a neighboring node of the node in the ad hoc network, a first packet that includes a sender address of the neighboring node and a first packet transmission count of packet transmissions from the neighboring node; extracting the first packet transmission count from the first packet; receiving from the neighboring node and after reception of the first packet, a second packet that includes the sender address of the neighboring node and a second packet transmission count of packet transmissions from the neighboring node; extracting the second packet transmission count from the second packet; determining whether the second packet is an invalid packet, based on the first packet transmission count and the second packet transmission count; and discarding the second packet upon determining the second packet to be an invalid packet.
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: December 1, 2015
    Assignee: FUJITSU LIMITED
    Inventors: Tetsuya Izu, Masahiko Takenaka, Kazuyoshi Furukawa, Hisashi Kojima
  • Patent number: 9147798
    Abstract: According to one embodiment, a semiconductor light emitting element includes a light emitting element includes a semiconductor stacked body including a light emitting layer, a reflection layer, a support substrate, a first bonding electrode and a second bonding electrode. The reflection layer is made of a metal and has a first surface and a second surface opposite to the first surface. The semiconductor stacked body is provided on a side of the first surface of the reflection layer. The first bonding electrode is provided between the second surface and the support substrate and includes a convex portion projected toward the support substrate and a bottom portion provided around the convex portion in plan view. The second bonding electrode includes a concave portion fitted in the convex portion of the first bonding electrode and is capable of bonding the support substrate and the first bonding electrode.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: September 29, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiko Akaike, Yoshinori Natsume, Shinji Nunotani, Kazuyoshi Furukawa
  • Publication number: 20150249180
    Abstract: According to one embodiment, a semiconductor light emitting element includes a light emitting element includes a semiconductor stacked body including a light emitting layer, a reflection layer, a support substrate, a first bonding electrode and a second bonding electrode. The reflection layer is made of a metal and has a first surface and a second surface opposite to the first surface. The semiconductor stacked body is provided on a side of the first surface of the reflection layer. The first bonding electrode is provided between the second surface and the support substrate and includes a convex portion projected toward the support substrate and a bottom portion provided around the convex portion in plan view. The second bonding electrode includes a concave portion fitted in the convex portion of the first bonding electrode and is capable of bonding the support substrate and the first bonding electrode.
    Type: Application
    Filed: April 29, 2015
    Publication date: September 3, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiko AKAIKE, Yoshinori Natsume, Shinji Nunotani, Kazuyoshi Furukawa
  • Publication number: 20150149519
    Abstract: An apparatus for generating physical random numbers includes a physical random number generator configured to generate physical random numbers, a test unit configured to perform a test process to check randomness of the physical random numbers, a minimum entropy estimating unit configured to estimate a minimum entropy based on statistical information generated as a byproduct of the test process, an entropy compressing unit configured to perform an entropy compression process using the physical random numbers as an input, and an entropy control unit configured to control based on the minimum entropy a number of bits of the physical random numbers input into the entropy compression process performed by the entropy compressing unit.
    Type: Application
    Filed: November 17, 2014
    Publication date: May 28, 2015
    Inventors: Hirotaka KOKUBO, Dai YAMAMOTO, Masahiko TAKENAKA, Kazuyoshi FURUKAWA, Tetsuya IZU
  • Patent number: 9032203
    Abstract: A key setting method executed by a node within communication ranges of multiple ad-hoc networks, includes receiving encrypted packets encrypted by respective keys specific to gateways and broadcasted from the gateways in the ad-hoc networks; detecting connection with a mobile terminal communicable with a server retaining the keys specific to the gateways in each ad-hoc network among the ad-hoc networks; transmitting to the server when connection with the mobile terminal is detected, the encrypted packets via the mobile terminal; receiving from the server via the mobile terminal, the keys that are specific to the gateways in the ad-hoc networks and that are for decrypting each encrypted packet among the encrypted packets; and setting each of the received keys as a key to encrypt data that is to be encrypted in the node and decrypt data that is to be decrypted in the node.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: May 12, 2015
    Assignee: Fujitsu Limited
    Inventors: Masahiko Takenaka, Tetsuya Izu, Kazuyoshi Furukawa, Hisashi Kojima
  • Publication number: 20140348000
    Abstract: A network system includes: a plurality of node devices including a first node device and a second node device; and a verification node device that has a higher processing capacity than the plurality of node devices. The verification node device transmits a first packet including an identifier indicating the verification node device. The first node device receives a second packet from another node device out of the plurality of node devices, and determines, based on a destination of the second packet, reception of a packet from the second node device, and reception of the first packet, a transmission destination of a third packet that corresponds to reception of the second packet, from among the second node device and the verification node device. And, the verification node device verifies the third packet in a case of receiving the third packet.
    Type: Application
    Filed: August 11, 2014
    Publication date: November 27, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Tetsuya IZU, Yumi SAKEMI, Kazuyoshi FURUKAWA, Hisashi KOJIMA, Masahiko TAKENAKA
  • Publication number: 20140334383
    Abstract: A node device which is provided in a network and for transmitting a packet including a first header portion, a second header portion, a payload data portion, the node device includes: a memory and a processor coupled to the memory. The processor is configured to: calculate a first value that is a first logical relationship for payload data set in the payload data portion and first header information including a transmission destination address set in the first header portion, and transmit a packet including the payload data, the first header information, second header information including a final transmission destination address set in the second header portion, the first value and a second value that is a second logical relationship to the payload data and the second header information to outside of the node device.
    Type: Application
    Filed: July 23, 2014
    Publication date: November 13, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Yumi Sakemi, Tetsuya Izu, Kazuyoshi Furukawa, Hisashi Kojima, Masahiko Takenaka
  • Publication number: 20140286171
    Abstract: A node in an ad-hoc network includes a memory unit storing a concatenated counter value including an erasure counter value and a transmission counter value for the node; and a processor configured to: add one to the transmission counter value, when the node transmits data to another node in the ad-hoc network; transmit to the other node, the data and the updated concatenated counter value; detect erasure of the concatenated counter value in the memory unit; distribute in the ad-hoc network and upon detecting the erasure, an acquisition request for the erasure counter value; receive the erasure counter value consequent to the acquisition request; generate the concatenated counter value to include the received erasure counter value plus one and the transmission counter value after the erasure and indicating the number of transmissions as zero due to the erasure; and archive to the memory unit, the generated concatenated counter value.
    Type: Application
    Filed: June 5, 2014
    Publication date: September 25, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Tetsuya Izu, Masahiko TAKENAKA, Hisashi Kojima, Kazuyoshi Furukawa
  • Patent number: 8829488
    Abstract: Provided is a laminate containing a first compound semiconductor layer; and a second compound semiconductor layer integrally bonded to the first compound semiconductor layer via a bonding layer. A plane A is in the second compound semiconductor layer bonded to a surface where a plane B is in the first compound semiconductor layer, or a surface where a plane B is in the second compound semiconductor layer bonded to a surface where a plane A in the first compound semiconductor layer. The impurity concentration of the bonding layer is 2×1018 cm3 or more.
    Type: Grant
    Filed: August 27, 2012
    Date of Patent: September 9, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuyoshi Furukawa, Yasuhiko Akaike, Shunji Yoshitake
  • Publication number: 20140247786
    Abstract: A node device includes: a processor configured to: receive a first packet that is transferred from a source to a destination via at least one node device including the node device, the first packet including a counter value regarding a number of transfers of the first packet, and first coding information according to a first key information and contents of the first packet, determine whether to conduct a verifying process on the first packet based on the counter value, verify the first coding information is same as a second coding information, the second coding information being generated according to the contents of the first packet and a second key information stored in the memory, change the counter value in the first packet to an initial value, and transmit the first packet including a changed counter value to the destination or any one of the plurality of node devices.
    Type: Application
    Filed: May 12, 2014
    Publication date: September 4, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Tetsuya IZU, Yumi Sakemi, Kazuyoshi Furukawa, Hisashi Kojima, Masahiko Takenaka
  • Patent number: 8803179
    Abstract: A semiconductor light emitting device is provided that includes a support substrate, a first metal layer formed on the support substrate, a transparent conductive layer formed on the first metal layer, a second metal layer embedded in the transparent conductive layer, and a semiconductor light emitting layer formed on the transparent conductive layer. A reflectance of the second metal layer to light emitted by the semiconductor light emitting layer is higher than a reflectance of the first metal layer to light emitted by the semiconductor light emitting layer.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: August 12, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiko Akaike, Shinji Nunotani, Kazuyoshi Furukawa
  • Publication number: 20140164785
    Abstract: An encryption processing device includes a memory configured to store a common key, and a processor configured to generate a random number which is an integer, to perform a bit transposition on the common key, the bit transposition being determined at least by the random number, to transmit the random number to another encryption processing device and to receive a response from the other encryption processing device, the response obtained by encryption using a common key stored in the other encryption processing device and a second randomized key generated by performing the bit transposition determined by the random number; and to authenticate the other encryption processing device either by comparing the response with the random number by decrypting the response with the common key, or by comparing the random number with the response by encrypting the random number with the common key.
    Type: Application
    Filed: January 22, 2014
    Publication date: June 12, 2014
    Applicant: FUJITSU LIMITED
    Inventors: TAKAO OCHIAI, Kouichi ITOH, Dai YAMAMOTO, Kazuyoshi Furukawa, Masahiko TAKENAKA
  • Patent number: 8732454
    Abstract: A key setting method executed by a node transmitting and receiving a packet through multi-hop communication in an ad-hoc network among ad-hoc networks, includes receiving a packet encrypted using a key specific to a gateway and simultaneously reported from the gateway in the ad-hoc network; detecting a connection with a mobile terminal capable of communicating with a server retaining a key specific to a gateway in each ad-hoc network among the ad-hoc networks; transmitting to the server, via the mobile terminal and when a connection with the mobile terminal is detected, the encrypted packet received; receiving from the server and via the mobile terminal, a key specific to a gateway in the ad-hoc network and for decrypting the encrypted packet transmitted; and setting the received key specific to the gateway in the ad-hoc network as the key for encrypting the packet.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: May 20, 2014
    Assignee: Fujitsu Limited
    Inventors: Kazuyoshi Furukawa, Hisashi Kojima, Masahiko Takenaka, Tetsuya Izu
  • Patent number: 8719563
    Abstract: A key setting method executed by a node transmitting and receiving data through multi-hop communication in an ad-hoc network among multiple ad-hoc networks, includes detecting connection with a mobile terminal communicating with a server connected to a gateway in each ad-hoc network among the ad-hoc networks; transmitting by simultaneously reporting to the ad-hoc network, an acquisition request for a key for encrypting the data when the connection with the mobile terminal is detected at the detecting; receiving from the server via the mobile terminal, a key specific to a gateway and transmitted from the gateway to the server consequent to transfer of the simultaneously reported acquisition request to the gateway in the ad-hoc network; and setting the key specific to the gateway received at the receiving as the key for encrypting the data.
    Type: Grant
    Filed: January 24, 2013
    Date of Patent: May 6, 2014
    Assignee: Fujitsu Limited
    Inventors: Hisashi Kojima, Kazuyoshi Furukawa, Masahiko Takenaka, Tetsuya Izu
  • Patent number: 8707057
    Abstract: A data processing apparatus includes an address bus, a scramble unit, and a data bus. The address bus outputs address data to be given to a memory apparatus. The scramble unit scrambles write-in data into a storage position in the memory apparatus identified by the address data to obtain confidential data. The data bus outputs the confidential data. The scramble unit includes a first scrambler, a first converter and a second scrambler. The first scrambler XORs first mask data corresponding to the address data and the write-in data for each bit and makes it first scrambled data. The first converter performs one-to-one substitution conversion of the first scrambled data. The second scrambler XORs second mask data corresponding to the address data and data after the conversion of the first scrambled data by the first converter and outputs obtained second scrambled data as the confidential data.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: April 22, 2014
    Assignee: Fujitsu Limited
    Inventors: Kazuyoshi Furukawa, Takeshi Shimoyama, Masahiko Takenaka
  • Publication number: 20140061696
    Abstract: A semiconductor light emitting device is provided that includes a support substrate, a first metal layer formed on the support substrate, a transparent conductive layer formed on the first metal layer, a second metal layer embedded in the transparent conductive layer, and a semiconductor light emitting layer formed on the transparent conductive layer. A reflectance of the second metal layer to light emitted by the semiconductor light emitting layer is higher than a reflectance of the first metal layer to light emitted by the semiconductor light emitting layer.
    Type: Application
    Filed: February 27, 2013
    Publication date: March 6, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiko Akaike, Shinji Nunotani, Kazuyoshi Furukawa
  • Patent number: 8597847
    Abstract: A fuel cell system for use in transportation equipment, for example, can determine an abnormality in its fuel supply device without additional detectors being provided for abnormality detection. The fuel cell system is mounted on a motorbike, and includes a cell stack which includes a plurality of fuel cells, an aqueous solution pump arranged to supply aqueous methanol solution to the cell stack, a controller which includes a CPU, an inflow temperature sensor arranged to detect a temperature of aqueous methanol solution which is introduced to the cell stack, and an outflow temperature sensor arranged to detect a temperature of aqueous methanol solution discharged from the cell stack. The CPU obtains an inflow outflow temperature difference by calculating a difference between a detection result from the inflow temperature sensor and a detection result from the outflow temperature sensor.
    Type: Grant
    Filed: February 22, 2010
    Date of Patent: December 3, 2013
    Assignee: Yamaha Hatsudoki Kabushiki Kaisha
    Inventor: Kazuyoshi Furukawa
  • Publication number: 20130312082
    Abstract: A communication method executed by a node in an ad hoc network having multiple nodes, includes receiving from a neighboring node of the node in the ad hoc network, a first packet that includes a sender address of the neighboring node and a first packet transmission count of packet transmissions from the neighboring node; extracting the first packet transmission count from the first packet; receiving from the neighboring node and after reception of the first packet, a second packet that includes the sender address of the neighboring node and a second packet transmission count of packet transmissions from the neighboring node; extracting the second packet transmission count from the second packet; determining whether the second packet is an invalid packet, based on the first packet transmission count and the second packet transmission count; and discarding the second packet upon determining the second packet to be an invalid packet.
    Type: Application
    Filed: July 29, 2013
    Publication date: November 21, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Tetsuya IZU, Masahiko TAKENAKA, Kazuyoshi FURUKAWA, Hisashi KOJIMA
  • Publication number: 20130290701
    Abstract: A key setting method executed by a node within communication ranges of multiple ad-hoc networks, includes receiving encrypted packets encrypted by respective keys specific to gateways and broadcasted from the gateways in the ad-hoc networks; detecting connection with a mobile terminal communicable with a server retaining the keys specific to the gateways in each ad-hoc network among the ad-hoc networks; transmitting to the server when connection with the mobile terminal is detected, the encrypted packets via the mobile terminal; receiving from the server via the mobile terminal, the keys that are specific to the gateways in the ad-hoc networks and that are for decrypting each encrypted packet among the encrypted packets; and setting each of the received keys as a key to encrypt data that is to be encrypted in the node and decrypt data that is to be decrypted in the node.
    Type: Application
    Filed: June 28, 2013
    Publication date: October 31, 2013
    Applicant: Fujitsu Limited
    Inventors: Masahiko TAKENAKA, Tetsuya IZU, Kazuyoshi FURUKAWA, Hisashi KOJIMA
  • Publication number: 20130240927
    Abstract: According to one embodiment, a semiconductor light emitting element includes: a support substrate; a bonding layer provided on the support substrate; an LED layer provided on the bonding layer; and a buffer layer softer than the bonding layer. The buffer layer is placed in one of between the support substrate and the bonding layer and between the bonding layer and the LED layer.
    Type: Application
    Filed: September 14, 2012
    Publication date: September 19, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shinji NUNOTANI, Yasuhiko AKAIKE, Yoshinori NATSUME, Kazuyoshi FURUKAWA