Patents by Inventor Kazuyoshi Furukawa

Kazuyoshi Furukawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8426878
    Abstract: A semiconductor light emitting device includes: a support substrate; a metal layer provided on the support substrate; a semiconductor layer provided on the metal layer and including a light emitting layer; a contact layer containing a semiconductor, selectively provided between the semiconductor layer and the metal layer, and being in contact with the semiconductor layer and the metal layer; and an insulating film provided between the semiconductor layer and the metal layer at a position not overlapping the contact layer.
    Type: Grant
    Filed: June 25, 2012
    Date of Patent: April 23, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hidefumi Yasuda, Yuko Kato, Yasuharu Sugawara, Toshiyuki Terada, Kazuyoshi Furukawa
  • Patent number: 8367523
    Abstract: A method for manufacturing a semiconductor light-emitting device of the invention includes: forming a semiconductor layer including a light-emitting layer and a first interconnect layer on a major surface of a temporary substrate; dividing the semiconductor layer and the first interconnect layer into a plurality of chips by a trench; collectively bonding each divided portion of the first interconnect layer of a plurality of chips to be bonded not adjacent to each other out of the plurality of chips on the temporary substrate to a second interconnect layer while opposing the major surface of the temporary substrate and the major surface of a supporting substrate forming the second interconnect layer, and collectively transferring a plurality of the bonded chips from the temporary substrate to the supporting substrate after irradiating interfaces between the bonded chips and the temporary substrate and separating the chips and the temporary substrate from each other.
    Type: Grant
    Filed: March 18, 2010
    Date of Patent: February 5, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiaki Sugizaki, Akihiro Kojima, Masanobu Ando, Kazuyoshi Furukawa
  • Publication number: 20130020681
    Abstract: Provided is a laminate comprising a first compound semiconductor layer; and a second compound semiconductor layer integrally bonded to the first compound semiconductor layer via a bonding layer. A plane A is in the second compound semiconductor layer bonded to a surface where a plane B is in the first compound semiconductor layer, or a surface where a plane B is in the second compound semiconductor layer bonded to a surface where a plane A in the first compound semiconductor layer. The impurity concentration of the bonding layer is 2×10? cm or more.
    Type: Application
    Filed: August 27, 2012
    Publication date: January 24, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kazuyoshi FURUKAWA, Yasuhiko Akaike, Shunji Yoshitake
  • Patent number: 8352529
    Abstract: REDC (A*B) is calculated for the values A and B by using a Montgomery's algorithm REDC. The part related to the A*B is performed by the three-input two-output product-sum calculation circuit. One digit ai of the value A, one digit bj of the value B and a carry value c1 are input to the product-sum calculation circuit, and ai*bj+c1 is calculated thereat. The higher-order digit of the r-adic two-digit of the calculation result is used as the carry value c1, and the lower digit is used for a later calculation. Further, one digit ni of a modulo N for the REDC, a predetermined value m and a carry value c2 are input into the product-sum calculation circuit, and n*ni+c2 is calculated thereat. The higher-order digit is used as the carry value c2, and the lower digit is used for a later calculation.
    Type: Grant
    Filed: July 11, 2008
    Date of Patent: January 8, 2013
    Assignee: Fujitsu Limited
    Inventors: Kazuyoshi Furukawa, Masahiko Takenaka
  • Publication number: 20120305964
    Abstract: According to one embodiment, a semiconductor light emitting element includes a light emitting element includes a semiconductor stacked body including a light emitting layer, a reflection layer, a support substrate, a first bonding electrode and a second bonding electrode. The reflection layer is made of a metal and has a first surface and a second surface opposite to the first surface. The semiconductor stacked body is provided on a side of the first surface of the reflection layer. The first bonding electrode is provided between the second surface and the support substrate and includes a convex portion projected toward the support substrate and a bottom portion provided around the convex portion in plan view. The second bonding electrode includes a concave portion fitted in the convex portion of the first bonding electrode and is capable of bonding the support substrate and the first bonding electrode.
    Type: Application
    Filed: March 15, 2012
    Publication date: December 6, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiko AKAIKE, Yoshinori NATSUME, Shinji NUNOTANI, Kazuyoshi FURUKAWA
  • Patent number: 8327156
    Abstract: A cryptographic processing device, comprising: a storage unit; initial setting unit for setting a value to be stored in the storage unit; Montgomery modular multiplication operation unit for performing a Montgomery modular multiplication operation plural times for a value set by the initial setting unit; and fault attack detection unit for determining whether or not a fault attack occurred for each of at least some parts of the Montgomery modular multiplication operations performed plural times.
    Type: Grant
    Filed: September 15, 2009
    Date of Patent: December 4, 2012
    Assignee: Fujitsu Limited
    Inventors: Kazuyoshi Furukawa, Kouichi Itoh, Masahiko Takenaka
  • Publication number: 20120261707
    Abstract: A semiconductor light emitting device includes: a support substrate; a metal layer provided on the support substrate; a semiconductor layer provided on the metal layer and including a light emitting layer; a contact layer containing a semiconductor, selectively provided between the semiconductor layer and the metal layer, and being in contact with the semiconductor layer and the metal layer; and an insulating film provided between the semiconductor layer and the metal layer at a position not overlapping the contact layer.
    Type: Application
    Filed: June 25, 2012
    Publication date: October 18, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hidefumi Yasuda, Yuko Kato, Yasuharu Sugawara, Toshiyuki Terada, Kazuyoshi Furukawa
  • Patent number: 8237183
    Abstract: A semiconductor light emitting device includes: a support substrate; a metal layer provided on the support substrate; a semiconductor layer provided on the metal layer and including a light emitting layer; a contact layer containing a semiconductor, selectively provided between the semiconductor layer and the metal layer, and being in contact with the semiconductor layer and the metal layer; and an insulating film provided between the semiconductor layer and the metal layer at a position not overlapping the contact layer.
    Type: Grant
    Filed: August 14, 2008
    Date of Patent: August 7, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hidefumi Yasuda, Yuko Kato, Yasuharu Sugawara, Toshiyuki Terada, Kazuyoshi Furukawa
  • Patent number: 8142937
    Abstract: A fuel cell system is capable of easily determining whether or not supply of gas to a cathode has been cut off after an issuance of a power generation stop command. The fuel cell system includes a cell stack which includes a plurality of fuel cells; a stop valve which is brought to a closed state as the power generation stop command is issued, thereby cutting off an inflow of air into a pipe, and therefore into the cell stack; a power generation sensor which detects a voltage of the cell stack after the issuance of the power generation stop command; and a CPU which controls an operation of the fuel cell system. When a main switch is turned off while the cell stack is in a power generating operation, an operation stop command and the power generation stop command are given to the CPU. After the power generation stop command is issued, the CPU determines whether or not air supply to the cell stack has been cut off, by comparing the voltage of the cell stack to a first threshold value.
    Type: Grant
    Filed: May 16, 2008
    Date of Patent: March 27, 2012
    Assignee: Yamaha Hatsudoki Kabushiki Kaisha
    Inventor: Kazuyoshi Furukawa
  • Publication number: 20120070958
    Abstract: In a method of manufacturing a semiconductor device of an embodiment, at room temperature, a first substrate including a semiconductor laminate body is adhered to a second substrate with a smaller thermal expansion coefficient than that of the first substrate. Then, the first substrate and the second substrate are heated with the first substrate heated at a temperature higher than that of the second substrate. Thus the first substrate and the second substrate are bonded together. The first substrate is either a sapphire substrate including a nitride-based semiconductor layer, or a GaAs substrate including a phosphorus-based semiconductor layer. The second substrate is a silicon substrate, a GaAs substrate, a Ge substrate, or a metal substrate.
    Type: Application
    Filed: September 21, 2011
    Publication date: March 22, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuyoshi Furukawa, Yoshinori Natsume, Yasuhiko Akaike, Shinji Nunotani, Wakana Nishiwaki, Masaaki Ogawa, Toru Kita, Hidefumi Yasuda
  • Publication number: 20120008782
    Abstract: A data processing apparatus includes an address bus, a scramble unit, and a data bus. The address bus outputs address data to be given to a memory apparatus. The scramble unit scrambles write-in data into a storage position in the memory apparatus identified by the address data to obtain confidential data. The data bus outputs the confidential data. The scramble unit includes a first scrambler, a first converter and a second scrambler. The first scrambler XORs first mask data corresponding to the address data and the write-in data for each bit and makes it first scrambled data. The first converter performs one-to-one substitution conversion of the first scrambled data. The second scrambler XORs second mask data corresponding to the address data and data after the conversion of the first scrambled data by the first converter and outputs obtained second scrambled data as the confidential data.
    Type: Application
    Filed: September 20, 2011
    Publication date: January 12, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Kazuyoshi FURUKAWA, Takeshi Shimoyama, Masahiko Takenaka
  • Publication number: 20110078458
    Abstract: A contents processing device includes a management data storage unit to store an updater identifier and a private key, an accepting unit to accept a content which is divided into a plurality of blocks, an updating type indicating a type of an updating as to the content, an updated block to be updated of the content, and an updated position, an inserting unit to generate an updated content by inserting the updating block into the updated position of the content, a first hash value calculating unit to calculate a hash value as to the updated block, a signature unit to read out the updater identifier and the private key from the management data storage unit to generate a digital signature using the private key as to updating record information including the updater identifier, the updated position, the hash value as to the updated block, and the updating type.
    Type: Application
    Filed: September 20, 2010
    Publication date: March 31, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Kazuyoshi FURUKAWA, Tetsuya IZU, Masahiko TAKENAKA, Masaya YASUDA
  • Publication number: 20110073890
    Abstract: A method for manufacturing a semiconductor light-emitting device of the invention includes: forming a semiconductor layer including a light-emitting layer and a first interconnect layer on a major surface of a temporary substrate; dividing the semiconductor layer and the first interconnect layer into a plurality of chips by a trench; collectively bonding each divided portion of the first interconnect layer of a plurality of chips to be bonded not adjacent to each other out of the plurality of chips on the temporary substrate to a second interconnect layer while opposing the major surface of the temporary substrate and the major surface of a supporting substrate forming the second interconnect layer, and collectively transferring a plurality of the bonded chips from the temporary substrate to the supporting substrate after irradiating interfaces between the bonded chips and the temporary substrate and separating the chips and the temporary substrate from each other.
    Type: Application
    Filed: March 18, 2010
    Publication date: March 31, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshiaki Sugizaki, Akihiro Kojima, Masanobu Ando, Kazuyoshi Furukawa
  • Publication number: 20100232601
    Abstract: An apparatus for executing cryptographic calculation on the basis of an elliptic point on an elliptic curve includes: a memory for storing a first value including a plurality of digits; and a processor for executing a process including: obtaining a second value representing a point on the elliptic curve; calculating output values by using a predetermined equation, each digit of the first value, and the second value; determining whether at least one of the second value and the output values indicates a point of infinity; terminating the calculation when at least one of the second value and the output values indicates the point at infinity; and completing calculation when both the second value and the output values do not indicate the point at infinity, so as to obtain a result of the cryptographic calculation.
    Type: Application
    Filed: January 15, 2010
    Publication date: September 16, 2010
    Applicant: Fujitsu Limited
    Inventors: Kouichi ITOH, Dai Yamamoto, Tetsuya Izu, Masahiko Takenaka, Kazuyoshi Furukawa
  • Publication number: 20100221631
    Abstract: A fuel cell system for use in transportation equipment, for example, can determine an abnormality in its fuel supply device without additional detectors being provided for abnormality detection. The fuel cell system is mounted on a motorbike, and includes a cell stack which includes a plurality of fuel cells, an aqueous solution pump arranged to supply aqueous methanol solution to the cell stack, a controller which includes a CPU, an inflow temperature sensor arranged to detect a temperature of aqueous methanol solution which is introduced to the cell stack, and an outflow temperature sensor arranged to detect a temperature of aqueous methanol solution discharged from the cell stack. The CPU obtains an inflow outflow temperature difference by calculating a difference between a detection result from the inflow temperature sensor and a detection result from the outflow temperature sensor.
    Type: Application
    Filed: February 22, 2010
    Publication date: September 2, 2010
    Applicant: YAMAHA HATSUDOKI KABUSHIKI KAISHA
    Inventor: Kazuyoshi FURUKAWA
  • Publication number: 20100167098
    Abstract: A fuel cell system prevents leakage of aqueous fuel solution to the cathode while reducing catalyst deterioration in the fuel cell. The fuel cell system includes a fuel cell including an anode and a cathode. An aqueous solution pump supplies the anode with aqueous methanol solution whereas an air pump supplies the cathode with air. Where there is an abnormality in the fuel cell, a CPU stops operation of the aqueous solution pump, and thereafter stops operation of the air pump when a temperature of the fuel cell detected by a cell stack temperature sensor is not higher than a predetermined value. When starting the fuel cell system with an abnormality existing in the fuel cell, the CPU drives the air pump and thereafter drives the aqueous solution pump.
    Type: Application
    Filed: December 23, 2009
    Publication date: July 1, 2010
    Applicant: YAMAHA HATSUDOKI KABUSHIKI KAISHA
    Inventors: Kazuyoshi FURUKAWA, Yasuyuki MURAMATSU
  • Publication number: 20100041209
    Abstract: A method for manufacturing a semiconductor device, includes: bringing a first major surface of a first substrate into close contact with a second major surface of a second substrate being different in thermal expansion coefficient from the first substrate at a first temperature higher than room temperature; and bonding the first substrate and the second substrate by heating the first substrate and the second substrate to a second temperature higher than the first temperature with the first major surface being in close contact with the second major surface.
    Type: Application
    Filed: August 11, 2009
    Publication date: February 18, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kazuyoshi Furukawa
  • Publication number: 20100031055
    Abstract: A cryptographic processing device, comprising: a storage unit; initial setting unit for setting a value to be stored in the storage unit; Montgomery modular multiplication operation unit for performing a Montgomery modular multiplication operation plural times for a value set by the initial setting unit; and fault attack detection unit for determining whether or not a fault attack occurred for each of at least some parts of the Montgomery modular multiplication operations performed plural times.
    Type: Application
    Filed: September 15, 2009
    Publication date: February 4, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Kazuyoshi Furukawa, Kouichi Itoh, Masahiko Takenaka
  • Publication number: 20100023571
    Abstract: REDC (A*B) is calculated for the values A and B by using a Montgomery's algorithm REDC. The part related to the A*B is performed by the three-input two-output product-sum calculation circuit. One digit ai of the value A, one digit bj of the value B and a carry value c1 are input to the product-sum calculation circuit, and ai*bj+c1 is calculated thereat. The higher-order digit of the r-adic two-digit of the calculation result is used as the carry value c1, and the lower digit is used for a later calculation. Further, one digit ni of a modulo N for the REDC, a predetermined value m and a carry value c2 are input into the product-sum calculation circuit, and n*ni+c2 is calculated thereat. The higher-order digit is used as the carry value c2, and the lower digit is used for a later calculation.
    Type: Application
    Filed: July 11, 2008
    Publication date: January 28, 2010
    Applicant: Fujitsu Limited
    Inventors: Kazuyoshi Furukawa, Masahiko Takenaka
  • Publication number: 20090045425
    Abstract: A semiconductor light emitting device includes: a support substrate; a metal layer provided on the support substrate; a semiconductor layer provided on the metal layer and including a light emitting layer; a contact layer containing a semiconductor, selectively provided between the semiconductor layer and the metal layer, and being in contact with the semiconductor layer and the metal layer; and an insulating film provided between the semiconductor layer and the metal layer at a position not overlapping the contact layer.
    Type: Application
    Filed: August 14, 2008
    Publication date: February 19, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hidefumi YASUDA, Yuko Kato, Yasuharu Sugawara, Toshiyuki Terada, Kazuyoshi Furukawa