Patents by Inventor Kazuyuki Ito

Kazuyuki Ito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9575378
    Abstract: A liquid crystal display device with a pair of substrates which are arranged to face each other with liquid crystal therebetween, columnar spacers having the substantially equal height formed on a liquid-crystal-side surface of one substrate, and the columnar spacers include the columnar spacer which is contact with a liquid-crystal-side surface of another substrate and the columnar spacer which is not contact with the liquid-crystal-side surface of another substrate.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: February 21, 2017
    Assignees: Japan Display Inc., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Keiichiro Ashizawa, Mitsuo Nakatani, Hiroaki Miwa, Takao Tanaka, Sadafumi Hirai, Shinichi Kawabe, Makoto Sasaki, Kazuyuki Ito, Masahiro Ieda
  • Patent number: 9350333
    Abstract: If an exclusive OR circuit itself, a component of a signal delay detecting circuit, has failed to operate properly, a signal delay cannot be detected accurately. A malfunction pre-detecting circuit 12 includes a delay circuit DL to delay input data that is input in parallel to a data input terminal of a flip-flop FF1 provided in a subsequent stage of a flip-flop FF0, a flip-flop FFT that receives output of the delay circuit DL, and a comparator CMP that compares output of the flip-flop FF1 and output of the flip-flop FFT. Test data tv1 and test data tv2 are input to the malfunction pre-detecting circuit 12 in an operation test mode for testing operation of the malfunction pre-detecting circuit 12. The test data tv2 is input to the delay circuit DL. The comparator CMP compares the test data tv1 and output of the flip-flop FFT in the operation test mode.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: May 24, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Kazuyuki Ito, Hiroshi Shirota
  • Publication number: 20160087612
    Abstract: If an exclusive OR circuit itself, a component of a signal delay detecting circuit, has failed to operate properly, a signal delay cannot be detected accurately. A malfunction pre-detecting circuit 12 includes a delay circuit DL to delay input data that is input in parallel to a data input terminal of a flip-flop FF1 provided in a subsequent stage of a flip-flop FF0, a flip-flop FFT that receives output of the delay circuit DL, and a comparator CMP that compares output of the flip-flop FF1 and output of the flip-flop FFT. Test data tv1 and test data tv2 are input to the malfunction pre-detecting circuit 12 in an operation test mode for testing operation of the malfunction pre-detecting circuit 12. The test data tv2 is input to the delay circuit DL. The comparator CMP compares the test data tv1 and output of the flip-flop FFT in the operation test mode.
    Type: Application
    Filed: November 30, 2015
    Publication date: March 24, 2016
    Inventors: Kazuyuki ITO, Hiroshi SHIROTA
  • Patent number: 9229046
    Abstract: If an exclusive OR circuit itself, a component of a signal delay detecting circuit, has failed to operate properly, a signal delay cannot be detected accurately. A malfunction pre-detecting circuit 12 includes a delay circuit DL to delay input data that is input in parallel to a data input terminal of a flip-flop FF1 provided in a subsequent stage of a flip-flop FF0, a flip-flop FFT that receives output of the delay circuit DL, and a comparator CMP that compares output of the flip-flop FF1 and output of the flip-flop FFT. Test data tv1 and test data tv2 are input to the malfunction pre-detecting circuit 12 in an operation test mode for testing operation of the malfunction pre-detecting circuit 12. The test data tv2 is input to the delay circuit DL. The comparator CMP compares the test data tv1 and output of the flip-flop FFT in the operation test mode.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: January 5, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Kazuyuki Ito, Hiroshi Shirota
  • Patent number: 9163840
    Abstract: An object of the invention is to provide a reliable gas turbine combustor that can provide lowered NOx and combustion stability. The gas turbine combustor includes a combustion chamber to which fuel and air are supplied; a first burner located on the upstream side of the combustion chamber, the first burner jetting fuel into the combustion chamber and jetting air into the combustion chamber in a swirling manner; a plurality of second burners arranged around the first burner and supplying a premixed gas of air and fuel to the combustion chamber; an annular bulkhead disposed between the first burner and the second burners and having an inclined surface formed to broaden toward the downstream side of the combustion chamber; and a plurality of air jet ports formed in the inclined surface of the annular bulkhead and adapted to jet air into the combustion chamber.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: October 20, 2015
    Assignee: Mitsubishi Hitachi Power Systems, Ltd.
    Inventors: Shohei Yoshida, Takeo Saitou, Hiroshi Inoue, Kazuyuki Ito, Toshifumi Sasao, Akinori Hayashi
  • Publication number: 20150261031
    Abstract: A liquid crystal display device with a pair of substrates which are arranged to face each other with liquid crystal therebetween, columnar spacers having the substantially equal height formed on a liquid-crystal-side surface of one substrate, and the columnar spacers include the columnar spacer which is contact with a liquid-crystal-side surface of another substrate and the columnar spacer which is not contact with the liquid-crystal-side surface of another substrate.
    Type: Application
    Filed: May 21, 2015
    Publication date: September 17, 2015
    Inventors: Keiichiro ASHIZAWA, Mitsuo NAKATANI, Hiroaki MIWA, Takao TANAKA, Sadafumi HIRAI, Shinichi KAWABE, Makoto SASAKI, Kazuyuki ITO, Masahiro IEDA
  • Patent number: 9069213
    Abstract: A liquid crystal display device with a pair of substrates which are arranged to face each other with liquid crystal therebetween, columnar spacers having the substantially equal height formed on a liquid-crystal-side surface of one substrate, and the columnar spacers include the columnar spacer which is contact with a liquid-crystal-side surface of another substrate and the columnar spacer which is not contact with the liquid-crystal-side surface of another substrate.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: June 30, 2015
    Assignees: Japan Display Inc., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Keiichiro Ashizawa, Mitsuo Nakatani, Hiroaki Miwa, Takao Tanaka, Sadafumi Hirai, Shinichi Kawabe, Makoto Sasaki, Kazuyuki Ito, Masahiro Ieda
  • Patent number: 8998322
    Abstract: Reaction force mechanism for backrest of a chair has clear large space under the seat and uses a longer reaction force spring than the prior art. The mechanism includes a base member supported on a leg, a back support member coupled by a rotation shaft to the base member to recline and support the backrest, a seat support member to which the seat is mounted, a weight-dependent reaction force mechanism for moving the seat support member in a lifting direction, and a reaction force spring for applying a spring force for returning the back support member to an original position, in which the reaction force spring is disposed in a lateral orientation between the back support member and the seat support member.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: April 7, 2015
    Assignee: Takano Co., Ltd.
    Inventors: Toshiyuki Horiki, Kazuyuki Ito
  • Publication number: 20150091782
    Abstract: A display device includes: a display unit that displays a physical quantity; and a display control unit that causes the display unit to display the physical quantity. The display unit includes a numerical value display part that displays a numerical value of a plurality of digits and a unit display part, in which a plurality of units representing the physical quantity coexist; the numerical value display part has a numerical character segment group representing a numerical character in each of the digits; the unit display part has a plurality of symbol segments representing symbols making up the units; and the display control unit selects one of the units, causes symbol segments that represent a selected unit to be displayed in the unit display part, and causes a numerical value representing the physical quantity corresponding to the selected unit to be displayed in the numerical value display part.
    Type: Application
    Filed: September 29, 2014
    Publication date: April 2, 2015
    Inventors: Yasuo YAMAZAKI, Masaki YOSHIKAWA, Kazuyuki ITO
  • Publication number: 20150009893
    Abstract: A communication apparatus communicating with a wireless communication apparatus includes a control unit that controls communication; a wireless processing unit that converts a signal to be sent to a wireless signal; input and output units inputting or outputting the wireless signal between a transmission path and the corresponding input and output unit; and a first switch corresponding to input and output units and switch output destinations of the wireless signal from the wireless processing unit to any input and output unit, wherein the control unit detects the input and output unit and controls the first switch to switch over an output destination of the wireless signal to the input and output unit connected to the transmission path connected to the wireless communication apparatus, wherein the first switch switches over the output destination of the wireless signal to the input and output unit connected to the transmission path.
    Type: Application
    Filed: June 17, 2014
    Publication date: January 8, 2015
    Inventors: Toshiya Koyama, Tohru Muramatsu, Takeshi Wakui, Kazuyuki Ito
  • Publication number: 20140275429
    Abstract: A method for producing an olefin block polymer, the method includes: polymerizing olefin using a polymerization catalyst (X), a polymerization catalyst (Y), and an organometallic compound (C) having an atom of any of Groups 2, 12, and 13 of the periodic table of the elements, the organometallic compound (C) excluding an activating co-catalyst agent (B), wherein: the polymerization catalyst (X) is formed by bringing a transition metal compound (A-X) represented by a general formula (1-X) into contact with an activating co-catalyst agent (B); and the polymerization catalyst (Y) is formed by bringing a transition metal compound (A-Y) represented by a general formula (1-Y) into contact with the activating co-catalyst agent (B). [Chem.
    Type: Application
    Filed: May 30, 2014
    Publication date: September 18, 2014
    Applicant: Sumitomo Chemical Company, Limited
    Inventors: Koji ISHIWATA, Kazuo TAKAOKI, Kazuyuki ITO
  • Publication number: 20140211119
    Abstract: A liquid crystal display device with a pair of substrates which are arranged to face each other with liquid crystal therebetween, columnar spacers having the substantially equal height formed on a liquid-crystal-side surface of one substrate, and the columnar spacers include the columnar spacer which is contact with a liquid-crystal-side surface of another substrate and the columnar spacer which is not contact with the liquid-crystal-side surface of another substrate.
    Type: Application
    Filed: March 28, 2014
    Publication date: July 31, 2014
    Applicants: Panasonic Liquid Crystal Display Co., Ltd., Japan Display Inc.
    Inventors: Keiichiro ASHIZAWA, Mitsuo NAKATANI, Hiroaki MIWA, Takao TANAKA, Sadafumi HIRAI, Shinichi KAWABE, Makoto SASAKI, Kazuyuki ITO, Masahiro IEDA
  • Publication number: 20140152334
    Abstract: If an exclusive OR circuit itself, a component of a signal delay detecting circuit, has failed to operate properly, a signal delay cannot be detected accurately. A malfunction pre-detecting circuit 12 includes a delay circuit DL to delay input data that is input in parallel to a data input terminal of a flip-flop FF1 provided in a subsequent stage of a flip-flop FF0, a flip-flop FFT that receives output of the delay circuit DL, and a comparator CMP that compares output of the flip-flop FF1 and output of the flip-flop FFT. Test data tv1 and test data tv2 are input to the malfunction pre-detecting circuit 12 in an operation test mode for testing operation of the malfunction pre-detecting circuit 12. The test data tv2 is input to the delay circuit DL. The comparator CMP compares the test data tv1 and output of the flip-flop FFT in the operation test mode.
    Type: Application
    Filed: November 12, 2013
    Publication date: June 5, 2014
    Applicant: Renesas Electronics Corporation
    Inventors: Kazuyuki Ito, Hiroshi Shirota
  • Patent number: 8724072
    Abstract: A liquid crystal display device with a pair of substrates which are arranged to face each other with liquid crystal therebetween, columnar spacers having the substantially equal height formed on a liquid-crystal-side surface of one substrate, and the columnar spacers include the columnar spacer which is contact with a liquid-crystal-side surface of another substrate and the columnar spacer which is not contact with the liquid-crystal-side surface of another substrate.
    Type: Grant
    Filed: February 20, 2013
    Date of Patent: May 13, 2014
    Assignees: Japan Display Inc., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Keiichiro Ashizawa, Mitsuo Nakatani, Hiroaki Miwa, Takao Tanaka, Sadafumi Hirai, Shinichi Kawabe, Makoto Sasaki, Kazuyuki Ito, Masahiro Ieda
  • Publication number: 20130162928
    Abstract: A liquid crystal display device with a pair of substrates which are arranged to face each other with liquid crystal therebetween, columnar spacers having the substantially equal height formed on a liquid-crystal-side surface of one substrate, and the columnar spacers include the columnar spacer which is contact with a liquid-crystal-side surface of another substrate and the columnar spacer which is not contact with the liquid-crystal-side surface of another substrate.
    Type: Application
    Filed: February 20, 2013
    Publication date: June 27, 2013
    Applicants: Panasonic Liquid Crystal Display Co., Ltd., Hitachi Displays, Ltd.
    Inventors: Keiichiro ASHIZAWA, Mitsuo NAKATANI, Hiroaki MIWA, Takao TANAKA, Sadafumi HIRAI, Shinichi KAWABE, Makoto SASAKI, Kazuyuki ITO, Masahiro IEDA
  • Patent number: 8405813
    Abstract: A liquid crystal display device with a pair of substrates which are arranged to face each other with liquid crystal therebetween, columnar spacers having the substantially equal height formed on a liquid-crystal-side surface of one substrate, and the columnar spacers include the columnar spacer which is contact with a liquid-crystal-side surface of another substrate and the columnar spacer which is not contact with the liquid-crystal-side surface of another substrate.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: March 26, 2013
    Assignees: Hitachi Displays, Ltd., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Keiichiro Ashizawa, Mitsuo Nakatani, Hiroaki Miwa, Takao Tanaka, Sadafumi Hirai, Shinichi Kawabe, Makoto Sasaki, Kazuyuki Ito, Masahiro Ieda
  • Publication number: 20130057037
    Abstract: Reaction force mechanism for backrest of a chair has clear large space under the seat and uses a longer reaction force spring than the prior art. The mechanism includes a base member supported on a leg, a back support member coupled by a rotation shaft to the base member to recline and support the backrest, a seat support member to which the seat is mounted, a weight-dependent reaction force mechanism for moving the seat support member in a lifting direction, and a reaction force spring for applying a spring force for returning the back support member to an original position, in which the reaction force spring is disposed in a lateral orientation between the back support member and the seat support member.
    Type: Application
    Filed: May 26, 2010
    Publication date: March 7, 2013
    Applicant: TAKANO CO., LTD.
    Inventors: Toshiyuki Horiki, Kazuyuki Ito
  • Patent number: 8389844
    Abstract: In response to detection of a note-on instruction, a CPU assigns a tone generating unit comprising two tone generating channels and sets tone color control data of the assigned tone generating unit into tone generator registers. The tone color control data includes a parameter common to the two channels. Once the CPU gives a tone generation start instruction to a tone generator, the tone generator accumulates a frequency number common to the two channels to thereby generate a progressive phase common to the two channels. Waveform readout section reads out left-channel and right-channel waveform data from a waveform memory on the basis of the phase and waveform selecting information of the left and right channels. Tone characteristics of the read-out left- and right-channel waveform data are controlled by a characteristic control section on the basis of a characteristic control parameter common to the two channels.
    Type: Grant
    Filed: August 2, 2011
    Date of Patent: March 5, 2013
    Assignee: Yamaha Corporation
    Inventors: Hiroyuki Tsuchiya, Kazuyuki Ito, Masahiko Hasebe, Kouichi Kashiwazaki, Hiroyuki Iwase
  • Patent number: 8383848
    Abstract: A transition metal compound represented by the formula (1-1) or the formula (1-2) (M is a transition metal atom) and a process for producing a catalyst for olefin polymerization comprising a step of bringing the transition metal compound into contact with a co-catalytic component for activation.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: February 26, 2013
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Hidenori Hanaoka, Masato Takano, Naoko Ochi, Kazuo Takaoki, Kazuyuki Ito, Masayuki Hasegawa
  • Patent number: 8385403
    Abstract: This invention provides a digital broadcasting receiving unit capable of achieving synchronization of time information between a base station and a receiving unit with reference clock without use of a crystal oscillator (VCXO) having a variable frequency. The crystal oscillator oscillates a clock of a predetermined fixed frequency. A variable digital dividing circuit divides a fixed frequency by a division ratio so as to change the division ratio. A system decoder detects reference time information from the base station. A reference counter generates time information of a receiving unit. A phase comparator detects a difference between reference time information and time information. A division ratio control circuit controls the change of the division ratio based on the difference. The reference counter generates time information based on a clock having a frequency obtained by dividing by the variable digital dividing circuit and feeds back time information to the phase comparator.
    Type: Grant
    Filed: April 17, 2007
    Date of Patent: February 26, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Hiroshi Shirota, Tadashi Saito, Kazuyuki Ito, Ryosuke Okuda, Masao Aramoto