Patents by Inventor Keiichi Kusumoto
Keiichi Kusumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20070079261Abstract: In an integrated circuit device, element power supply lines connected to a circuit containing a plurality of cells, element ground lines connected thereto, a trunk power supply line connected to each of the element power supply lines, and a trunk ground line connected to each of the element ground lines are provided in a first wiring layer. A branch power supply line connected to the trunk power supply line and a branch ground line connected to the trunk ground line are provided in an upper wiring layer located above the first wiring layer.Type: ApplicationFiled: December 5, 2006Publication date: April 5, 2007Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventor: Keiichi Kusumoto
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Patent number: 7155684Abstract: In an integrated circuit device, element power supply lines connected to a circuit containing a plurality of cells, element ground lines connected thereto, a trunk power supply line connected to each of the element power supply lines, and a trunk ground line connected to each of the element ground lines are provided in a first wiring layer. A branch power supply line connected to the trunk power supply line and a branch ground line connected to the trunk ground line are provided in an upper wiring layer located above the first wiring layer.Type: GrantFiled: June 30, 2004Date of Patent: December 26, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Keiichi Kusumoto
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Patent number: 7038564Abstract: An electromagnetic starter switch in which a voltage from a power source is depressed by a resistor and applied to a motor by an auxiliary movable contact coming into contact with a first auxiliary fixed contact and a second auxiliary fixed contact before a pinion gear intermeshes with a ring gear, and the voltage from the power source is subsequently applied to the motor without modification by the main movable contact also coming into contact with a first main fixed contact and a second main fixed contact after the pinion gear intermeshes with the ring gear, wherein: the first main fixed contact, the second main fixed contact, the first auxiliary fixed contact, and the second auxiliary fixed contact are disposed on a main switch cover.Type: GrantFiled: May 10, 2005Date of Patent: May 2, 2006Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Keiichi Kusumoto, Hayato Yamauchi, Motoaki Kimura
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Patent number: 7034643Abstract: An electromagnetic starter switch in which a voltage from a power source is depressed by a resistor and applied to a motor by an auxiliary movable contact coming into contact with a first auxiliary fixed contact and a second auxiliary fixed contact before a pinion intermeshes with a ring gear, and the voltage from the power source is subsequently applied to the motor without modification by the main movable contact also coming into contact with a first main fixed contact and a second main fixed contact after the pinion intermeshes with the ring gear, wherein: a resistor is disposed between the first main fixed contact and the first auxiliary fixed contact or between the second main fixed contact and the second auxiliary fixed contact; and an electric current fuse is disposed between the second main fixed contact and the second auxiliary fixed contact or between the first main fixed contact and the first auxiliary fixed contact.Type: GrantFiled: July 18, 2005Date of Patent: April 25, 2006Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Keiichi Kusumoto, Hayato Yamauchi, Motoaki Kimura
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Patent number: 6987383Abstract: The invention provides a semiconductor device that can inspect the connection states of power source terminals and grounding terminals of a test LSI at a low cost and in a short time, and an inspection method for the same. Switches SW1 to SW3 are provided between a plurality of power source terminals PD1 to PD3 and a power source line 10 inside the test LSI 4. A switch SWT is provided between the power source line and a grounding line 11 inside the test LSI. When inspecting the connection state of a certain power source terminal, the switch connected between the power source terminal and the power source line is closed, the switch SWT between the power source line and the grounding line is closed, and remaining switches are opened. A voltage is supplied between the power source terminal and a grounding terminal, and whether or not the power source terminal is in the connected state is determined by whether or not a current flows.Type: GrantFiled: February 2, 2001Date of Patent: January 17, 2006Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Keiichi Kusumoto
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Publication number: 20060006898Abstract: The invention provides a semiconductor device that can inspect the connection states of power source terminals and grounding terminals of a test LSI at a low cost and in a short time, and an inspection method for the same. Switches SW1 to SW3 are provided between a plurality of power source terminals PD1 to PD3 and a power source line 10 inside the test LSI 4. A switch SWT is provided between the power source line and a grounding line 11 inside the test LSI. When inspecting the connection state of a certain power source terminal, the switch connected between the power source terminal and the power source line is closed, the switch SWT between the power source line and the grounding line is closed, and remaining switches are opened. A voltage is supplied between the power source terminal and a grounding terminal, and whether or not the power source terminal is in the connected state is determined by whether or not a current flows.Type: ApplicationFiled: September 12, 2005Publication date: January 12, 2006Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventor: Keiichi Kusumoto
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Publication number: 20050207504Abstract: A signal is transmitted in synchronization with a clock signal that repeats H and L levels indicating a preparation period and a transmission period, respectively. A transmitting circuit includes a transmitting capacitor, an input switch for setting a voltage in accordance with an input digital signal in the transmitting capacitor at preparation period, and a transmitting switch for generating a small voltage change in the signal line at transmission period, the voltage change being in accordance with a voltage of the transmitting capacitor.Type: ApplicationFiled: May 19, 2005Publication date: September 22, 2005Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Keiichi Kusumoto, Toshiyuki Moriwaki, Tsuguyasu Hatsuda, Tetsurou Toubou
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Patent number: 6922443Abstract: A signal is transmitted in synchronization with a clock signal that repeats H and L levels indicating a preparation period and a transmission period, respectively. A transmitting circuit includes a transmitting capacitor, an input switch for setting a voltage in accordance with an input digital signal in the transmitting capacitor at preparation period, and a transmitting switch for generating a small voltage change in the signal line at transmission period, the voltage change being in accordance with a voltage of the transmitting capacitor.Type: GrantFiled: November 15, 2000Date of Patent: July 26, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Keiichi Kusumoto, Toshiyuki Moriwaki, Tsuguyasu Hatsuda, Tetsurou Toubou
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Publication number: 20040238850Abstract: In an integrated circuit device, element power supply lines connected to a circuit containing a plurality of cells, element ground lines connected thereto, a trunk power supply line connected to each of the element power supply lines, and a trunk ground line connected to each of the element ground lines are provided in a first wiring layer. A branch power supply line connected to the trunk power supply line and a branch ground line connected to the trunk ground line are provided in an upper wiring layer located above the first wiring layer.Type: ApplicationFiled: June 30, 2004Publication date: December 2, 2004Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTDInventor: Keiichi Kusumoto
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Patent number: 6794674Abstract: In an integrated circuit device, element power supply lines connected to a circuit containing a plurality of cells, element ground lines connected thereto, a trunk power supply line connected to each of the element power supply lines, and a trunk ground line connected to each of the element ground lines are provided in a first wiring layer. A branch power supply line connected to the trunk power supply line and a branch ground line connected to the trunk ground line are provided in an upper wiring layer located above the first wiring layer.Type: GrantFiled: March 1, 2002Date of Patent: September 21, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Keiichi Kusumoto
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Patent number: 6787962Abstract: The brush device of a starter with an overheat protection device of the present invention is provided with brush holders, brushes slidably supported in the brush holders, respectively, springs contacting one sides of the brushes to press the brushes in the radial, inner directions, and thermostats disposed on the brushes and adapted to interrupt energization of a starting motor with a power when the brushes exceed a predetermined temperature, caused by the starting motor continuously energized with the power supply.Type: GrantFiled: September 4, 2001Date of Patent: September 7, 2004Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Katsunori Yagi, Hirohide Ikeda, Akio Seta, Kazuhide Nishii, Keiichi Kusumoto
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Patent number: 6727743Abstract: In a static circuit or the like, upper and lower terminals are both set to a first power supply potential Vdd1 in the operating state of an inverter circuit. In the non-operating state, the power supply potential of the upper terminal is reduced to a second power supply potential Vdd2 (<<Vdd1). Provided that an input signal of the inverter circuit has a potential Vdd2 (H level), an output signal thereof must be held at the ground potential (L level) in the operating state. This requires that a conductance Gp of a PMOS transistor and a conductance Gn of a NMOS transistor satisfy the relation: Gp<Gn. Therefore, a well terminal (lower terminal) of the PMOS transistor is set to a potential higher than the power supply potential Vdd2 in order to maintain the relation: Gp<Gn. Accordingly, a signal determined by the circuit in the operating state can be held even in the non-operating state, and the power supply voltage is set to an extremely low potential in the non-operating state of the circuit.Type: GrantFiled: July 15, 2002Date of Patent: April 27, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Keiichi Kusumoto, Tomoyuki Kumamaru, Takashi Andoh, Tetsuji Gotoh
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Publication number: 20030025552Abstract: In a static circuit or the like, upper and lower terminals are both set to a first power supply potential Vdd1 in the operating state of an inverter circuit. In the non-operating state, the power supply potential of the upper terminal is reduced to a second power supply potential Vdd2 (<<Vdd1). Provided that an input signal of the inverter circuit has a potential Vdd2 (H level), an output signal thereof must be held at the ground potential (L level) in the operating state. This requires that a conductance Gp of a PMOS transistor and a conductance Gn of a NMOS transistor satisfy the relation: Gp<Gn. Therefore, a well terminal (lower terminal) of the PMOS transistor is set to a potential higher than the power supply potential Vdd2 in order to maintain the relation: Gp<Gn. Accordingly, a signal determined by the circuit in the operating state can be held even in the non-operating state, and the power supply voltage is set to an extremely low potential in the non-operating state of the circuit.Type: ApplicationFiled: July 15, 2002Publication date: February 6, 2003Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Keiichi Kusumoto, Tomoyuki Kumamaru, Takashi Andoh, Tetsuji Gotoh
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Publication number: 20020149116Abstract: In an integrated circuit device, element power supply lines connected to a circuit containing a plurality of cells, element ground lines connected thereto, a trunk power supply line connected to each of the element power supply lines, and a trunk ground line connected to each of the element ground lines are provided in a first wiring layer. A branch power supply line connected to the trunk power supply line and a branch ground line connected to the trunk ground line are provided in an upper wiring layer located above the first wiring layer.Type: ApplicationFiled: March 1, 2002Publication date: October 17, 2002Applicant: Matsushita Electric Industrial Co., Ltd.Inventor: Keiichi Kusumoto
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Publication number: 20020096949Abstract: The brush device of a starter with an overheat protection device of the present invention is provided with brush holders, brushes slidably supported in the brush holders, respectively, springs contacting one sides of the brushes to press the brushes in the radial, inner directions, and thermostats disposed on the brushes and adapted to interrupt energization of a starting motor with a power when the brushes exceed a predetermined temperature, caused by the starting motor continuously energized with the power supply.Type: ApplicationFiled: September 4, 2001Publication date: July 25, 2002Applicant: MITSUBISHI DENKI KABUSHIKI KAISHAInventors: Katsunori Yagi, Hirohide Ikeda, Akio Seta, Kazuhide Nishii, Keiichi Kusumoto
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Patent number: 6326772Abstract: A power supply apparatus 200 comprises an energy supplying circuit 210 for supplying energy at a predetermined timing, and an energy preserving circuit 220 for receiving the energy supplied from the energy supplying circuit 210 and preserving the energy. The energy preserving circuit 220 includes an inductor 221, a capacitance 223 connected to one end of the inductor 221 at a node 222, and a capacitance 225 connected to the other end of the inductor 221 at a node 224. Energy is supplied to a load via at least one of the node 222 and the node 224.Type: GrantFiled: December 12, 2000Date of Patent: December 4, 2001Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Keiichi Kusumoto, Akira Matsuzawa
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Publication number: 20010013790Abstract: The invention provides a semiconductor device that can inspect the connection states of power source terminals and grounding terminals of a test LSI at a low cost and in a short time, and an inspection method for the same. Switches SW1 to SW3 are provided between a plurality of power source terminals PD1 to PD3 and a power source line 10 inside the test LSI 4. A switch SWT is provided between the power source line and a grounding line 11 inside the test LSI. When inspecting the connection state of a certain power source terminal, the switch connected between the power source terminal and the power source line is closed, the switch SWT between the power source line and the grounding line is closed, and remaining switches are opened. A voltage is supplied between the power source terminal and a grounding terminal, and whether or not the power source terminal is in the connected state is determined by whether or not a current flows.Type: ApplicationFiled: February 2, 2001Publication date: August 16, 2001Applicant: Matsushita Electric Industrial Co., Ltd.Inventor: Keiichi Kusumoto
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Publication number: 20010006342Abstract: A power supply apparatus 200 comprises an energy supplying circuit 210 for supplying energy at a predetermined timing, and an energy preserving circuit 220 for receiving the energy supplied from the energy supplying circuit 210 and preserving the energy. The energy preserving circuit 220 includes an inductor 221, a capacitance 223 connected to one end of the inductor 221 at a node 222, and a capacitance 225 connected to the other end of the inductor 221 at a node 224. Energy is supplied to a load via at least one of the node 222 and the node 224.Type: ApplicationFiled: December 12, 2000Publication date: July 5, 2001Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Keiichi Kusumoto, Akira Matsuzawa
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Patent number: 6246627Abstract: The semiconductor device of this invention includes: an array section including a plurality of circuit blocks; a leakage current cutoff section for cutting off a leakage current occurring in at least one of the plurality of circuit blocks in the array section; and a control section for controlling the leakage current cutoff section in accordance with leakage current cutoff information.Type: GrantFiled: September 16, 1999Date of Patent: June 12, 2001Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hiroyuki Yamauchi, Hironori Akamatsu, Toru Iwata, Keiichi Kusumoto, Satoshi Takahashi, Yutaka Terada, Takashi Hirata
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Patent number: 6239503Abstract: In an electric starter motor, a planetary reduction assembly includes: a sun gear engraved in an outer circumferential portion on a front side of a motor output shaft formed integrally with the armature; a ring formed into a cylindrical shape with a rotation stop projecting on an outer circumferential wall surface thereof and coupled to a front bracket while its movement in the circumferential direction is restricted by the rotation stop; an internal gear formed into a bottomed cylindrical shape with a center hole formed in a central portion of a bottom thereof and an inner circumferential gear portion engraved in an inner circumferential wall surface thereof, the internal gear being fitted in the ring so as to open on a rear side; a discoid flange portion formed integrally with an end portion on the rear side of the starter output shaft, supported rotatably to the bottom of the internal gear through a bearing and rotatably supporting an end portion on the front side of the motor output shaft through a bearinType: GrantFiled: October 15, 1999Date of Patent: May 29, 2001Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Hirohide Ikeda, Keiichi Kusumoto, Kyoichi Okamoto