Patents by Inventor Keiichi Kusumoto

Keiichi Kusumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5465093
    Abstract: The present invention discloses an improved analog-to-digital converter. A second sampling circuit samples the voltage difference between an analog signal and a reference voltage, before a first sampling circuit moves to a follow operation from a sample operation. Owing to pipelining by the first and second sampling circuits, even after the first sampling circuit moves to a follow operation, the difference between an analog signal and a reference voltage is still applied to a logical-level amplifier. The output of the logical-level amplifier, amplified to a logical voltage, is converted by a logic device into an A/D conversion output. Therefore, ADC differential non linearity error can be reduced.
    Type: Grant
    Filed: September 30, 1993
    Date of Patent: November 7, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Keiichi Kusumoto, Akira Matsuzawa
  • Patent number: 5402128
    Abstract: Link capacitors are used to establish connection between joining-points of coupling capacitors and inverters in an inverter chopper comparator array, in order to reduce injected electric charge variation due to feedthrough. Some of the comparators in the comparator array, arranged at each end thereof, constitute a redundant comparator array without connection to a logic circuit that is used to obtain an A/D conversion output. This reduces the effects of the device parameter variations in the comparator array, whereby a high accuracy voltage comparison is achieved, and noise-resistant strength is improved.
    Type: Grant
    Filed: March 23, 1993
    Date of Patent: March 28, 1995
    Assignee: Matsushita Electric Industrial Co. Ltd.
    Inventors: Keiichi Kusumoto, Akira Matsuzawa
  • Patent number: 4106430
    Abstract: A single chamber type coating and baking apparatus which includes a chamber having one opening through the ceiling and two openings through the floor. A means for discharging the air within the chamber to the outside is connected to one of the openings through the floor. There are means for generating and directing hot wind toward the opening in the ceiling, and a means for recycling the air in the chamber to the hot wind generating means which is connected to the inlet side of the means for generating hot wind at one end and at the other end to one of the openings in the floor part of said chamber. Also, a means is provided for introducing fresh air into the system and is connected to the recycling means.
    Type: Grant
    Filed: March 18, 1977
    Date of Patent: August 15, 1978
    Assignee: Nippon Paint Co., Ltd.
    Inventors: Takashi Nakajima, Tomoyuki Irie, Keiichi Kusumoto