Abstract: A control of a flash memory includes control for supplying a pulse-shaped voltage to each of non-volatile memory cells until a threshold voltage of the non-volatile memory cell having a first threshold voltage is changed to a second threshold voltage. The control involves a first write mode (coarse write) in which the amount of change in threshold voltage of each non-volatile memory cell, which is varied each time the pulse-shaped voltage is applied, is relatively rendered high, and a second write mode (high-accuracy write) in which the amount of change in threshold voltage thereof is relatively rendered low. As compared with the high-accuracy mode, the number of pulses required to change the threshold voltage of each memory cell is smaller than that in the coarse write mode. Therefore, the number of verify operations at the time that the coarse write mode is used, is small and hence the entire write operation can be speeded up.

Abstract: A keratan sulfate oligosaccharide which comprises from two to five sugar units and has sulfated N-acetylglucosamine at the reducing end and in a molecule of which at least two hydroxyl groups are sulfated, preferably, which contains at least disaccharide represented by the formula Gal(6S)-GlcNAc(6S) (in the formula, Gal, GlcN, Ac, and 6S represent a galactose, a glucosamine, an acetyl group, and a 6-O-sulfate ester, respectively) as a constitutional ingredient, and/or pharmaceutically acceptable salt thereof are used as active ingredients of anti-inflammatory agents, antiallergic agents, immunomodulators, cell differentiation inducers, and apoptosis inducers.

Abstract: This invention relates to a process for producing a desulfated polysaccharide, which comprises reacting a sulfated polysaccharide having a saccharide in which a primary hydroxyl group is sulfated, as a constituent sugar, with a silylating agent represented by the following formula (I) ##STR1## wherein R.sup.1 s are the same or different and each represent a hydrogen atom or a halogen atom, R.sup.2 represents a lower alkyl group, and R.sup.3 s are the same or different and each represent a lower alkyl group, an aryl group or a halogen atom,and a desulfated heparin obtained by this production process.

Abstract: A control of a flash memory includes control for supplying a pulse-shaped voltage to each of non-volatile memory cells until a threshold voltage of the non-volatile memory cell having a first threshold voltage is changed to a second threshold voltage. The control involves a first write mode (coarse write) in which the amount of change in threshold voltage of each non-volatile memory cell, which is varied each time the pulse-shaped voltage is applied, is relatively rendered high, and a second write mode (high-accuracy write) in which the amount of change in threshold voltage thereof is relatively rendered low. As compared with the high-accuracy mode, the number of pulses required to change the threshold voltage of each memory cell is smaller than that in the coarse write mode. Therefore, the number of verify operations at the time that the coarse write mode is used, is small and hence the entire write operation can be speeded up.

Abstract: A method for producing an N-acetyllactosamine oligosaccharide, comprising the steps of:adjusting a sulfate group content of keratan sulfate;allowing an enzyme having an ability to cleave a glycosidic linkage of keratan sulfate to act on the keratan sulfate with the adjusted sulfate group content to obtain a sulfated N-acetyllactosamine oligosaccharide; andcompletely desulfating said sulfated N-acetyllactosamine oligosaccharide.

Abstract: A control of a flash memory includes control for supplying a pulse-shaped voltage to each of non-volatile memory cells until a threshold voltage of the non-volatile memory cell having a first threshold voltage is changed to a second threshold voltage. The control involves a first write mode (coarse write) in which the amount of change in threshold voltage of each non-volatile memory cell, which is varied each time the pulse-shaped voltage is applied, is relatively rendered high, and a second write mode (high-accuracy write) in which the amount of change in threshold voltage thereof is relatively rendered low. As compared with the high-accuracy mode, the number of pulses required to change the threshold voltage of each memory cell is smaller than that in the coarse write mode. Therefore, the number of verify operations at the time that the coarse write mode is used, is small and hence the entire write operation can be speeded up.

Abstract: In a nonvolatile semiconductor memory device wherein a plurality of threshold voltages are set so as to store multivalued information in one memory cell, data is first written into the memory cell whose threshold voltage is the lowest as a written state from the erase level, and data is successively written into memory cells whose threshold voltages are higher.

Abstract: A keratan sulfate oligosaccharide which comprises from two to five sugar units and has sulfated N-acetylglucosamine at the reducing end and in a molecule of which at least two hydroxyl groups are sulfated, preferably, which contains at least disaccharide represented by the formula Gal(6S)-GlcNAc(6S) (in the formula, Gal, GlcN, Ac, and 6S represent a galactose, a glucosamine, an acetyl group, and a 6-O-sulfate ester, respectively) as a constitutional ingredient, and/or pharmaceutically acceptable salt thereof are used as active ingredients of anti-inflammatory agents, antiallergic agents, immunomodulators, cell differentiation inducers, and apoptosis inducers.

Abstract: Dermatan sulfate compositions having certain characteristics have been found to have thrombolytic activity. Dermatan sulfate combined with tissue plasminogen activator (t-PA) enhances the thrombolytic activity of t-PA. Antithrombotic compositions containing dermatan sulfates can be used for treating various thrombotic diseases.

Abstract: A semiconductor memory device in which a plurality of data lines of a memory array comprising storage transistors arranged in a matrix form as those having a high or low threshold voltage according to stored data are divided into a plurality of blocks, and sense amplifiers for performing amplification operations dispersedly in time are used to amplify signals. Moreover, a first and a second group of sense amplifiers corresponding to odd- and even-numbered adjoining data lines are arranged so that while the output signals of one group of sense amplifiers are output, word lines are switched, and the other group of sense amplifiers are caused to perform the operation of amplifying the signals read from the memory cells corresponding to the word lines thus switched, respectively.

Abstract: A semiconductor memory device in which a plurality of data lines of a memory array comprising storage transistors arranged in a matrix form as those having a high or low threshold voltage according to stored data are divided into a plurality of blocks, and sense amplifiers for performing amplification operations dispersedly in time are used to amplify signals. Moreover, a first and a second group of sense amplifiers corresponding to odd- and even-numbered adjoining data lines are arranged so that while the output signals of one group of sense amplifiers are output, word lines are switched, and the other group of sense amplifiers are caused to perform the operation of amplifying the signals read from the memory cells corresponding to the word lines thus switched, respectively.

Abstract: An arrangement is provided to enhance the speed in the operation of erasing and programming of a nonvolatile semiconductor memory that is driven by a single supply voltage and to reduce the number of transistors making up the subword decoder circuit thereby minimizing the size of the device. For this purpose, in the subword decoder circuits WDi1-WDij that drive the word lines Wi1-Wij, the block selection address lines Bip and Bin generated from the first address line group are used as supply voltages for the inverter circuit that controls the voltage of the word line, and the gate selection address line Gj generated from the second address line group is used a gate input line.

Abstract: A semiconductor memory device in which a plurality of data lines of a memory array comprising storage transistors arranged in a matrix form as those having a high or low threshold voltage according to stored data are divided into a plurality of blocks, and sense amplifiers for performing amplification operations dispersedly in time are used to amplify signals. Moreover, a first and a second group of sense amplifiers corresponding to odd- and even-numbered adjoining data lines are arranged so that while the output signals of one group of sense amplifiers are output, word lines are switched, and the other group of sense amplifiers are caused to perform the operation of amplifying the signals read from the memory cells corresponding to the word lines thus switched, respectively.

Abstract: Disclosed are novel enzymes, heparitinase T-I, heparitinase T-II, heparitinase T-III and heparitinase T-IV, which degrade heparan sulfate and/or heparin, a process for producing thereof by cultivating a novel Bacillus circulans HpT 298 having an ability of producing these enzymes and a novel Bacillus circulans HpT 298.

Abstract: Disclosed are novel enzymes, heparitinase T-I, heparitinase T-II, heparitinase T-III and heparitinase T-IV, which degrade heparan sulfate and/or heparin, a process for producing thereof by cultivating a novel Bacillus circulans HpT 298 having an ability of producing these enzymes and a novel Bacillus circulans HpT 298.

Abstract: Disclosed is a vacuum pump having a peripheral groove vacuum pump unit which includes a casing provided with an inlet port and an outlet port; a rotor disposed within the casing and including a rotor shaft journaled on the casing, a rotor body fixed to the rotor shaft and provided integrally with a rotor disk; and a stator fixedly disposed within the casing and provided with an annular groove receiving the peripheral portion of the rotor disk. Both sides of the peripheral portion of the rotor disk are cut in steps or portions of the side walls of the annular groove corresponding to the peripheral portion of the rotor disk are cut in annular recesses to form flow passages on both sides of the peripheral portion of the rotor disk. Partitions are projected from the stator into the flow passages. The starting ends of the flow passages on the inlet side of the partitions communicate with the inlet port, and the terminating ends of the same on the outlet side of the partitions communicate with the outlet port.

Abstract: A vacuum pump includes a casing provided with an inlet port and an outlet port; a turbo molecular pump unit disposed in an uppermost section, with respect to a flow direction of the gas, of the casing; a peripheral groove vacuum pump unit disposed in a middle section of the casing; and a vortex vacuum pump unit disposed in a lowermost section, with respect to the flow direction of the gas, of the casing.

Abstract: A vacuum pump includes a casing provided with an inlet port and an outlet port, a peripheral groove vacuum pump unit disposed in an upper section, with respect to a flow direction of the gas, of the casing, and a vortex vacuum pump unit disposed in a lower section, with respect to the flow direction of the gas, of the casing. The vacuum pump unit and the vortex vacuum pump unit have a common rotor. Since the common rotor is provided for the vacuum pump unit and the vortex vacuum pump unit, the dynamic balance of the rotor can be easily adjusted and the rotor rotates with a minimal amount of vibration.

Abstract: Glycosaminoglycan degrading enzymes are fractionated and purified by chromatographically treating a solution containing the enzymes with an insoluble sulfated polysaccharide carrier. The enzymes are adsorbed onto the carrier and then subsequently desrobed from the carrier.

Abstract: Disclosed is a vacuum pump having a peripheral groove vacuum pump unit which includes a casing provided with an inlet port and an outlet port; a rotor disposed within the casing and including a rotor shaft journaled on the casing, a rotor body fixed to the rotor shaft and provided integrally with a rotor disk; and a stator fixedly disposed within the casing and provided with an annular groove receiving the peripheral portion of the rotor disk. Both sides of the peripheral portion of the rotor disk are cut in steps or portions of the side walls of the annular groove corresponding to the peripheral portion of the rotor disk to form flow passages on both sides of the peripheral portion of the rotor disk. Partitions are projected from the stator into the flow passages. The starting ends of the flow passages on the inlet side of the partitions communicate with the inlet port, and the terminating ends of the same on the outlet side of the partitions communicate with the outlet port.